diff --git a/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb b/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb
index e79ea87..ea84992 100644
--- a/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb
+++ b/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb
@@ -315,6 +315,8 @@
            (Register    => Registers.DBUF_CTL,
             Mask        => DBUF_CTL_DBUF_POWER_STATE);
       end if;
+
+      Config.Raw_Clock := Config.Default_RawClk_Freq;
    end Initialize;
 
    procedure Power_Set_To (Configs : Pipe_Configs) is