diff --git a/common/tigerlake/Makefile.inc b/common/tigerlake/Makefile.inc
index c5fb4f2..7fd9447 100644
--- a/common/tigerlake/Makefile.inc
+++ b/common/tigerlake/Makefile.inc
@@ -5,6 +5,7 @@
 gfxinit-y += hw-gfx-gma-connectors.adb
 gfxinit-y += hw-gfx-gma-connectors-tc.adb
 gfxinit-y += hw-gfx-gma-connectors-tc.ads
+gfxinit-y += hw-gfx-gma-connectors-tc-ownership.ads
 gfxinit-y += hw-gfx-gma-connectors-combo_phy.adb
 gfxinit-y += hw-gfx-gma-connectors-combo_phy.ads
 gfxinit-y += hw-gfx-gma-port_detect.adb
@@ -14,3 +15,9 @@
 gfxinit-y += hw-gfx-gma-plls-combo_phy.ads
 gfxinit-y += hw-gfx-gma-plls-dekel_phy.adb
 gfxinit-y += hw-gfx-gma-plls-dekel_phy.ads
+
+ifneq ($(filter Tigerlake,$(CONFIG_GFX_GMA_GENERATION)),)
+gfxinit-y += tgl/hw-gfx-gma-connectors-tc-ownership.adb
+else ifneq ($(filter AlderlakeP,$(CONFIG_GFX_GMA_GENERATION)),)
+gfxinit-y += xelpd/hw-gfx-gma-connectors-tc-ownership.adb
+endif
diff --git a/common/tigerlake/hw-gfx-gma-connectors-tc-ownership.ads b/common/tigerlake/hw-gfx-gma-connectors-tc-ownership.ads
new file mode 100644
index 0000000..fc2962c
--- /dev/null
+++ b/common/tigerlake/hw-gfx-gma-connectors-tc-ownership.ads
@@ -0,0 +1,34 @@
+--
+-- Copyright (C) Nico Huber <nico.h@gmx.de>
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+
+package HW.GFX.GMA.Connectors.TC.Ownership is
+
+   procedure Claim
+     (Port     : in     USBC_Port;
+      DP_Alt   : in     Boolean;
+      Success  :    out Boolean);
+
+   procedure Claimed (Port : USBC_Port; Is_Claimed : out Boolean);
+
+   ----------------------------------------------------------------------------
+
+   procedure Connect
+     (Port     : in     USBC_Port;
+      DP_Alt   : in     Boolean;
+      Lanes    : in     DP_Lane_Count;
+      Success  :    out Boolean);
+
+   procedure Disconnect (Port : USBC_Port);
+
+end HW.GFX.GMA.Connectors.TC.Ownership;
diff --git a/common/tigerlake/hw-gfx-gma-connectors-tc.adb b/common/tigerlake/hw-gfx-gma-connectors-tc.adb
index 5cce6c4..bd0e991 100644
--- a/common/tigerlake/hw-gfx-gma-connectors-tc.adb
+++ b/common/tigerlake/hw-gfx-gma-connectors-tc.adb
@@ -12,8 +12,6 @@
 -- GNU General Public License for more details.
 --
 
-with HW.GFX.GMA.Config;
-with HW.GFX.GMA.Registers;
 with HW.GFX.DP_Info;
 with HW.GFX.GMA.PCode;
 
@@ -58,80 +56,6 @@
    TCCOLD_UNBLOCK_REQ       : constant := 16#01#;
    TCCOLD_BLOCK_RESULT_FAIL : constant := 16#01#;
 
-   type Fia_Regs_Record is record
-      PORT_TX_DFLEXDPMLE1 : Registers.Registers_Index;
-      PORT_TX_DFLEXDPSP   : Registers.Registers_Index;
-      PORT_TX_DFLEXDPPMS  : Registers.Registers_Index;
-      PORT_TX_DFLEXDPCSSS : Registers.Registers_Index;
-      PORT_TX_DFLEXPA1    : Registers.Registers_Index;
-   end record;
-
-   Fia_Regs : constant array (USBC_Port) of Fia_Regs_Record :=
-     (DDI_TC1 =>
-        (Registers.PORT_TX_DFLEXDPMLE1_FIA1,
-         Registers.PORT_TX_DFLEXDPSP_FIA1,
-         Registers.PORT_TX_DFLEXDPPMS_FIA1,
-         Registers.PORT_TX_DFLEXDPCSSS_FIA1,
-         Registers.PORT_TX_DFLEXPA1_FIA1),
-      DDI_TC2 =>
-        (Registers.PORT_TX_DFLEXDPMLE1_FIA1,
-         Registers.PORT_TX_DFLEXDPSP_FIA1,
-         Registers.PORT_TX_DFLEXDPPMS_FIA1,
-         Registers.PORT_TX_DFLEXDPCSSS_FIA1,
-         Registers.PORT_TX_DFLEXPA1_FIA1),
-      DDI_TC3 =>
-        (Registers.PORT_TX_DFLEXDPMLE1_FIA2,
-         Registers.PORT_TX_DFLEXDPSP_FIA2,
-         Registers.PORT_TX_DFLEXDPPMS_FIA2,
-         Registers.PORT_TX_DFLEXDPCSSS_FIA2,
-         Registers.PORT_TX_DFLEXPA1_FIA2),
-      DDI_TC4 =>
-        (Registers.PORT_TX_DFLEXDPMLE1_FIA2,
-         Registers.PORT_TX_DFLEXDPSP_FIA2,
-         Registers.PORT_TX_DFLEXDPPMS_FIA2,
-         Registers.PORT_TX_DFLEXDPCSSS_FIA2,
-         Registers.PORT_TX_DFLEXPA1_FIA2),
-      DDI_TC5 =>
-        (Registers.PORT_TX_DFLEXDPMLE1_FIA3,
-         Registers.PORT_TX_DFLEXDPSP_FIA3,
-         Registers.PORT_TX_DFLEXDPPMS_FIA3,
-         Registers.PORT_TX_DFLEXDPCSSS_FIA3,
-         Registers.PORT_TX_DFLEXPA1_FIA3),
-      DDI_TC6 =>
-        (Registers.PORT_TX_DFLEXDPMLE1_FIA3,
-         Registers.PORT_TX_DFLEXDPSP_FIA3,
-         Registers.PORT_TX_DFLEXDPPMS_FIA3,
-         Registers.PORT_TX_DFLEXDPCSSS_FIA3,
-         Registers.PORT_TX_DFLEXPA1_FIA3));
-
-   function Fia_Index (Port : USBC_Port) return Natural
-   is (case Port is
-       when DDI_TC1 | DDI_TC3 | DDI_TC5 => 0,
-       when DDI_TC2 | DDI_TC4 | DDI_TC6 => 1);
-
-   function DFLEXDPMLE1_DPMLETC_MASK (Port : USBC_Port) return Word32 is
-      (Shift_Left (15, 4 * Fia_Index (Port)));
-   function DFLEXDPMLE1_DPMLETC_ML0 (Port : USBC_Port) return Word32 is
-      (Shift_Left (1, 4 * Fia_Index (Port)));
-   function DFLEXDPMLE1_DPMLETC_ML1_0 (Port : USBC_Port) return Word32 is
-      (Shift_Left (3, 4 * Fia_Index (Port)));
-   function DFLEXDPMLE1_DPMLETC_ML3 (Port : USBC_Port) return Word32 is
-      (Shift_Left (8, 4 * Fia_Index (Port)));
-   function DFLEXDPMLE1_DPMLETC_ML3_2 (Port : USBC_Port) return Word32 is
-      (Shift_Left (12, 4 * Fia_Index (Port)));
-   function DFLEXDPMLE1_DPMLETC_ML3_0 (Port : USBC_Port) return Word32 is
-      (Shift_Left (15, 4 * Fia_Index (Port)));
-   function DP_PHY_MODE_STATUS_COMPLETE (Port : USBC_Port) return Word32 is
-      (Shift_Left (1, Fia_Index (Port)));
-   function DP_PHY_MODE_STATUS_NOT_SAFE (Port : USBC_Port) return Word32 is
-      (Shift_Left (1, Fia_Index (Port)));
-   function TC_LIVE_STATE_TC (Port : USBC_Port) return Word32 is
-      (Shift_Left (1, Fia_Index (Port) * 8 + 5));
-   function DP_LANE_ASSIGNMENT_MASK (Port : USBC_Port) return Word32 is
-      (Shift_Left (16#f#, Fia_Index (Port) * 8));
-   function DP_LANE_ASSIGNMENT_SHIFT (Port : USBC_Port) return Natural is
-      (Fia_Index (Port) * 8);
-
    DDI_BUF_CTL_BUFFER_ENABLE        : constant :=      1 * 2 ** 31;
    DDI_BUF_CTL_TRANS_SELECT_MASK    : constant :=  16#f# * 2 ** 24;
    DDI_BUF_CTL_PORT_REVERSAL        : constant :=      1 * 2 ** 16;
@@ -365,116 +289,38 @@
 
    ---------------------------------------------------------------------
 
-   procedure Claim
-     (Port     : in     USBC_Port;
-      DP_Alt   : in     Boolean;
-      Success  :    out Boolean)
+   procedure Set_Lane_Count (Port : USBC_Port; Lanes : DP_Lane_Count) is
+   begin
+      Registers.Unset_And_Set_Mask
+        (Register   => Fia_Regs (Port).PORT_TX_DFLEXDPMLE1,
+         Mask_Unset => DFLEXDPMLE1_DPMLETC_MASK (Port),
+         Mask_Set   =>
+           (case Lanes is
+               -- ML0 is not lane-reversed, ML3 is reverse
+               when DP_Lane_Count_1 => DFLEXDPMLE1_DPMLETC_ML0 (Port),
+               -- ML1_0 is not reversed, ML3_2 is reverse
+               when DP_Lane_Count_2 => DFLEXDPMLE1_DPMLETC_ML1_0 (Port),
+               -- symmetric
+               when DP_Lane_Count_4 => DFLEXDPMLE1_DPMLETC_ML3_0 (Port)));
+   end Set_Lane_Count;
+
+   procedure Get_Lane_Assignment_Count
+     (Port  : in     USBC_Port;
+      Lanes : out DP_Lane_Count)
    is
+      Lane_Mask : Word32;
+      Tmp : Word32;
    begin
-      -- For legacy ports, this is supposed to be
-      -- initialized once during boot, hence wait.
-      Registers.Wait_Set_Mask
-        (Register => Fia_Regs (Port).PORT_TX_DFLEXDPPMS,
-         Mask     => DP_PHY_MODE_STATUS_COMPLETE (Port),
-         TOut_MS  => (if DP_Alt then 0 else 100),
-         Success  => Success);
-      if not Success then
-         pragma Debug (Debug.Put_Line ("DP PHY mode status not complete"));
-         return;
-      end if;
-
-      Registers.Set_Mask
-        (Register => Fia_Regs (Port).PORT_TX_DFLEXDPCSSS,
-         Mask     => DP_PHY_MODE_STATUS_NOT_SAFE (Port));
-   end Claim;
-
-   procedure Claimed (Port : USBC_Port; Is_Claimed : out Boolean) is
-   begin
-      if Port not in DDI_TC1 .. Config.Last_TC_Port then
-         Is_Claimed := False;
-         return;
-      end if;
-
-      Registers.Is_Set_Mask
-        (Register => Fia_Regs (Port).PORT_TX_DFLEXDPCSSS,
-         Mask     => DP_PHY_MODE_STATUS_NOT_SAFE (Port),
-         Result   => Is_Claimed);
-   end Claimed;
-
-   ---------------------------------------------------------------------
-
-   procedure Connect
-     (Port     : in     USBC_Port;
-      DP_Alt   : in     Boolean;
-      Lanes    : in     DP_Lane_Count;
-      Success  :    out Boolean)
-   is
-      procedure Get_Lane_Assignment_Count (Lanes : out DP_Lane_Count)
-      is
-         Lane_Mask : Word32;
-         Tmp : Word32;
-      begin
-         Registers.Read (Fia_Regs (Port).PORT_TX_DFLEXDPSP, Tmp);
-         Lane_Mask := Shift_Right (Tmp and DP_LANE_ASSIGNMENT_MASK (Port),
-                                   DP_LANE_ASSIGNMENT_SHIFT (Port));
-         Lanes :=
-           (case Lane_Mask is
-               when 16#1# | 16#2# | 16#4# | 16#8#  => DP_Lane_Count_1,
-               when 16#3# | 16#c#                  => DP_Lane_Count_2,
-               when 16#f#                          => DP_Lane_Count_4,
-               when others                         => DP_Lane_Count_1);
-      end Get_Lane_Assignment_Count;
-
-      procedure Set_Lane_Count (Lanes : DP_Lane_Count) is
-      begin
-         Registers.Unset_And_Set_Mask
-           (Register   => Fia_Regs (Port).PORT_TX_DFLEXDPMLE1,
-            Mask_Unset => DFLEXDPMLE1_DPMLETC_MASK (Port),
-            Mask_Set   =>
-              (case Lanes is
-                  -- ML0 is not lane-reversed, ML3 is reverse
-                  when DP_Lane_Count_1 => DFLEXDPMLE1_DPMLETC_ML0 (Port),
-                  -- ML1_0 is not reversed, ML3_2 is reverse
-                  when DP_Lane_Count_2 => DFLEXDPMLE1_DPMLETC_ML1_0 (Port),
-                  -- symmetric
-                  when DP_Lane_Count_4 => DFLEXDPMLE1_DPMLETC_ML3_0 (Port)));
-      end Set_Lane_Count;
-
-      Assigned_Lanes : DP_Lane_Count;
-   begin
-      Claimed (Port, Success);
-      if not Success then
-         pragma Debug (Debug.Put_Line ("Tried to connect to unclaimed port."));
-         return;
-      end if;
-
-      if DP_Alt then
-         Registers.Is_Set_Mask
-           (Register => Fia_Regs (Port).PORT_TX_DFLEXDPSP,
-            Mask     => TC_LIVE_STATE_TC (Port),
-            Result   => Success);
-         if not Success then
-            pragma Debug (Debug.Put_Line ("DP-Alt is not connected."));
-            return;
-         end if;
-
-         Get_Lane_Assignment_Count (Assigned_Lanes);
-         Set_Lane_Count (Assigned_Lanes);
-      else
-         Set_Lane_Count (Lanes);
-      end if;
-   end Connect;
-
-   ---------------------------------------------------------------------
-
-   procedure Disconnect (Port : USBC_Port) is
-   begin
-      if Port in DDI_TC1 .. Config.Last_TC_Port then
-         Registers.Unset_Mask
-           (Register => Fia_Regs (Port).PORT_TX_DFLEXDPCSSS,
-            Mask     => DP_PHY_MODE_STATUS_NOT_SAFE (Port));
-      end if;
-   end Disconnect;
+      Registers.Read (Fia_Regs (Port).PORT_TX_DFLEXDPSP, Tmp);
+      Lane_Mask := Shift_Right (Tmp and DP_LANE_ASSIGNMENT_MASK (Port),
+                                DP_LANE_ASSIGNMENT_SHIFT (Port));
+      Lanes :=
+        (case Lane_Mask is
+            when 16#1# | 16#2# | 16#4# | 16#8#  => DP_Lane_Count_1,
+            when 16#3# | 16#c#                  => DP_Lane_Count_2,
+            when 16#f#                          => DP_Lane_Count_4,
+            when others                         => DP_Lane_Count_1);
+   end Get_Lane_Assignment_Count;
 
    ---------------------------------------------------------------------
 
diff --git a/common/tigerlake/hw-gfx-gma-connectors-tc.ads b/common/tigerlake/hw-gfx-gma-connectors-tc.ads
index d9caf49..25f30eb 100644
--- a/common/tigerlake/hw-gfx-gma-connectors-tc.ads
+++ b/common/tigerlake/hw-gfx-gma-connectors-tc.ads
@@ -12,22 +12,12 @@
 -- GNU General Public License for more details.
 --
 
+with HW.GFX.GMA.Config;
 with HW.GFX.GMA.DP_Info;
+with HW.GFX.GMA.Registers;
 
 package HW.GFX.GMA.Connectors.TC is
 
-   procedure Claim
-     (Port     : in     USBC_Port;
-      DP_Alt   : in     Boolean;
-      Success  :    out Boolean);
-   procedure Claimed (Port : USBC_Port; Is_Claimed : out Boolean);
-   procedure Connect
-     (Port     : in     USBC_Port;
-      DP_Alt   : in     Boolean;
-      Lanes    : in     DP_Lane_Count;
-      Success  :    out Boolean);
-   procedure Disconnect (Port : USBC_Port);
-
    procedure Program_DP_Mode (P : USBC_Port; Lane_Count : Natural);
    procedure Enable_HDMI (Port : USBC_Port);
 
@@ -41,4 +31,90 @@
      (Request : in     TC_Cold_Request_Type;
       Success :    out Boolean);
 
+private
+   -- Some of the Connectors code only supports 4 ports.
+   -- And so far, no SKU needs more.
+   subtype Valid_TC_Port is USBC_Port range DDI_TC1 .. Config.Last_TC_Port;
+
+   type Fia_Regs_Record is record
+      PORT_TX_DFLEXDPMLE1 : Registers.Registers_Index;
+      PORT_TX_DFLEXDPSP   : Registers.Registers_Index;
+      PORT_TX_DFLEXDPPMS  : Registers.Registers_Index;
+      PORT_TX_DFLEXDPCSSS : Registers.Registers_Index;
+      PORT_TX_DFLEXPA1    : Registers.Registers_Index;
+   end record;
+
+   type Fia_Regs_Array is array (USBC_Port) of Fia_Regs_Record;
+   Fia_Regs : constant Fia_Regs_Array :=
+     (DDI_TC1 =>
+        (Registers.PORT_TX_DFLEXDPMLE1_FIA1,
+         Registers.PORT_TX_DFLEXDPSP_FIA1,
+         Registers.PORT_TX_DFLEXDPPMS_FIA1,
+         Registers.PORT_TX_DFLEXDPCSSS_FIA1,
+         Registers.PORT_TX_DFLEXPA1_FIA1),
+      DDI_TC2 =>
+        (Registers.PORT_TX_DFLEXDPMLE1_FIA1,
+         Registers.PORT_TX_DFLEXDPSP_FIA1,
+         Registers.PORT_TX_DFLEXDPPMS_FIA1,
+         Registers.PORT_TX_DFLEXDPCSSS_FIA1,
+         Registers.PORT_TX_DFLEXPA1_FIA1),
+      DDI_TC3 =>
+        (Registers.PORT_TX_DFLEXDPMLE1_FIA2,
+         Registers.PORT_TX_DFLEXDPSP_FIA2,
+         Registers.PORT_TX_DFLEXDPPMS_FIA2,
+         Registers.PORT_TX_DFLEXDPCSSS_FIA2,
+         Registers.PORT_TX_DFLEXPA1_FIA2),
+      DDI_TC4 =>
+        (Registers.PORT_TX_DFLEXDPMLE1_FIA2,
+         Registers.PORT_TX_DFLEXDPSP_FIA2,
+         Registers.PORT_TX_DFLEXDPPMS_FIA2,
+         Registers.PORT_TX_DFLEXDPCSSS_FIA2,
+         Registers.PORT_TX_DFLEXPA1_FIA2),
+      DDI_TC5 =>
+        (Registers.PORT_TX_DFLEXDPMLE1_FIA3,
+         Registers.PORT_TX_DFLEXDPSP_FIA3,
+         Registers.PORT_TX_DFLEXDPPMS_FIA3,
+         Registers.PORT_TX_DFLEXDPCSSS_FIA3,
+         Registers.PORT_TX_DFLEXPA1_FIA3),
+      DDI_TC6 =>
+        (Registers.PORT_TX_DFLEXDPMLE1_FIA3,
+         Registers.PORT_TX_DFLEXDPSP_FIA3,
+         Registers.PORT_TX_DFLEXDPPMS_FIA3,
+         Registers.PORT_TX_DFLEXDPCSSS_FIA3,
+         Registers.PORT_TX_DFLEXPA1_FIA3));
+
+   function Fia_Index (Port : USBC_Port) return Natural
+   is
+     (case Port is
+         when DDI_TC1 | DDI_TC3 | DDI_TC5 => 0,
+         when DDI_TC2 | DDI_TC4 | DDI_TC6 => 1);
+
+   function DFLEXDPMLE1_DPMLETC_MASK (Port : USBC_Port) return Word32 is
+      (Shift_Left (15, 4 * Fia_Index (Port)));
+   function DFLEXDPMLE1_DPMLETC_ML0 (Port : USBC_Port) return Word32 is
+      (Shift_Left (1, 4 * Fia_Index (Port)));
+   function DFLEXDPMLE1_DPMLETC_ML1_0 (Port : USBC_Port) return Word32 is
+      (Shift_Left (3, 4 * Fia_Index (Port)));
+   function DFLEXDPMLE1_DPMLETC_ML3 (Port : USBC_Port) return Word32 is
+      (Shift_Left (8, 4 * Fia_Index (Port)));
+   function DFLEXDPMLE1_DPMLETC_ML3_2 (Port : USBC_Port) return Word32 is
+      (Shift_Left (12, 4 * Fia_Index (Port)));
+   function DFLEXDPMLE1_DPMLETC_ML3_0 (Port : USBC_Port) return Word32 is
+      (Shift_Left (15, 4 * Fia_Index (Port)));
+   function DP_PHY_MODE_STATUS_COMPLETE (Port : USBC_Port) return Word32 is
+      (Shift_Left (1, Fia_Index (Port)));
+   function DP_PHY_MODE_STATUS_NOT_SAFE (Port : USBC_Port) return Word32 is
+      (Shift_Left (1, Fia_Index (Port)));
+   function TC_LIVE_STATE_TC (Port : USBC_Port) return Word32 is
+      (Shift_Left (1, Fia_Index (Port) * 8 + 5));
+   function DP_LANE_ASSIGNMENT_MASK (Port : USBC_Port) return Word32 is
+      (Shift_Left (16#f#, Fia_Index (Port) * 8));
+   function DP_LANE_ASSIGNMENT_SHIFT (Port : USBC_Port) return Natural is
+      (Fia_Index (Port) * 8);
+
+   procedure Get_Lane_Assignment_Count
+     (Port  : in     USBC_Port;
+      Lanes :    out DP_Lane_Count);
+   procedure Set_Lane_Count (Port : USBC_Port; Lanes : DP_Lane_Count);
+
 end HW.GFX.GMA.Connectors.TC;
diff --git a/common/tigerlake/hw-gfx-gma-connectors.adb b/common/tigerlake/hw-gfx-gma-connectors.adb
index 4c1171f..cac0cab 100644
--- a/common/tigerlake/hw-gfx-gma-connectors.adb
+++ b/common/tigerlake/hw-gfx-gma-connectors.adb
@@ -18,6 +18,7 @@
 with HW.GFX.GMA.Config;
 with HW.GFX.GMA.Config_Helpers;
 with HW.GFX.GMA.Connectors.TC;
+with HW.GFX.GMA.Connectors.TC.Ownership;
 with HW.GFX.GMA.Connectors.Combo_Phy;
 with HW.GFX.GMA.DP_Aux_Request;
 with HW.GFX.GMA.DP_Info;
@@ -292,7 +293,7 @@
    is
    begin
       if Port_Cfg.Port in USBC_Port then
-         TC.Connect
+         TC.Ownership.Connect
            (Port     => Port_Cfg.Port,
             DP_Alt   => Port in Physical_USBC_Ports,
             Lanes    => Port_Cfg.DP.Lane_Count,
diff --git a/common/tigerlake/hw-gfx-gma-power_and_clocks.adb b/common/tigerlake/hw-gfx-gma-power_and_clocks.adb
index bbbbd6f..1573777 100644
--- a/common/tigerlake/hw-gfx-gma-power_and_clocks.adb
+++ b/common/tigerlake/hw-gfx-gma-power_and_clocks.adb
@@ -19,7 +19,7 @@
 with HW.GFX.GMA.PCode;
 with HW.GFX.GMA.Registers;
 with HW.GFX.GMA.Transcoder;
-with HW.GFX.GMA.Connectors.TC;
+with HW.GFX.GMA.Connectors.TC.Ownership;
 
 use type HW.Word64;
 
@@ -225,7 +225,7 @@
          Registers.Unset_Mask
            (Register => AUX_CTL_Regs (PD),
             Mask     => DP_AUX_CH_CTL_TBT_IO);
-         Connectors.TC.Claimed (To_GPU_Port (PD), Success);
+         Connectors.TC.Ownership.Claimed (To_GPU_Port (PD), Success);
       elsif PD = PW1 then
          Registers.Wait_Set_Mask
            (Register => Registers.FUSE_STATUS,
@@ -261,7 +261,7 @@
          -- convenient to do it here: When requested to turn the
          -- power off, we know exactly that we don't want to use
          -- the port (anymore).
-         Connectors.TC.Disconnect (To_GPU_Port (PD));
+         Connectors.TC.Ownership.Disconnect (To_GPU_Port (PD));
       end if;
    end Pre_PD_Off;
 
@@ -771,7 +771,7 @@
          PD_On (DDI);
 
          if GPU_Port in USBC_Port then
-            Connectors.TC.Claim
+            Connectors.TC.Ownership.Claim
               (Port     => GPU_Port,
                DP_Alt   => Port in Physical_USBC_Ports,
                Success  => Success);
diff --git a/common/tigerlake/tgl/hw-gfx-gma-connectors-tc-ownership.adb b/common/tigerlake/tgl/hw-gfx-gma-connectors-tc-ownership.adb
new file mode 100644
index 0000000..b7095bc
--- /dev/null
+++ b/common/tigerlake/tgl/hw-gfx-gma-connectors-tc-ownership.adb
@@ -0,0 +1,101 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+
+with HW.GFX.GMA.Config;
+with HW.GFX.GMA.Registers;
+
+with HW.Debug;
+with GNAT.Source_Info;
+
+package body HW.GFX.GMA.Connectors.TC.Ownership is
+
+   procedure Claim
+     (Port     : in     USBC_Port;
+      DP_Alt   : in     Boolean;
+      Success  :    out Boolean)
+   is
+   begin
+      -- For legacy ports, this is supposed to be
+      -- initialized once during boot, hence wait.
+      Registers.Wait_Set_Mask
+        (Register => Fia_Regs (Port).PORT_TX_DFLEXDPPMS,
+         Mask     => DP_PHY_MODE_STATUS_COMPLETE (Port),
+         TOut_MS  => (if DP_Alt then 0 else 100),
+         Success  => Success);
+      if not Success then
+         pragma Debug (Debug.Put_Line ("DP PHY mode status not complete"));
+         return;
+      end if;
+
+      Registers.Set_Mask
+        (Register => Fia_Regs (Port).PORT_TX_DFLEXDPCSSS,
+         Mask     => DP_PHY_MODE_STATUS_NOT_SAFE (Port));
+   end Claim;
+
+   procedure Claimed (Port : USBC_Port; Is_Claimed : out Boolean) is
+   begin
+      if Port not in Valid_TC_Port then
+         Is_Claimed := False;
+         return;
+      end if;
+
+      Registers.Is_Set_Mask
+        (Register => Fia_Regs (Port).PORT_TX_DFLEXDPCSSS,
+         Mask     => DP_PHY_MODE_STATUS_NOT_SAFE (Port),
+         Result   => Is_Claimed);
+   end Claimed;
+
+   ---------------------------------------------------------------------
+
+   procedure Connect
+     (Port     : in     USBC_Port;
+      DP_Alt   : in     Boolean;
+      Lanes    : in     DP_Lane_Count;
+      Success  :    out Boolean)
+   is
+      Assigned_Lanes : DP_Lane_Count;
+   begin
+      Claimed (Port, Success);
+      if not Success then
+         pragma Debug (Debug.Put_Line ("Tried to connect to unclaimed port."));
+         return;
+      end if;
+
+      if DP_Alt then
+         Registers.Is_Set_Mask
+           (Register => Fia_Regs (Port).PORT_TX_DFLEXDPSP,
+            Mask     => TC_LIVE_STATE_TC (Port),
+            Result   => Success);
+         if not Success then
+            pragma Debug (Debug.Put_Line ("DP-Alt is not connected."));
+            return;
+         end if;
+
+         Get_Lane_Assignment_Count (Port, Assigned_Lanes);
+         Set_Lane_Count (Port, Assigned_Lanes);
+      else
+         Set_Lane_Count (Port, Lanes);
+      end if;
+   end Connect;
+
+   procedure Disconnect (Port : USBC_Port) is
+   begin
+      if Port in Valid_TC_Port then
+         Registers.Unset_Mask
+           (Register => Fia_Regs (Port).PORT_TX_DFLEXDPCSSS,
+            Mask     => DP_PHY_MODE_STATUS_NOT_SAFE (Port));
+      end if;
+   end Disconnect;
+
+end HW.GFX.GMA.Connectors.TC.Ownership;
diff --git a/common/tigerlake/xelpd/hw-gfx-gma-connectors-tc-ownership.adb b/common/tigerlake/xelpd/hw-gfx-gma-connectors-tc-ownership.adb
new file mode 100644
index 0000000..4e509ad
--- /dev/null
+++ b/common/tigerlake/xelpd/hw-gfx-gma-connectors-tc-ownership.adb
@@ -0,0 +1,51 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+
+with HW.GFX.GMA.Config;
+with HW.GFX.GMA.Registers;
+
+with HW.Debug;
+with GNAT.Source_Info;
+
+package body HW.GFX.GMA.Connectors.TC.Ownership is
+
+   procedure Claim
+     (Port     : in     USBC_Port;
+      DP_Alt   : in     Boolean;
+      Success  :    out Boolean)
+   is
+   begin
+      Success := False;
+   end Claim;
+
+   procedure Claimed (Port : USBC_Port; Is_Claimed : out Boolean) is
+   begin
+      Is_Claimed := False;
+   end Claimed;
+
+   ---------------------------------------------------------------------
+
+   procedure Connect
+     (Port     : in     USBC_Port;
+      DP_Alt   : in     Boolean;
+      Lanes    : in     DP_Lane_Count;
+      Success  :    out Boolean)
+   is
+   begin
+      Success := False;
+   end Connect;
+
+   procedure Disconnect (Port : USBC_Port) is null;
+
+end HW.GFX.GMA.Connectors.TC.Ownership;