commit b6df68391741f9cbcb8e286624d6994a6f9dbdf1
author Tim Wawrzynczak <twawrzynczak@chromium.org> Fri Sep 09 11:47:27 2022 -0600
committer Nico Huber <nico.h@gmx.de> Mon May 29 19:23:08 2023 +0000
tree 5c51a3f93ff02da2e65fef4121c9d8fd492a414b
parent 24748f320cff6c7f1d78e78aacc0e15bd68a52ac

gma registers: Update for Tiger Lake and Alder Lake

Add all of the necessary registers at once, so they do not distract
from the rest of the patches.

Change-Id: I32102b58018b62874d708b31621c3ca8f676ca02
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/libgfxinit/+/70890
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>

common/broxton/hw-gfx-gma-power_and_clocks.adb

diff --git a/common/broxton/hw-gfx-gma-power_and_clocks.adb b/common/broxton/hw-gfx-gma-power_and_clocks.adb
index e2a6b51..e719ba5 100644
--- a/common/broxton/hw-gfx-gma-power_and_clocks.adb
+++ b/common/broxton/hw-gfx-gma-power_and_clocks.adb
@@ -318,8 +318,8 @@
          PD_Off (PD);
       end loop;
 
-      Unset_Mask (DBUF_CTL, DBUF_CTL_DBUF_POWER_REQUEST);
-      Wait_Unset_Mask (DBUF_CTL, DBUF_CTL_DBUF_POWER_STATE);
+      Unset_Mask (DBUF_CTL_S0, DBUF_CTL_DBUF_POWER_REQUEST);
+      Wait_Unset_Mask (DBUF_CTL_S0, DBUF_CTL_DBUF_POWER_STATE);
 
       -- Linux' i915 never keeps the PLL disabled but runs it
       -- at a "ratio" of 0 with CDClk at its reference clock.
@@ -342,8 +342,8 @@
       Get_Cur_CDClk (Config.CDClk);
       Set_CDClk (Config.Default_CDClk_Freq);
 
-      Set_Mask (DBUF_CTL, DBUF_CTL_DBUF_POWER_REQUEST);
-      Wait_Set_Mask (DBUF_CTL, DBUF_CTL_DBUF_POWER_STATE);
+      Set_Mask (DBUF_CTL_S0, DBUF_CTL_DBUF_POWER_REQUEST);
+      Wait_Set_Mask (DBUF_CTL_S0, DBUF_CTL_DBUF_POWER_STATE);
 
       Config.Raw_Clock := Config.Default_RawClk_Freq;
    end Initialize;