)]}'
{
  "commit": "b47a5c479358a4cecf2589295b37954edd1e36e5",
  "tree": "8a84cb4ae9f3f8384e233c61eeb1de6c32b3d423",
  "parents": [
    "07ff1b95bb1db12cc3d01e3f542338d25eb2dbf3"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sun Sep 29 00:07:21 2019 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Fri Oct 18 12:19:16 2019 +0000"
  },
  "message": "gma g45: Read CDClk and calculate dot-clock limits\n\nNumbers are taken from `intel_cdclk.c` of Linux\u0027 i915 driver.\n\nWe introduce three new procedures to the `Power_And_Clocks` interface:\n\n  o Limit_Dotclocks() limits the dot clocks of all pipe configs\n    according to the maximum supported CDClk. It also reports if\n    CDClk has to be switched for these configs.\n\n  o Update_CDClk() performs the CDClk switch if necessary. It may\n    further limit the dot clocks if the switch didn\u0027t succeed.\n\n  o Enable_CDClk() ensures that the CDClk is running. This may be\n    necessary to probe for DP displays when no pipes are active.\n\nThe latter two are no-ops for G45, as the CDClk runs at a fixed rate.\nDot clocks are limited to 90% of CDClk.\n\nChange-Id: Ie50c0f8f51b3a0a6ed58c6461069c556cc92f51e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/libgfxinit/+/35715\nReviewed-by: Matt DeVillier \u003cmatt.devillier@gmail.com\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n",
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