)]}'
{
  "commit": "b03c8f19ae0d7e1f9f27ff258e72a37dfb87f323",
  "tree": "4406950a9497d0683687521c760430a02d907663",
  "parents": [
    "51375ad75a99d395f3843e46783c0743b5fea29b"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.huber@secunet.com",
    "time": "Fri Aug 25 13:29:08 2017 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Tue Dec 12 14:25:56 2017 +0000"
  },
  "message": "gma registers: Add procedures to set fence registers\n\nThrough fence registers, we can tell the hardware which parts of the\naperture cover tiled framebuffers. Only legacy X and Y tiling is sup-\nported. According to `i915_reg.h` there are 16 fence registers from\nG4x on and 32 from Ivy Bridge on (this only partially matches docu-\nmentation: Haswell has 16 regs documented and the fence registers\nwere not documented at all before).\n\nChange-Id: I02edc99b315e24dc175c6f93aff627e59cb1ff0b\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/22708\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\n",
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