)]}'
{
  "commit": "afadcace9e96289e3aff808c4fac5830c11bdc6c",
  "tree": "9cb10bccb194c7504a14c6f7e6f7fd7d97d3e0e6",
  "parents": [
    "4b0239f549c99b1c393f099fe21c7055860fbe7a"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.huber@secunet.com",
    "time": "Wed Feb 08 13:41:38 2017 +0100"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sat Jun 03 15:23:51 2017 +0200"
  },
  "message": "gma broxton: Implement pre-PLL setup for DDI PHYs\n\nSome lane configuration that\u0027s supposed to happen before enabling\nthe display PLL.\n\nChange-Id: I08ec3ac26164061b19d695ab600d6bb9eeadd7ad\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/18424\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n",
  "tree_diff": [
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}