tree 6181e69238840704e1370e005ddca3ee7e1f1d4d
parent f54d0962018b0443973f84e525e0d112ce956800
author Nico Huber <nico.huber@secunet.com> 1476968626 +0200
committer Nico Huber <nico.h@gmx.de> 1477696989 +0200

gma dp aux: Program 2x bit clock divider

This setting exists for any platform before Skylake. Some have sane
defaults after reset, some don't. So we always set the correct divisor.

This makes external DP output work with coreboot on Ivy Bridge.

Change-Id: I91d8030a985cc35c7cf826c0276753137b5d6b77
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/17072
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>