diff --git a/common/tigerlake/Makefile.inc b/common/tigerlake/Makefile.inc
index 3d42b28..fcc4c24 100644
--- a/common/tigerlake/Makefile.inc
+++ b/common/tigerlake/Makefile.inc
@@ -23,5 +23,7 @@
 gfxinit-y += tgl/hw-gfx-gma-power_domains.ads
 gfxinit-y += tgl/hw-gfx-gma-connectors-tc-ownership.adb
 else ifneq ($(filter AlderlakeP,$(CONFIG_GFX_GMA_GENERATION)),)
+gfxinit-y += xelpd/hw-gfx-gma-power_domains.adb
+gfxinit-y += xelpd/hw-gfx-gma-power_domains.ads
 gfxinit-y += xelpd/hw-gfx-gma-connectors-tc-ownership.adb
 endif
diff --git a/common/tigerlake/xelpd/hw-gfx-gma-power_domains.adb b/common/tigerlake/xelpd/hw-gfx-gma-power_domains.adb
new file mode 100644
index 0000000..878f6f5
--- /dev/null
+++ b/common/tigerlake/xelpd/hw-gfx-gma-power_domains.adb
@@ -0,0 +1,99 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+
+with GNAT.Source_Info;
+with HW.Debug;
+with HW.GFX.GMA.Config_Helpers;
+with HW.GFX.GMA.Connectors.TC.Ownership;
+with HW.GFX.GMA.Power_Domains_Common;
+use HW.GFX.GMA.Power_Domains_Common;
+
+package body HW.GFX.GMA.Power_Domains is
+
+   function Need_PW (PW : Dynamic_Well; Configs : Pipe_Configs) return Boolean
+   is
+      function Any_PW2_Combo_Port return Boolean is
+        (for some Pipe in Pipe_Index =>
+            Configs (Pipe).Port /= Disabled and then
+            Config_Helpers.To_GPU_Port (Pipe, Configs (Pipe).Port) in DIGI_C .. DIGI_E);
+
+      function Any_TC_Port return Boolean is
+        (for some Pipe in Pipe_Index =>
+            Configs (Pipe).Port /= Disabled and then
+            Config_Helpers.To_GPU_Port (Pipe, Configs (Pipe).Port) in USBC_Port);
+
+      function Any_Pipe_From (First : Pipe_Index) return Boolean is
+        (for some Pipe in First .. Pipe_Index'Last => Configs (Pipe).Port /= Disabled);
+
+      function VGA return Boolean is
+        (Configs (Primary).Framebuffer.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET);
+   begin
+      case PW is
+         when PW2 =>
+            return Any_Pipe_From (Secondary) or Any_PW2_Combo_Port or Any_TC_Port or VGA;
+         when PWA =>
+            return Configs (Primary).Port /= Disabled;
+         when PWB =>
+            return Configs (Secondary).Port /= Disabled;
+         when PWC =>
+            return Configs (Tertiary).Port /= Disabled;
+         when PWD =>
+            return False;  -- Fourth pipe not supported yet.
+      end case;
+   end Need_PW;
+
+   procedure Power_Up (Port : Active_Port_Type; Success : out Boolean)
+   is
+      GPU_Port : constant GMA.GPU_Port :=
+         Config_Helpers.To_GPU_Port (Pipe_Index'First, Port);
+
+      procedure On (Aux : AUX_Domain; DDI : DDI_Domain) is
+      begin
+         PD_On (PW1);
+         if DDI in DDI_PW2_Domain then
+            PD_On (PW2);
+         end if;
+         PD_On (DDI);
+
+         if GPU_Port in USBC_Port then
+            Connectors.TC.Ownership.Claim
+              (Port     => GPU_Port,
+               DP_Alt   => Port in Physical_USBC_Ports,
+               Success  => Success);
+            if not Success then
+               return;
+            end if;
+         end if;
+         PD_On (Aux);
+
+         Success := True;
+      end On;
+   begin
+      pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+
+      case GPU_Port is
+         when GMA.DIGI_A   => On (AUX_A, DDI_A);
+         when GMA.DIGI_B   => On (AUX_B, DDI_B);
+         when GMA.DIGI_C   => On (AUX_C, DDI_C);
+         when GMA.DIGI_D   => On (AUX_D, DDI_D);
+         when GMA.DIGI_E   => On (AUX_E, DDI_E);
+         when GMA.DDI_TC1  => On (AUX_USBC1, DDI_USBC1);
+         when GMA.DDI_TC2  => On (AUX_USBC2, DDI_USBC2);
+         when GMA.DDI_TC3  => On (AUX_USBC3, DDI_USBC3);
+         when GMA.DDI_TC4  => On (AUX_USBC4, DDI_USBC4);
+         when others       => Success := True;
+      end case;
+   end Power_Up;
+
+end HW.GFX.GMA.Power_Domains;
diff --git a/common/tigerlake/xelpd/hw-gfx-gma-power_domains.ads b/common/tigerlake/xelpd/hw-gfx-gma-power_domains.ads
new file mode 100644
index 0000000..3a504e2
--- /dev/null
+++ b/common/tigerlake/xelpd/hw-gfx-gma-power_domains.ads
@@ -0,0 +1,90 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+
+private package HW.GFX.GMA.Power_Domains is
+
+   -- Comment lifted from i915:
+   -- XE_LPD Power Domains
+   --
+   -- Previous platforms required that PW(n-1) be enabled before PW(n).  That
+   -- dependency chain turns into a dependency tree on XE_LPD:
+   --
+   --       PW0
+   --        |
+   --     --PW1--
+   --    /       \
+   --  PWA     --PW2--
+   --         /   |   \
+   --       PWB  PWC  PWD
+   --
+   -- Power wells must be enabled from top to bottom and disabled from bottom
+   -- to top.  This allows pipes to be power gated independently.
+
+   type Power_Domain is
+     (PW1, PWA, PW2, PWB, PWC, PWD,
+      -- order matters, bit positions for D & E replace USBC5 & 6 from TGL:
+      AUX_A, AUX_B, AUX_C, AUX_USBC1, AUX_USBC2, AUX_USBC3, AUX_USBC4, AUX_D, AUX_E,
+      DDI_A, DDI_B, DDI_C, DDI_USBC1, DDI_USBC2, DDI_USBC3, DDI_USBC4, DDI_D, DDI_E);
+   subtype Dynamic_Domain  is Power_Domain range PWA .. DDI_E;
+   subtype PW_Domain       is Power_Domain range PW1 .. PWD;
+   subtype Dynamic_Well    is Power_Domain range PWA .. PWD;
+   subtype Port_Domain     is Power_Domain range AUX_A .. DDI_E;
+   subtype DDI_Domain      is Power_Domain range DDI_A .. DDI_E;
+   subtype DDI_PW2_Domain  is Power_Domain range DDI_C .. DDI_E;
+   subtype DDI_USBC_Domain is Power_Domain range DDI_USBC1 .. DDI_USBC4;
+   subtype AUX_Domain      is Power_Domain range AUX_A .. AUX_E;
+   subtype AUX_USBC_Domain is Power_Domain range AUX_USBC1 .. AUX_USBC4;
+
+   ----------------------------------------------------------------------------
+
+   FUSE_STATUS_PGx_DIST_STATUS : constant array (PW_Domain) of Word32 :=
+     (PW1   => 1 * 2 ** 26,
+      PW2   => 1 * 2 ** 25,
+      PWA   => 1 * 2 ** 21,
+      PWB   => 1 * 2 ** 20,
+      PWC   => 1 * 2 ** 19,
+      PWD   => 1 * 2 ** 18);
+
+   ----------------------------------------------------------------------------
+
+   PW_State_Mask : constant array (PW_Domain) of Word32 :=
+     (PW1 => 1 * 2 **  0,
+      PW2 => 1 * 2 **  2,
+      PWA => 1 * 2 ** 10,
+      PWB => 1 * 2 ** 12,
+      PWC => 1 * 2 ** 14,
+      PWD => 1 * 2 ** 16);
+
+   ----------------------------------------------------------------------------
+
+   function To_GPU_Port (PD : Port_Domain) return GPU_Port
+   is
+     (case PD is
+         when DDI_A | AUX_A         => DIGI_A,
+         when DDI_B | AUX_B         => DIGI_B,
+         when DDI_C | AUX_C         => DIGI_C,
+         when DDI_D | AUX_D         => DIGI_D,
+         when DDI_E | AUX_E         => DIGI_E,
+         when DDI_USBC1 | AUX_USBC1 => DDI_TC1,
+         when DDI_USBC2 | AUX_USBC2 => DDI_TC2,
+         when DDI_USBC3 | AUX_USBC3 => DDI_TC3,
+         when DDI_USBC4 | AUX_USBC4 => DDI_TC4);
+
+   ----------------------------------------------------------------------------
+
+   function Need_PW (PW : Dynamic_Well; Configs : Pipe_Configs) return Boolean;
+
+   procedure Power_Up (Port : Active_Port_Type; Success : out Boolean);
+
+end HW.GFX.GMA.Power_Domains;