gma: Add Intel i945 (Gen3) graphics init support
Add i945G (desktop) and i945GM (mobile) generation support, modeled
after the existing G45 generation code with hardware-specific
adaptations based on the Linux i915 DRM driver and coreboot.
Key hardware differences from G45 (Gen4):
- GTT on separate PCI BAR3 (not within BAR0)
- Simple 32-bit GTT PTEs (addr[31:12] | valid[0])
- No DSPSURF register (uses DSPADDR/DSPLINOFF instead)
- Gen3 fence registers: 32-bit at split 0x2000/0x3000 addresses
- Different PLL limits (VCO 1400-2800 MHz, 96 MHz refclk)
- SDVO multiplier in DPLL register bits[7:4]
- LVDS restricted to Pipe B (pre-i965 requirement)
- CDClk: fixed 400 MHz (desktop) or GCFGC-based (mobile)
- No HDMI/DP, only VGA, LVDS, and SDVO outputs
- PCI IDs: 0x2772 (I945G), 0x27a2/0x27ae (I945GM)
TESTED with thinkpad x60: LVDS & VGA works with a linear framebuffer.
Change-Id: Ib67b3d0ee5e06df427869dce4db926ba57a80fd8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.sourcearcade.org/c/libgfxinit/+/476
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: Nico Huber <nico.h@gmx.de>
diff --git a/common/i945/hw-gfx-gma-gmch-vga.adb b/common/i945/hw-gfx-gma-gmch-vga.adb
new file mode 100644
index 0000000..1a43b64
--- /dev/null
+++ b/common/i945/hw-gfx-gma-gmch-vga.adb
@@ -0,0 +1,80 @@
+--
+-- Copyright (C) 2026 Arthur Heymans <arthur@aheymans.xyz>
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+with HW.GFX.GMA.Config;
+with HW.GFX.GMA.Registers;
+
+with HW.Debug;
+with GNAT.Source_Info;
+
+use type HW.Word64;
+
+package body HW.GFX.GMA.GMCH.VGA is
+
+ ADPA_DAC_ENABLE : constant := 1 * 2 ** 31;
+ ADPA_USE_VGA_HVPOLARITY : constant := 1 * 2 ** 15;
+ ADPA_VSYNC_DISABLE : constant := 1 * 2 ** 11;
+ ADPA_HSYNC_DISABLE : constant := 1 * 2 ** 10;
+ ADPA_VSYNC_ACTIVE_HIGH : constant := 1 * 2 ** 4;
+ ADPA_HSYNC_ACTIVE_HIGH : constant := 1 * 2 ** 3;
+
+ ADPA_MASK : constant Word32 :=
+ GMCH_PORT_PIPE_SELECT_MASK or
+ ADPA_DAC_ENABLE or
+ ADPA_VSYNC_DISABLE or
+ ADPA_HSYNC_DISABLE or
+ ADPA_VSYNC_ACTIVE_HIGH or
+ ADPA_HSYNC_ACTIVE_HIGH or
+ ADPA_USE_VGA_HVPOLARITY;
+
+ ----------------------------------------------------------------------------
+
+ procedure On
+ (Pipe : Pipe_Index;
+ Mode : in Mode_Type)
+ is
+ Polarity : Word32 := 0;
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+
+ if Mode.H_Sync_Active_High then
+ Polarity := Polarity or ADPA_HSYNC_ACTIVE_HIGH;
+ end if;
+ if Mode.V_Sync_Active_High then
+ Polarity := Polarity or ADPA_VSYNC_ACTIVE_HIGH;
+ end if;
+
+ Registers.Unset_And_Set_Mask
+ (Register => Registers.GMCH_ADPA,
+ Mask_Unset => ADPA_MASK,
+ Mask_Set => ADPA_DAC_ENABLE or
+ GMCH_PORT_PIPE_SELECT (Pipe) or
+ Polarity);
+ end On;
+
+ ----------------------------------------------------------------------------
+
+ procedure Off
+ is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+
+ Registers.Unset_And_Set_Mask
+ (Register => Registers.GMCH_ADPA,
+ Mask_Unset => ADPA_DAC_ENABLE,
+ Mask_Set => ADPA_HSYNC_DISABLE or
+ ADPA_VSYNC_DISABLE);
+ end Off;
+
+end HW.GFX.GMA.GMCH.VGA;