commit 8beafd74958561988d29ba0897e057d4f3204a27
author Nico Huber <nico.huber@secunet.com> Tue Jan 07 14:59:44 2020 +0100
committer Nico Huber <nico.h@gmx.de> Thu Mar 05 15:12:05 2020 +0000
tree 1676c1e615c4714b9c2394ffd8bf1260ed73b7da
parent fe7985f2a0692bc773d470a92ec54d22d3c12e4b

gma: Split `Internal` port type into `eDP` & `LVDS`

We used to have a single type `Internal`, in the GMA interface, to
represent the port for any internal panel. This seemed suitable as
all mainboard targets used the additional panel logic (power se-
quencing, backlight) only with either one of the eDP and LVDS ports.

However, the hardware allows to combine the panel logic also with
other ports. And some of the regular DP ports are even mentioned as
alternatives to the dedicated eDP port.

As a first step towards supporting such less common combinations,
we get rid of the single `Internal` type. All the panel logic still
assumes that either the dedicated eDP or the LVDS port is used for
an internal display. We introduce `Internal_Port_Type` to represent
eDP and LVDS, for this. But it should vanish, once the panel logic
is adapted.

Change-Id: Iadf3c11bd35d085cf47a961e800b0d96b79f62f5
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/libgfxinit/+/38239
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: Nico Huber <nico.h@gmx.de>

common/ironlake/hw-gfx-gma-port_detect.adb

diff --git a/common/ironlake/hw-gfx-gma-port_detect.adb b/common/ironlake/hw-gfx-gma-port_detect.adb
index 5af2e84..7efadeb 100644
--- a/common/ironlake/hw-gfx-gma-port_detect.adb
+++ b/common/ironlake/hw-gfx-gma-port_detect.adb
@@ -55,7 +55,8 @@
 
    procedure Initialize
    is
-      Internal_Detected,
+      LVDS_Detected,
+      eDP_Detected,
       HDMI_Detected,
       DP_Detected : Boolean;
 
@@ -71,23 +72,19 @@
    begin
       Config.Valid_Port (Analog) := True;
 
-      case Config.Internal_Display is
-         when LVDS =>
-            -- PCH_LVDS
-            Registers.Is_Set_Mask
-              (Register => Registers.PCH_LVDS,
-               Mask     => PCH_LVDS_PORT_DETECTED,
-               Result   => Internal_Detected);
-         when DP =>
-            -- eDP
-            Registers.Is_Set_Mask
-              (Register => Registers.DP_CTL_A,
-               Mask     => DP_PORT_DETECTED,
-               Result   => Internal_Detected);
-         when None =>
-            Internal_Detected := False;
-      end case;
-      Config.Valid_Port (Internal) := Internal_Detected;
+      -- PCH_LVDS
+      Registers.Is_Set_Mask
+        (Register => Registers.PCH_LVDS,
+         Mask     => PCH_LVDS_PORT_DETECTED,
+         Result   => LVDS_Detected);
+      Config.Valid_Port (LVDS) := LVDS_Detected;
+
+      -- eDP
+      Registers.Is_Set_Mask
+        (Register => Registers.DP_CTL_A,
+         Mask     => DP_PORT_DETECTED,
+         Result   => eDP_Detected);
+      Config.Valid_Port (eDP) := eDP_Detected;
 
       -- PCH_HDMI_[BCD], PCH_DP_[BCD] share hotplug registers
       for PCH_Port in PCH_HDMI_Port loop

common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb

diff --git a/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb b/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb
index 42aabbd..9bc5544 100644
--- a/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb
+++ b/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb
@@ -42,7 +42,7 @@
                      PCH_DREF_CONTROL_120MHZ_SSC_MODULATION_EN);
       Registers.Posting_Read (Registers.PCH_DREF_CONTROL);
       Time.U_Delay (1);
-      if Config.Internal_Is_EDP then   -- TODO: check for presence
+      if Config.Valid_Port (eDP) then
          -- always use spread spectrum clock for CPU output
          Registers.Set_Mask
            (Register => Registers.PCH_DREF_CONTROL,