tree e91813715de2c0454983cc5a31e7b07fb99eccdc
parent 6b4678d6aad8c9025c6e5b649a6af36cfe0b3d61
author Nico Huber <nico.h@gmx.de> 1569180712 +0200
committer Nico Huber <nico.h@gmx.de> 1571402234 +0000

gma bxt: Implement CDClk switching

Again, very similar procedure to the previous generations. The
CDClk is limited to 624MHz (no fuses). Dot clocks can run at the
full CDClk speed.

If all pipes are disabled, we set CDClk to its reference rate.
In this state, the display engine is not operational and neither
are the DP Aux ports. So we have to implement Enable_CDClk() to
allow display probing without any pipe enabled.

Change-Id: I7bccbce0625a9893e2dd5c06fd1475a44987989d
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/libgfxinit/+/35718
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>