)]}'
{
  "commit": "8469b0089aa06fe196e23a2853d81d661cd21de8",
  "tree": "e91813715de2c0454983cc5a31e7b07fb99eccdc",
  "parents": [
    "6b4678d6aad8c9025c6e5b649a6af36cfe0b3d61"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sun Sep 22 21:31:52 2019 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Fri Oct 18 12:37:14 2019 +0000"
  },
  "message": "gma bxt: Implement CDClk switching\n\nAgain, very similar procedure to the previous generations. The\nCDClk is limited to 624MHz (no fuses). Dot clocks can run at the\nfull CDClk speed.\n\nIf all pipes are disabled, we set CDClk to its reference rate.\nIn this state, the display engine is not operational and neither\nare the DP Aux ports. So we have to implement Enable_CDClk() to\nallow display probing without any pipe enabled.\n\nChange-Id: I7bccbce0625a9893e2dd5c06fd1475a44987989d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/libgfxinit/+/35718\nReviewed-by: Matt DeVillier \u003cmatt.devillier@gmail.com\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "77f6b359a0fcf5a4485dcbd695f6d8ea5633c030",
      "old_mode": 33188,
      "old_path": "common/broxton/hw-gfx-gma-power_and_clocks.adb",
      "new_id": "fe10208e167627693b5039e569b2828539f14948",
      "new_mode": 33188,
      "new_path": "common/broxton/hw-gfx-gma-power_and_clocks.adb"
    },
    {
      "type": "modify",
      "old_id": "86961f63c3ebde2ed463b1139fd22a604523efe8",
      "old_mode": 33188,
      "old_path": "common/broxton/hw-gfx-gma-power_and_clocks.ads",
      "new_id": "36b145c88478b3e14183124f23678d1e4bd75e2c",
      "new_mode": 33188,
      "new_path": "common/broxton/hw-gfx-gma-power_and_clocks.ads"
    }
  ]
}