tree 52eaaf46d8a2ef645b7daa6b69e28af50073a815
parent dea094a0d99df9216e94413aaaa79e20355a2cdc
author Nico Huber <nico.h@gmx.de> 1724796209 +0200
committer Nico Huber <nico.h@gmx.de> 1785406342 +0000

gma adl: Add missing Alder Lake TC bits

Add some missing ADL-P handling and workarounds for TC ports.

* Ownership is handled in DDI_BUF_CTL (Need_TC_PHY_Ownership).
* Additional "Loadgen" selection is needed in DKL PHY
  configuration (Need_TC_Loadgen_Select).
* Explicit blocking of TC cold state is not needed (Block_TC_Cold).
* A workaround is needed to avoid PHYs hanging when switching from
  TBT mode to DP-alt/legacy mode (Need_TBT_DP_Alt_Switch_Wa).

This is based on work by several authors that was originally
squashed into another commit:
https://review.coreboot.org/c/libgfxinit/+/67801/

Change-Id: I32fd558c27f4f9658aea799f1b6c679be4d31feb
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/libgfxinit/+/507
Reviewed-by: Thomas Heijligen <src@posteo.de>
Tested-by: Ada SPARK <gnatbot@sourcearcade.org>