gma adl: Add missing Alder Lake TC bits
Add some missing ADL-P handling and workarounds for TC ports.
* Ownership is handled in DDI_BUF_CTL (Need_TC_PHY_Ownership).
* Additional "Loadgen" selection is needed in DKL PHY
configuration (Need_TC_Loadgen_Select).
* Explicit blocking of TC cold state is not needed (Block_TC_Cold).
* A workaround is needed to avoid PHYs hanging when switching from
TBT mode to DP-alt/legacy mode (Need_TBT_DP_Alt_Switch_Wa).
This is based on work by several authors that was originally
squashed into another commit:
https://review.coreboot.org/c/libgfxinit/+/67801/
Change-Id: I32fd558c27f4f9658aea799f1b6c679be4d31feb
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/libgfxinit/+/507
Reviewed-by: Thomas Heijligen <src@posteo.de>
Tested-by: Ada SPARK <gnatbot@sourcearcade.org>
diff --git a/common/tigerlake/hw-gfx-gma-connectors-tc.ads b/common/tigerlake/hw-gfx-gma-connectors-tc.ads
index 9e637d0..6bebc73 100644
--- a/common/tigerlake/hw-gfx-gma-connectors-tc.ads
+++ b/common/tigerlake/hw-gfx-gma-connectors-tc.ads
@@ -36,7 +36,8 @@
-- And so far, no SKU needs more.
subtype Valid_TC_Port is USBC_Port range DDI_TC1 .. Config.Last_TC_Port;
- type Port_Regs_Array is array (USBC_Port) of Registers.Registers_Index;
+ type Port_Regs_Array is
+ array (USBC_Port) of Registers.Registers_Invalid_Index;
DDI_BUF_CTL_BUFFER_ENABLE : constant := 1 * 2 ** 31;
DDI_BUF_CTL_TRANS_SELECT_MASK : constant := 16#f# * 2 ** 24;