gma adl: Add missing Alder Lake TC bits
Add some missing ADL-P handling and workarounds for TC ports.
* Ownership is handled in DDI_BUF_CTL (Need_TC_PHY_Ownership).
* Additional "Loadgen" selection is needed in DKL PHY
configuration (Need_TC_Loadgen_Select).
* Explicit blocking of TC cold state is not needed (Block_TC_Cold).
* A workaround is needed to avoid PHYs hanging when switching from
TBT mode to DP-alt/legacy mode (Need_TBT_DP_Alt_Switch_Wa).
This is based on work by several authors that was originally
squashed into another commit:
https://review.coreboot.org/c/libgfxinit/+/67801/
Change-Id: I32fd558c27f4f9658aea799f1b6c679be4d31feb
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/libgfxinit/+/507
Reviewed-by: Thomas Heijligen <src@posteo.de>
Tested-by: Ada SPARK <gnatbot@sourcearcade.org>
diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template
index 5801bfe..43c43d5 100644
--- a/common/hw-gfx-gma-config.ads.template
+++ b/common/hw-gfx-gma-config.ads.template
@@ -352,6 +352,10 @@
----------- Type-C: ----------
Has_Type_C_Ports : <genbool> := Tigerlake_On;
+ Need_TC_PHY_Ownership : <genbool> := AlderlakeP_On;
+ Need_TC_Loadgen_Select : <genbool> := AlderlakeP_On;
+ Need_TBT_DP_Alt_Switch_Wa : <genbool> := AlderlakeP_On;
+ Block_TC_Cold : <genbool> := Gen_Tigerlake;
----------- Rawclk -----------
Need_Rawclk_Numerator : <genbool> := Tigerlake_On;