)]}'
{
  "commit": "7edb1a794a8dff028099917979db0f539f054f52",
  "tree": "d9ec6d4f4ef41a61a5c1716f3cc3d5a4eaeb1957",
  "parents": [
    "ab7088683624200265e67b40ac3d27d186ad4108"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Wed May 27 21:10:10 2026 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Thu Jul 30 10:12:22 2026 +0000"
  },
  "message": "gma adl: Add missing Alder Lake power \u0026 clock bits\n\nMost notable changes are:\n* ADL-P has different default CDClk frequency choices.\n* There are new divisors for CDClk:\n  + 3 (resulting in an odd `/ 1.5` for CDClk x2)\n  + and 8.\n* There are four DBUF slices now and we need to enable all of\n  them (probably related to their position and distance to the\n  display pipelines on the MBus).\n* Programming of MBus ABOX credits is not needed anymore\n  (Has_Mbus_Abox_Credits).\n* The MBus configuration allows joining of DBUF slices. We\n  enable this for our simple buffer allocation (Has_Mbus_Joining)\n  (this could use a deeper investigation if we wanted to conserve\n  power).\n\nThis is based on work by several authors that was originally\nsquashed into another commit:\nhttps://review.coreboot.org/c/libgfxinit/+/67801/\n\nChange-Id: I6402b9cdcc3571128d76026aa5c7c1bb48f8df33\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/libgfxinit/+/510\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nTested-by: Ada SPARK \u003cgnatbot@sourcearcade.org\u003e\nReviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\n",
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