hw-gfx-dp_info.adb: Fix reading `Aux_RD_Interval`
Starting with DP v1.4, the definition of DPCD address 0xe was updated
to include a new field. Bit 7 now indicates whether a DP receiver has
an Extended Receiver Capability field, so `Aux_RD_Interval` is now in
bits 6:0. This change is backwards compatible with older hardware, as
the defined values for `Aux_RD_Interval` range from 0 to 4, and bit 7
is always zero.
However, libgfxinit does not make sure the value is valid before using
it in calculations, so the `EQ_Delay` function may return an extremely
large value if bit 7 is set. To avoid this, add some masks to properly
obtain the value for `Aux_RD_Interval`.
Change-Id: If22d8dbc0517daeaa043ede30bf69e7a65ab154b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/libgfxinit/+/67445
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Tested-by: Nico Huber <nico.h@gmx.de>
diff --git a/common/hw-gfx-dp_info.adb b/common/hw-gfx-dp_info.adb
index bf09933..392fee1 100644
--- a/common/hw-gfx-dp_info.adb
+++ b/common/hw-gfx-dp_info.adb
@@ -72,7 +72,7 @@
Link.Receiver_Caps.TPS3_Supported := (Data (2) and 16#40#) /= 0;
Link.Receiver_Caps.Enhanced_Framing := (Data (2) and 16#80#) /= 0;
Link.Receiver_Caps.No_Aux_Handshake := (Data (3) and 16#40#) /= 0;
- Link.Receiver_Caps.Aux_RD_Interval := Data (14);
+ Link.Receiver_Caps.Aux_RD_Interval := Data (14) and 16#7f#;
pragma Debug (Debug.New_Line);
pragma Debug (Debug.Put_Line ("DPCD:"));
@@ -82,7 +82,7 @@
pragma Debug (Debug.Put_Reg8 (" TPS3_Supported ", Data (2) and 16#40#));
pragma Debug (Debug.Put_Reg8 (" Enhanced_Framing", Data (2) and 16#80#));
pragma Debug (Debug.Put_Reg8 (" No_Aux_Handshake", Data (3) and 16#40#));
- pragma Debug (Debug.Put_Reg8 (" Aux_RD_Interval ", Data (14)));
+ pragma Debug (Debug.Put_Reg8 (" Aux_RD_Interval ", Data (14) and 16#7f#));
pragma Debug (Debug.New_Line);
end if;
end Read_Caps;