tree 4af44476b1e10532535acc0c38c6552efc112bd8
parent 3f37cce66ef8b36932db08a1fb5e6486647da308
author Matt DeVillier <matt.devillier@gmail.com> 1783353894 -0500
committer Nico Huber <nico.h@gmx.de> 1783509729 +0000

gma/Ironlake: Read eDP presence from hardware before ref clock setup

Commit 1b99185ac327 ("gma: Do detection and connectors init after
`All_Off'") moved Port_Detect.Initialize after
Power_And_Clocks.Initialize for all platforms. On Ironlake,
Power_And_Clocks.Initialize gates eDP ref clock setup on
Valid_Port(eDP) from port detect, so the reorder skipped that setup
and broke eDP on all boards using the Ironlake profile (including
IvyBridge).

Fix this by reading DP_CTL_A bit 2 directly, as Port_Detect does,
instead of calling Valid_Port(eDP).

Tested google/link (IVB), verify display init working.

Change-Id: Ie02afdbf3348566edb5ba3eb5e1717e09e47765a
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.sourcearcade.org/c/libgfxinit/+/557
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: Nico Huber <nico.h@gmx.de>