commit 565f33b23e3e8e223702d07d768f9f2a11dd5686
author Nico Huber <nico.huber@secunet.com> Mon Jun 04 14:42:13 2018 +0200
committer Nico Huber <nico.h@gmx.de> Fri Jun 08 14:44:09 2018 +0000
tree 895232e2b13e52bc62eed99a3d2aacff96e1a7a0
parent b679013ce61fcfae5e33375cc71a757bfa73eb95

gma broxton: Tighten types to rely less on proof inlining

Change-Id: I2ff61484715461026463be7fbc45c283e75c903b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/26842
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

common/broxton/hw-gfx-gma-plls.adb

diff --git a/common/broxton/hw-gfx-gma-plls.adb b/common/broxton/hw-gfx-gma-plls.adb
index 7da47f2..087ff12 100644
--- a/common/broxton/hw-gfx-gma-plls.adb
+++ b/common/broxton/hw-gfx-gma-plls.adb
@@ -330,7 +330,7 @@
 
    ----------------------------------------------------------------------------
 
-   procedure Program_DPLL (P : T; Clock : Clock_Type)
+   procedure Program_DPLL (P : Valid_PLLs; Clock : Clock_Type)
    is
       PCS : Word32;
    begin

common/broxton/hw-gfx-gma-power_and_clocks.adb

diff --git a/common/broxton/hw-gfx-gma-power_and_clocks.adb b/common/broxton/hw-gfx-gma-power_and_clocks.adb
index c0f3075..8aa9a21 100644
--- a/common/broxton/hw-gfx-gma-power_and_clocks.adb
+++ b/common/broxton/hw-gfx-gma-power_and_clocks.adb
@@ -67,7 +67,7 @@
    CDCLK_CD2X_SSA_PRECHARGE_ENABLE     : constant := 1 * 2 ** 16;
    CDCLK_CTL_CD_FREQ_DECIMAL_MASK      : constant :=     16#7ff#;
 
-   function CDCLK_CTL_CD_FREQ_DECIMAL (Freq : Positive) return Word32 is
+   function CDCLK_CTL_CD_FREQ_DECIMAL (Freq : Frequency_Type) return Word32 is
    begin
       return Word32 (2 * (Freq / 1_000_000 - 1));
    end CDCLK_CTL_CD_FREQ_DECIMAL;
@@ -216,13 +216,13 @@
 
    CDClk_Ref : constant := 19_200_000;
 
-   procedure Set_CDClk (Freq : Positive)
+   procedure Set_CDClk (Freq : Frequency_Type)
    with
       Pre =>
          Freq =   CDClk_Ref or Freq = 144_000_000 or Freq = 288_000_000 or
          Freq = 384_000_000 or Freq = 576_000_000 or Freq = 624_000_000
    is
-      VCO : constant Natural :=
+      VCO : constant Int64 :=
          CDClk_Ref *
            (if Freq = CDClk_Ref then
                0
@@ -312,7 +312,7 @@
       Wait_Set_Mask (FUSE_STATUS, FUSE_STATUS_PG0_DIST_STATUS);
       PW_On (PW1);
 
-      Set_CDClk (Positive (Config.Default_CDClk_Freq));
+      Set_CDClk (Config.Default_CDClk_Freq);
 
       Set_Mask (DBUF_CTL, DBUF_CTL_DBUF_POWER_REQUEST);
       Wait_Set_Mask (DBUF_CTL, DBUF_CTL_DBUF_POWER_STATE);