diff --git a/common/broxton/hw-gfx-gma-power_and_clocks.adb b/common/broxton/hw-gfx-gma-power_and_clocks.adb
index 07f0cc7..e2a6b51 100644
--- a/common/broxton/hw-gfx-gma-power_and_clocks.adb
+++ b/common/broxton/hw-gfx-gma-power_and_clocks.adb
@@ -18,7 +18,7 @@
 with HW.GFX.GMA.Config;
 with HW.GFX.GMA.Registers;
 with HW.GFX.GMA.PCode;
-with HW.GFX.GMA.Power_And_Clocks_Haswell;
+with HW.GFX.GMA.Transcoder;
 with HW.GFX.GMA.DDI_Phy;
 
 use HW.GFX.GMA.Registers;
@@ -307,7 +307,7 @@
    procedure Pre_All_Off is
    begin
       pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
-      Power_And_Clocks_Haswell.PSR_Off;
+      Transcoder.PSR_Off;
    end Pre_All_Off;
 
    procedure Post_All_Off is
diff --git a/common/haswell/Makefile.inc b/common/haswell/Makefile.inc
index a75c189..ef75dc4 100644
--- a/common/haswell/Makefile.inc
+++ b/common/haswell/Makefile.inc
@@ -7,5 +7,7 @@
 gfxinit-y += hw-gfx-gma-plls.adb
 gfxinit-y += hw-gfx-gma-plls.ads
 gfxinit-y += hw-gfx-gma-power_and_clocks.ads
+gfxinit-y += hw-gfx-gma-power_and_clocks_haswell.adb
+gfxinit-y += hw-gfx-gma-power_and_clocks_haswell.ads
 gfxinit-y += hw-gfx-gma-spll.adb
 gfxinit-y += hw-gfx-gma-spll.ads
diff --git a/common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb b/common/haswell/hw-gfx-gma-power_and_clocks_haswell.adb
similarity index 85%
rename from common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb
rename to common/haswell/hw-gfx-gma-power_and_clocks_haswell.adb
index 252074e..e261ace 100644
--- a/common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb
+++ b/common/haswell/hw-gfx-gma-power_and_clocks_haswell.adb
@@ -20,6 +20,7 @@
 with HW.GFX.GMA.Config;
 with HW.GFX.GMA.PCode;
 with HW.GFX.GMA.Registers;
+with HW.GFX.GMA.Transcoder;
 
 package body HW.GFX.GMA.Power_And_Clocks_Haswell is
 
@@ -53,65 +54,11 @@
 
    ----------------------------------------------------------------------------
 
-   SRD_CTL_ENABLE          : constant := 1 * 2 ** 31;
-   SRD_STATUS_STATE_MASK   : constant := 7 * 2 ** 29;
-
-   type Pipe is (EDP, A, B, C);
-   type SRD_Regs is record
-      CTL     : Registers.Registers_Index;
-      STATUS  : Registers.Registers_Index;
-   end record;
-   type SRD_Per_Pipe_Regs is array (Pipe) of SRD_Regs;
-   SRD : constant SRD_Per_Pipe_Regs := SRD_Per_Pipe_Regs'
-     (A     => SRD_Regs'
-        (CTL      => Registers.SRD_CTL_A,
-         STATUS   => Registers.SRD_STATUS_A),
-      B     => SRD_Regs'
-        (CTL      => Registers.SRD_CTL_B,
-         STATUS   => Registers.SRD_STATUS_B),
-      C     => SRD_Regs'
-        (CTL      => Registers.SRD_CTL_C,
-         STATUS   => Registers.SRD_STATUS_C),
-      EDP   => SRD_Regs'
-        (CTL      => Registers.SRD_CTL_EDP,
-         STATUS   => Registers.SRD_STATUS_EDP));
-
-   ----------------------------------------------------------------------------
-
    IPS_CTL_ENABLE          : constant := 1 * 2 ** 31;
    DISPLAY_IPS_CONTROL     : constant := 16#19#;
 
    ----------------------------------------------------------------------------
 
-   procedure PSR_Off
-   is
-      Enabled : Boolean;
-   begin
-      pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
-
-      if Config.Has_Per_Pipe_SRD then
-         for P in Pipe loop
-            Registers.Is_Set_Mask (SRD (P).CTL, SRD_CTL_ENABLE, Enabled);
-            if Enabled then
-               Registers.Unset_Mask (SRD (P).CTL, SRD_CTL_ENABLE);
-               Registers.Wait_Unset_Mask (SRD (P).STATUS, SRD_STATUS_STATE_MASK);
-
-               pragma Debug (Debug.Put_Line ("Disabled PSR."));
-            end if;
-         end loop;
-      else
-         Registers.Is_Set_Mask (Registers.SRD_CTL, SRD_CTL_ENABLE, Enabled);
-         if Enabled then
-            Registers.Unset_Mask (Registers.SRD_CTL, SRD_CTL_ENABLE);
-            Registers.Wait_Unset_Mask (Registers.SRD_STATUS, SRD_STATUS_STATE_MASK);
-
-            pragma Debug (Debug.Put_Line ("Disabled PSR."));
-         end if;
-      end if;
-   end PSR_Off;
-
-   ----------------------------------------------------------------------------
-
    procedure IPS_Off
    is
       Enabled : Boolean;
@@ -218,7 +165,7 @@
    begin
       -- HSW: disable panel self refresh (PSR) on eDP if enabled
          -- wait for PSR idling
-      PSR_Off;
+      Transcoder.PSR_Off;
       IPS_Off;
    end Pre_All_Off;
 
diff --git a/common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.ads b/common/haswell/hw-gfx-gma-power_and_clocks_haswell.ads
similarity index 97%
rename from common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.ads
rename to common/haswell/hw-gfx-gma-power_and_clocks_haswell.ads
index 2762d82..2665122 100644
--- a/common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.ads
+++ b/common/haswell/hw-gfx-gma-power_and_clocks_haswell.ads
@@ -16,8 +16,6 @@
 
 private package HW.GFX.GMA.Power_And_Clocks_Haswell is
 
-   procedure PSR_Off;
-
    procedure Pre_All_Off;
    procedure Post_All_Off is null;
 
diff --git a/common/haswell_shared/Makefile.inc b/common/haswell_shared/Makefile.inc
index c9b7daa..ae7dea0 100644
--- a/common/haswell_shared/Makefile.inc
+++ b/common/haswell_shared/Makefile.inc
@@ -3,5 +3,3 @@
 gfxinit-y += hw-gfx-gma-connectors.adb
 gfxinit-y += hw-gfx-gma-ddi_phy_stub.ads
 gfxinit-y += hw-gfx-gma-port_detect.adb
-gfxinit-y += hw-gfx-gma-power_and_clocks_haswell.adb
-gfxinit-y += hw-gfx-gma-power_and_clocks_haswell.ads
diff --git a/common/hw-gfx-gma-transcoder.adb b/common/hw-gfx-gma-transcoder.adb
index 4970208..9de8230 100644
--- a/common/hw-gfx-gma-transcoder.adb
+++ b/common/hw-gfx-gma-transcoder.adb
@@ -324,4 +324,60 @@
       end if;
    end Clk_Off;
 
+   ----------------------------------------------------------------------------
+
+   SRD_CTL_ENABLE          : constant := 1 * 2 ** 31;
+   SRD_STATUS_STATE_MASK   : constant := 7 * 2 ** 29;
+
+   type SRD_Regs is record
+      CTL     : Registers.Registers_Index;
+      STATUS  : Registers.Registers_Index;
+   end record;
+   type SRD_Per_Pipe_Regs is array (Transcoder_Index) of SRD_Regs;
+
+   SRD : constant SRD_Per_Pipe_Regs := SRD_Per_Pipe_Regs'
+     (Trans_EDP   => SRD_Regs'
+        (CTL      => Registers.SRD_CTL_EDP,
+         STATUS   => Registers.SRD_STATUS_EDP),
+      Trans_A     => SRD_Regs'
+        (CTL      => Registers.SRD_CTL_A,
+         STATUS   => Registers.SRD_STATUS_A),
+      Trans_B     => SRD_Regs'
+        (CTL      => Registers.SRD_CTL_B,
+         STATUS   => Registers.SRD_STATUS_B),
+      Trans_C     => SRD_Regs'
+        (CTL      => Registers.SRD_CTL_C,
+         STATUS   => Registers.SRD_STATUS_C));
+
+   ----------------------------------------------------------------------------
+
+   procedure PSR_Off
+   is
+      Enabled : Boolean;
+   begin
+      pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+
+      if Config.Has_Per_Pipe_SRD then
+         for P in Transcoder_Index loop
+            Registers.Is_Set_Mask (SRD (P).CTL, SRD_CTL_ENABLE, Enabled);
+            if Enabled then
+               Registers.Unset_Mask (SRD (P).CTL, SRD_CTL_ENABLE);
+               Registers.Wait_Unset_Mask (SRD (P).STATUS, SRD_STATUS_STATE_MASK);
+
+               pragma Debug (Debug.Put_Line ("Disabled PSR."));
+            end if;
+         end loop;
+      else
+         Registers.Is_Set_Mask (Registers.SRD_CTL, SRD_CTL_ENABLE, Enabled);
+         if Enabled then
+            Registers.Unset_Mask (Registers.SRD_CTL, SRD_CTL_ENABLE);
+            Registers.Wait_Unset_Mask (Registers.SRD_STATUS, SRD_STATUS_STATE_MASK);
+
+            pragma Debug (Debug.Put_Line ("Disabled PSR."));
+         end if;
+      end if;
+   end PSR_Off;
+
+   ----------------------------------------------------------------------------
+
 end HW.GFX.GMA.Transcoder;
diff --git a/common/hw-gfx-gma-transcoder.ads b/common/hw-gfx-gma-transcoder.ads
index b026933..4a24996 100644
--- a/common/hw-gfx-gma-transcoder.ads
+++ b/common/hw-gfx-gma-transcoder.ads
@@ -28,6 +28,8 @@
    procedure Off (Pipe : Pipe_Index);
    procedure Clk_Off (Pipe : Pipe_Index);
 
+   procedure PSR_Off;
+
    function BPC_Conf (BPC : BPC_Type; Dither : Boolean) return Word32;
 
 private
diff --git a/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb b/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb
index 93d8d18..15ba76c 100644
--- a/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb
+++ b/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb
@@ -19,7 +19,7 @@
 with HW.GFX.GMA.Config;
 with HW.GFX.GMA.Registers;
 with HW.GFX.GMA.PCode;
-with HW.GFX.GMA.Power_And_Clocks_Haswell;
+with HW.GFX.GMA.Transcoder;
 
 use type HW.Word64;
 
@@ -209,7 +209,7 @@
 
    procedure Pre_All_Off is
    begin
-      Power_And_Clocks_Haswell.PSR_Off;
+      Transcoder.PSR_Off;
    end Pre_All_Off;
 
    procedure Post_All_Off is