gma g45: Add support for Intel GM965 (Crestline)
Add GM965 as a new CPU type under the G45 generation. GM965 shares
the GMCH display architecture with G45/GM45 (no PCH, same connector
registers) but differs in PLL limits, VCO/CDClk tables, and register
field encoding.
Key differences from G45/GM45:
- PLL limits: Uses i9xx limits (VCO 1.4-2.8 GHz) instead of g4x
limits. Add I9XX_LVDS_Limits; refactor Calculate_Clock_Parameters
to take Limits as a parameter, with a new Select_Limits function.
- VCO: Uses Crestline (CL) VCO tables with different frequencies
and divisors than GM45's Cantiga (CTG) tables.
- CDClk: GCFGC register decoding uses bits 12:8 minus 1 (3 possible
divisor selections), unlike GM45's single bit 12.
- No native DisplayPort (SDVO B/C only).
- No HD Audio (G4X_AUD_VID_DID reads as 0).
- Has integrated LVDS transmitter (mobile platform).
- PCI IDs: 0x2a02 (I965_GM), 0x2a12 (I965_GME).
All implementation details cross-referenced against the Linux kernel
i915 driver (intel_dpll.c, intel_cdclk.c, intel_display_device.c).
Change-Id: I0d5d698cc1c2aa84778f0fc6c2752cb5ce4f1cb2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.sourcearcade.org/c/libgfxinit/+/499
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: Nico Huber <nico.h@gmx.de>
diff --git a/common/hw-gfx-gma-registers.ads b/common/hw-gfx-gma-registers.ads
index 404dda3..c9454c9 100644
--- a/common/hw-gfx-gma-registers.ads
+++ b/common/hw-gfx-gma-registers.ads
@@ -24,14 +24,6 @@
Initializes => Address_State
is
- MMIO_GTT_32_Size : constant := 16#20_0000#;
- MMIO_GTT_32_Offset : constant := 16#20_0000#;
-
- -- Limit Broadwell+ to 4MiB to have a stable
- -- interface (i.e. same number of entries):
- MMIO_GTT_64_Size : constant := 16#40_0000#;
- MMIO_GTT_64_Offset : constant := 16#80_0000#;
-
type Registers_Invalid_Index is
(Invalid_Register, -- Allow a placeholder when access is not acceptable
@@ -2320,6 +2312,13 @@
Post => True;
pragma Warnings (GNATprove, On, "unused variable ""Verbose""");
+ procedure Read_AUD_VID_DID (Value : out Word32)
+ with
+ Global => (In_Out => Register_State),
+ Depends => ((Value, Register_State) => Register_State),
+ Pre => True,
+ Post => True;
+
procedure Write
(Register : Registers_Index;
Value : Word32)