tree b8cb4de27f1fad5e9e49ef515c2f190213db0bba
parent 8540805c2900f3f7b40dfc2c520d66c96368e0f7
author Nico Huber <nico.huber@secunet.com> 1500468106 +0200
committer Nico Huber <nico.h@gmx.de> 1504106048 +0000

gma skl: Disable DDI clocks on reset path

After reset DPLL_CTRL2 is initialized to 0. Which means some clock
disable bits are not set and might cause some hassle later. Set them
and close the related TODO.

Change-Id: I1a470dff55e317e8119906b3e397f6f2314abcbd
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20648
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>