)]}' { "log": [ { "commit": "fcdab42070697005a8e004d2e6a5a83b81a9e753", "tree": "61e09d51263f4d3347c3cd05918029f0a906a723", "parents": [ "6198fc728c0df56119a9281597f616c6fb1e6af3" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 21 22:39:19 2025 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder/anita: Resolve actual pkgsrc URL with curl\n\nOlder NetBSD releases seem to have problems with the current redirects\non pkgsrc mirrors. So we try to resolve a current, final URL with curl\nand force the scheme back to http.\n\nChange-Id: I0a975a6c7c698eeea6ab0a267b11370e2b3e4770\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/375\n" }, { "commit": "6198fc728c0df56119a9281597f616c6fb1e6af3", "tree": "95db9cd10d2c7281b9f477150216775149061f28", "parents": [ "45a89609f8e7e7b208ec81af913cfbd9349bc11d" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 21 22:35:30 2025 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder/anita: Switch to libftdi1, add libjaylink\n\nWe had the old libftdi (0.x) selected, which is useless to us.\nThe newer libftdi1 is available for x86 at least. Fortunately,\nlibjaylink seems always available.\n\nChange-Id: I423de4bd857b63418c4d0a11f773ce9d7e1fcc42\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/374\n" }, { "commit": "45a89609f8e7e7b208ec81af913cfbd9349bc11d", "tree": "f8144c5f6ebbaade8e38039de127c333ebfedaef", "parents": [ "8eb900e83060ee3902db8bc9e9911a91a6657427" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 21 22:33:31 2025 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder/anita: Drop NetBSD 8.2, 9.3-sparc64; add 10.1-sparc64\n\nChange-Id: I7ee76566c555efeab87d3ca9a60448f717559f97\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/373\n" }, { "commit": "8eb900e83060ee3902db8bc9e9911a91a6657427", "tree": "990a42e37c0cf78d524af649e3911c1ee969e0f8", "parents": [ "19e34a82d21e8539c22716de17945d5082486f68" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 03 22:02:07 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder: By default, build native targets last\n\nThe \"native\" targets don\u0027t require emulation, hence run a lot\nfaster. Testing them last helps to run more in parallel.\n\nChange-Id: I9d6b6cd5d65322e3cbfe60adeb58cef99b246a08\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/372\n" }, { "commit": "19e34a82d21e8539c22716de17945d5082486f68", "tree": "c58e5548eee4e9c9572326b1169b95b5512066e2", "parents": [ "6f04c71ccfbf3e1821829f1e6ebb606bf8658565" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 03 12:04:11 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder: Re-arrange order of test targets\n\nPut slower targets first, so we can parallelize better. AlmaLinux\nlacks `cchache`, hence they are very slow. Also, newer versions\nseem to stress QEMU a lot more (maybe due to more complex instruc-\ntions used?).\n\nChange-Id: Ied30ffb3d17ae78b6a313890548e97a7cad6af90\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/371\n" }, { "commit": "6f04c71ccfbf3e1821829f1e6ebb606bf8658565", "tree": "1fa1d5cd08e546089b3c777ff37638fac4551cc1", "parents": [ "1b20b7f88489ca2582e9b56a6d3241873f1839e9" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Nov 22 12:20:17 2025 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder/ubuntu: Add Resolute Raccoon (26.04) prelim.\n\nChange-Id: Ifb154d11d087a5128121bc9ce2c970f662d9925b\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/370\n" }, { "commit": "1b20b7f88489ca2582e9b56a6d3241873f1839e9", "tree": "8cad7f462cf2afa1e2682f5782079e15e2959a6d", "parents": [ "dc2f156366640ddd55e5c2e298d884fcf6c3d421" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Nov 22 12:19:07 2025 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder/alpine: List arm32 targets with QEMU issues as broken\n\nChange-Id: I82686536127b1db4d42374ca6249030bacc856eb\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/369\n" }, { "commit": "dc2f156366640ddd55e5c2e298d884fcf6c3d421", "tree": "ee269c57dc82fb57fc62facd09c1c991b5753f3e", "parents": [ "4a4b6b5508d4d6e5839ebf71a18842a8c2f87151" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 16 16:44:26 2025 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder/alpine: Fix building images w/o libjaylink\n\nIf not all packages can be installed with an `apk add` command, none\nare. We\u0027d have to run `apk` multiple times. However, `libgpiod` and\n`meson` are available in all used releases now, so we can always\ninstall them.\n\nChange-Id: I992b8f47a6b670a150228417a41281abe14ac27e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/368\n" }, { "commit": "4a4b6b5508d4d6e5839ebf71a18842a8c2f87151", "tree": "01e7d2cc29acc99973a876ce99d4751519d69bbe", "parents": [ "d038ab2abdec1db9f0dabf59987d7f7c3750f23f" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 13:45:00 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder/alpine: Install Clang for select container\n\nThis adds Clang 19 to our build tests.\n\nChange-Id: I5e3648b759a5c9604621c0436036bc91f594960b\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/367\n" }, { "commit": "d038ab2abdec1db9f0dabf59987d7f7c3750f23f", "tree": "83a2afc9561bb294c01fceec7353515e7c1904ef", "parents": [ "16a4a95894d5c4df76c9499b10d43bfd2a69a3e2" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 15:56:22 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder/alpine: Allow to install additional packages\n\nChange-Id: I2639f611880dd66bd54c18e0934bae5f7b14d04e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/366\n" }, { "commit": "16a4a95894d5c4df76c9499b10d43bfd2a69a3e2", "tree": "6ac2aba106d3eeeb085bb5d5b34c4a983dc334dd", "parents": [ "806cfdbb34deec854c549c38a5928875a1753467" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 13:45:00 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder/debian: Install Clang for select containers\n\nThis adds Clang 11 and 14 to our build tests.\n\nChange-Id: I8b3cc241732e2a60ca94bdccda01896cd7bec0c3\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/365\n" }, { "commit": "806cfdbb34deec854c549c38a5928875a1753467", "tree": "a256ee16dabbf5c317061fa54b5a94e7e6e739c8", "parents": [ "c5942ebbf2132cf1961de8c48fa72abed1a6b1e1" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 13:24:10 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder/debian: Allow to install additional packages\n\nChange-Id: I276b2e7da21f934c9e114567a40820f095a7162b\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/364\n" }, { "commit": "c5942ebbf2132cf1961de8c48fa72abed1a6b1e1", "tree": "2b9ff76294e968b13607cc7dc6b905f4d089b966", "parents": [ "3c16b70214123126337de88e5fac4be071b73b2e" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 13:17:58 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder/debian: Use `source\u0027 container instead of remote repo\n\nOlder versions couldn\u0027t be built anymore because they lack modern TLS\nrequired to access sourcearcade.org. Using local repositories avoids\nthe trouble. For the affected, old containers, this also means that\nall revisions to test will have to be available locally.\n\nChange-Id: I551f11590387c5c78ca97e9fa09d156f6049ad0b\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/363\n" }, { "commit": "3c16b70214123126337de88e5fac4be071b73b2e", "tree": "9f130921f1a000df32341ea87958e44fee5b982b", "parents": [ "dea89845c31e86d838c8faedffd82a8c6357f95a" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 16 16:47:39 2025 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder/debian: Drop abandoned targets, add Trixie\n\nBuster is end of life. Bullseye ppc64 and mips also seem abandoned.\n\nChange-Id: Ie1c49319d41e3c9295eb5a176540502136269f48\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/362\n" }, { "commit": "dea89845c31e86d838c8faedffd82a8c6357f95a", "tree": "b71dcbc93249922e34d270c0a4b84d402e2b5b2c", "parents": [ "a26907dc97c35d6e8c40a66542570332e4bf844e" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 13:13:31 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder: Prepare a `source\u0027 container from local repository\n\nClone the local repository into a `mani/source\u0027 container. This can be\ncopied during the build of our test containers, to avoid cloning over\nnetwork.\n\nChange-Id: I28fea93f9f77aa4d41143046081f4c6fd743c12e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/361\n" }, { "commit": "a26907dc97c35d6e8c40a66542570332e4bf844e", "tree": "a2b25123b609b8e7ed97f699b367836a37dd596b", "parents": [ "73bef7225546bd0fd5b64e207c56a68b684037dc" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 16:02:41 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder: Add newest AlmaLinux, Fedora and Alpine versions\n\nChange-Id: Icd66f66e7515ab413f066bfaa2d83f00c39c2144\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/360\n" }, { "commit": "73bef7225546bd0fd5b64e207c56a68b684037dc", "tree": "8082835f056ed483bd46999446ff3f02672e46f6", "parents": [ "c37cf1e15d352c8f91d50ce806c6c474442ecdae" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 16:01:52 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder: Drop old, unsupported Fedora and Alpine versions\n\nChange-Id: I4f6e8df61118c80ae43cd1f918fcc5bc1f81e2d4\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/359\n" }, { "commit": "c37cf1e15d352c8f91d50ce806c6c474442ecdae", "tree": "6ef078696107d07bbeb06c628f0afe4c27918395", "parents": [ "f8785ae185e716d70a40be4fe483e2029d19011f" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 22:01:14 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder: Drop abandoned Dockerfile.centos\n\nChange-Id: I15af6157f49f4a7ce36f53a0d7c47c07474cbd52\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/358\n" }, { "commit": "f8785ae185e716d70a40be4fe483e2029d19011f", "tree": "72c0b951a22d026b4d2876a5f5540def9c7f96e8", "parents": [ "906f693766deaaf8dc028fa722e40e2636ea7acc" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 13:05:34 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "manibuilder: Pass explicit `--plattform\u0027 for official images\n\n`docker build` used to assume the only available platform for images\nfrom the per-architecture repositories (e.g. arm32v7/debian). The new\n`buildx` doesn\u0027t do that anymore. So we\u0027ll pass the platform explicitly.\n\nChange-Id: Ic0f72500d2560c293f0abca7c5f1c2fd3f0bb30e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/357\n" }, { "commit": "906f693766deaaf8dc028fa722e40e2636ea7acc", "tree": "8469c0ff1a53591db58452b16679962bdc01ac19", "parents": [ "9d09e0f18fc48ae0e02ca82c6dba75b5b3a169bb" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 01 16:39:22 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:50:57 2025 +0000" }, "message": "test_build.sh: Re-run tests with `clang` if available\n\nIf ${CC} ends with `cc\u0027, doesn\u0027t look like Clang, and `clang` is\nexecutable, repeat the test run with Clang.\n\nChange-Id: Ib2afe759af9d2077bbacdd98a6a553668f6db5e5\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/356\n" }, { "commit": "9d09e0f18fc48ae0e02ca82c6dba75b5b3a169bb", "tree": "0d093a00f516fae235d57f4573daf38b682c8791", "parents": [ "e82a29bfba789d72c6893eb0109482ce4de5ca67" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 22:55:10 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:20:34 2025 +0000" }, "message": "make/meson: Generate a `version.h\u0027\n\nUsing a header file allows us to keep the version string out of the\ncompiler command line. This should heavily increase direct hits with\nccache. Specifying the compiler argument for a single source file is\nrather clumsy with Meson, hence the more pompous header file.\n\nChange-Id: If6c4e33e4944d2b264252dbcd2fd69ecf7bd8905\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/355\nReviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\n" }, { "commit": "e82a29bfba789d72c6893eb0109482ce4de5ca67", "tree": "96c04143849157f43767f8e8cdd78c242089412f", "parents": [ "dbf50334a199f6721c0c4e4cae8bedfe5d24db76" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 22:52:42 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 17 20:20:34 2025 +0000" }, "message": "meson: Use correct version string for manual pages\n\nThe `version\u0027 variable has the prefix of the Git tag\n(e.g. `v\u0027 or `p\u0027) stripped. So use the full version\nstring instead.\n\nChange-Id: I67fbc3c34d74cf0e1b69545a88636aabc78d8ea7\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/354\nReviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\n" }, { "commit": "dbf50334a199f6721c0c4e4cae8bedfe5d24db76", "tree": "fccfbece9a33da0efd598cc2fa98e9ae33a478c5", "parents": [ "e060018655f802896dc226832d25e223102889c8" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 02 14:02:51 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Dec 09 20:53:39 2025 +0000" }, "message": "linux_mtd: Use sizeof() instead of strlen() on constant string\n\nNewer Clang warns about using strlen() to calculate an array length\n(results in a variable-length array w/o GNU extensions).\n\nChange-Id: I30bef896104b315082d2d74984f3e43557d24656\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/333\nReviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\n" }, { "commit": "e060018655f802896dc226832d25e223102889c8", "tree": "ffb01d5b4cabd734e6676fb48b4e7b87f35a7828", "parents": [ "ff9526b8039e69310d4af13d5d7665b4002d8450" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 01 12:29:28 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 03 16:16:09 2025 +0000" }, "message": "flashchips: Explicitly zero-initialize in .qpi_read_params\n\nThe last number was left out on purpose for GD25LE255E, because the\nsetting is reserved. Clang is picky about this case, though, due to\n`-Wmissing-field-initializers\u0027.\n\nChange-Id: I0a6915d37a4413eecc33ac88d2e20ad6a327cd38\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/332\n" }, { "commit": "ff9526b8039e69310d4af13d5d7665b4002d8450", "tree": "3dd6a2f3ed2804643072cfe8f2a0aca758c92104", "parents": [ "5a72cfb13afacb69a991199d568a5b7e253c6d2a" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Feb 27 21:52:02 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 03 16:16:09 2025 +0000" }, "message": "dediprog: Use dual-i/o default only for SF600Plus-G2\n\nEven with protocol v3, problems have been witnessed with an SF600Plus.\nIt seems we have to test and whitelist programmers individually.\n\nTested with SF600Plus-G2: dual-i/o is still the default.\n\nChange-Id: I435ef44d4461c3ffda8b1e39673e69106a99a23d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/330\n" }, { "commit": "5a72cfb13afacb69a991199d568a5b7e253c6d2a", "tree": "8a70766a62e2181fdaabadc15ae9011e72c5592e", "parents": [ "284d55b9554f14086fdfa94fedac1313a7da3457" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Feb 26 23:47:14 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 03 16:16:09 2025 +0000" }, "message": "flashchips: Fix block-protection bits for 4BA Puya chips\n\nLike many other 4BA chips with \u003e\u003d 32MiB flash space, these chips use\na fourth BP bit to encode the size of the protected area. The TB bit\ntakes the SEC bit\u0027s place, which is sacrificed.\n\nChange-Id: Iac2c817e8650d4d57ff94d41eba49f84cbb66d7d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/329\n" }, { "commit": "284d55b9554f14086fdfa94fedac1313a7da3457", "tree": "108290ef32568b61cc112e5c9dd6f08926a01e6f", "parents": [ "37e07a86a652467c14afaaff08af17da019f2166" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Feb 26 23:37:49 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 03 16:16:09 2025 +0000" }, "message": "flashchips: Add WPS bit description for GD25Q128C\n\nThis seems to be the only GigaDevice chip in our database with\na WPS bit in a regular status register.\n\nChange-Id: If08aa4c4f90291e9b8b975565b5fa808773442bb\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/328\n" }, { "commit": "37e07a86a652467c14afaaff08af17da019f2166", "tree": "8520d91487990da1223ffba9eb1f4714aee0dabb", "parents": [ "3646b18f69a3461bf9353b0dd909fadfdc32f147" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Feb 26 23:26:59 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 03 16:16:09 2025 +0000" }, "message": "flashchips: Add missing QE bit descriptions\n\nWinbond and XTX chips have QE bits. These were missed when adding\nquad-i/o support initially. Found by checking for irregularities\nin chips with quad-i/o support but no `.qe` entry.\n\nChange-Id: Id47e9ac9eb487140340349895f771adbe42c87fd\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/327\n" }, { "commit": "3646b18f69a3461bf9353b0dd909fadfdc32f147", "tree": "6ad6b9cf08961d0b5690e2791f2a16f7b4e3643c", "parents": [ "d4eb532cf1f6370f06761bb89786831587bec117" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 08 23:44:37 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Feb 27 20:58:30 2025 +0000" }, "message": "flashchips: Add GigaDevice GD25LF128E 166MHz, 1.8V part\n\nThis one has dummy-cycles configuration bits that control the\nquad-i/o fast read command. Otherwise it supports the standard\nset of QPI commands and all usual block-protection bits except\nWPS.\n\nDatasheet used:\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230627/DS-00632-GD25LF128E-Rev1.3.pdf\n\nChange-Id: Id43ca44f66002f3038460be2bbf595de31956a51\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/308\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "d4eb532cf1f6370f06761bb89786831587bec117", "tree": "6ed282807c1d1488963ddda99a4cc509e512ebc8", "parents": [ "38d037fc5bf75068c608ef24af5dc9bd26456263" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 08 23:26:04 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Feb 27 20:58:30 2025 +0000" }, "message": "flashchips: Add GigaDevice GD25LF80E..GD25LF64E 166MHz, 1.8V parts\n\nThese chips are supposed to have full QPI support and all known block-\nprotection features except WPS. Only one quirk was found in the data-\nsheets: the fast-read quad-i/o command uses 10 dummy cycles instead of\nthe usual 6.\n\nDatasheets used:\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240914/DS-00678-GD25LF80E-Rev1.2.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230627/DS-00677-GD25LF16E-Rev1.2.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230627/DS-00676-GD25LF32E-Rev1.3.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240729/DS-00636-GD25LF64E-Rev1.4.pdf\n\nChange-Id: I2b57bfdd38f354867aa242d040b17e860c8734f4\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/307\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "38d037fc5bf75068c608ef24af5dc9bd26456263", "tree": "dd8ed6fb6169d4a79e7a9674d58010916497b8b1", "parents": [ "1da029331d6dade08ed181f8b2c87d3cf02a0489" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 08 18:25:55 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Feb 27 20:58:30 2025 +0000" }, "message": "flashchips: Add GigaDevice GD25LB512MF..GD55LB02GF 1.8V parts\n\nAgain, very similar to their 256Mbit counter parts. There are non-\nvolatile dummy-cycle bits that control DIO and QIO commands in the\nSPI mode, hence disable those. QPI works with a set-read-parameters\ncommand, so shouldn\u0027t be affected.\n\nDatasheets used:\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20231213/DS-01012-GD25LB512MF-Rev1.0.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-01017-GD25LR512MF-Rev1.0.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20231213/DS-01013-GD55LB01GF-Rev1.0.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240729/DS-01015-GD55LB02GF-Rev1.1-773.pdf\n\nChange-Id: I5d81bcec3e7c5e4419dceb0fbf2ff60c484decf6\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/306\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "1da029331d6dade08ed181f8b2c87d3cf02a0489", "tree": "7a28ee6f88faf70544015d991e1153e58822aa2b", "parents": [ "6d728e6e148d8e34fccf413849f3eebf79a9965f" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 08 17:56:39 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Feb 27 20:58:30 2025 +0000" }, "message": "flashchips: Add GigaDevice GD25LB512ME..GD55LB02GE 1.8V parts\n\nThe GD25LB512ME shares the ID with GD25LR512ME. All those E versions\nlook much like the 256Mbit GD25LB256E. Copy this and update the sizes.\n\nDatasheets used:\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230627/DS-00580-GD25LB512ME-Rev1.5.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-00621-GD25LR512ME-Rev1.3.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230926/DS-00572-GD55LB01GE-Rev1.4.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230926/DS-00637-GD55LB02GE-Rev1.4.pdf\n\nChange-Id: Ic3ba2a1a7507804f6de611e24606834eb26f19ec\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/305\n" }, { "commit": "6d728e6e148d8e34fccf413849f3eebf79a9965f", "tree": "9479940aa2fe9c9fbdb92c4398b44f6eaaf26b20", "parents": [ "493a4e05a9feae8ace45e25733d25094b024a217" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 08 13:07:52 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Feb 27 20:58:30 2025 +0000" }, "message": "flashchips: Add GigaDevice GD25B512MF..GD55B02GF 3.3V parts\n\nThese F versions seem more regular. Except for a SEC bit, complete\nblock-protection support, and a complete 4BA/QPI command set. How-\never, they also have non-volatile dummy-cycle bits that affect DIO\nand QIO commands in SPI mode.\n\nDatasheets used:\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240412/DS-00975-GD25B512MF-Rev1.1.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-01005-GD25R512MF-Rev1.0.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240412/DS-00979-GD55B01GF-Rev1.1.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240729/DS-00980-GD55B02GF-Rev1.2.pdf\n\nChange-Id: Ia31d3969d5db5ae39dad2d6463456dc7d381ed73\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/300\n" }, { "commit": "493a4e05a9feae8ace45e25733d25094b024a217", "tree": "d7ba157867be69488c212dcc7549ed1271272bf4", "parents": [ "648dfdc9272f02aaca0217fcdab542a10f45476e" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 27 15:15:26 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Feb 27 20:58:30 2025 +0000" }, "message": "flashchips: Update and split GD25Q256D entry\n\nAll these chips support volatile status-register writes. While the\ncommands used by flashprog all seem the same, newer versions with\nthe same ID differ in their status-register layout / features. So\nwe add redundant entries.\n\nDatasheets used:\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00285-GD25Q256D-Rev2.1.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-00406-GD25R256D-Rev1.3.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00327-GD25B256D-Rev1.7.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00398-GD25Q257D-Rev2.0.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00446-GD25B257D-Rev1.3.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00526-GD25Q256E-Rev1.1.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-00750-GD25R256E-Rev1.0.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230627/DS-00658-GD25B256E-Rev1.1.pdf\n\nChange-Id: Iee905ab0d72324a0059505713428555308f90207\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/298\n" }, { "commit": "648dfdc9272f02aaca0217fcdab542a10f45476e", "tree": "023250eb9cd99ffaa07ab8b19bf6ee5b2fd13038", "parents": [ "cfd607d36b8009eb41a7ca8e2a3e96eb9243d37b" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Dec 06 23:00:30 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Feb 24 14:18:46 2025 +0000" }, "message": "spi25: Fix cosmetic debug-print error due to unitialized buffer\n\nspi_prepare_address() expects `cmd_buf[0]` to be filled already,\nfor proper debug prints.\n\nChange-Id: I03b45be7e00d00d37b32553df0991a1b608aae35\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/322\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "cfd607d36b8009eb41a7ca8e2a3e96eb9243d37b", "tree": "a40041ba8bb70562f8fa832e2630171014d3b7d1", "parents": [ "ec287e2f7645220852130f9d68c3969b83992640" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Dec 22 00:25:58 2018 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Feb 24 10:59:09 2025 +0000" }, "message": "layout: Show a warning if no region is included\n\nThis seems better than a plain success message for a (probably\naccidental) no-op run.\n\nChange-Id: I53b749ce42ecc6c267b6cbe71413d536ec3965c5\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/313\nReviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\n" }, { "commit": "ec287e2f7645220852130f9d68c3969b83992640", "tree": "f62b768ee47c76d5678b42ccc757b4cde9fa2f99", "parents": [ "39a4f7d5a0d89494a3ed92ffa07e7a69f755cbdc" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 04 22:43:40 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Feb 24 10:56:47 2025 +0000" }, "message": "ich_descriptors_tool: Change region name EC/BMC -\u003e EC_BMC\n\nThe region names are used to produce file names for extraction.\nThey better not contain any slash.\n\nChange-Id: Id45df466e7a15fac89b8afb390bb21ea6c573d58\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/312\nReviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\n" }, { "commit": "39a4f7d5a0d89494a3ed92ffa07e7a69f755cbdc", "tree": "bff14ca76e24ec28e6cee0c7a4401c3e72404bed", "parents": [ "404529d755d07f450babca258dcff5f85a8713d9" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Dec 04 22:40:37 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Feb 24 10:56:47 2025 +0000" }, "message": "sb600spi: Request more `lspci` details\n\nWhen asking the use for `lspci` output, suggest to use `sudo` and\n`-xxx`. The standard registers dumped with `-x` are not very inte-\nresting, and `-xxx` requires root access.\n\nChange-Id: I7a5bc5eb425542d8109ad504cbf77d33e43459b1\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/311\nReviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\n" }, { "commit": "404529d755d07f450babca258dcff5f85a8713d9", "tree": "d357131655c6ae6e5f14317937b44a10caa8bfea", "parents": [ "fbea0fe4bd35092aee567864653589445edbcdd6" ], "author": { "name": "Nico Huber", "email": "nico.huber@secunet.com", "time": "Thu Jan 30 23:14:14 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Feb 24 08:00:28 2025 +0000" }, "message": "memory_bus.c: Add missing copyright notice\n\nThe logic that was moved into `memory_bus.c` was originally introduced\nby commit 4e32ec19 (Refine physical address mapping of flash chips).\nEverything else is just boiler plate.\n\nChange-Id: Ied2e9ba1f55aa79abe705d6bd5314938e670b1f2\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/319\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "fbea0fe4bd35092aee567864653589445edbcdd6", "tree": "651920682a8bbb4b91eb9967187c4fedf7416b02", "parents": [ "c90d6c425094d39c1bc1114c64e2560acf073412" ], "author": { "name": "Felix Singer", "email": "felixsinger@posteo.net", "time": "Mon Feb 17 21:50:08 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 20:59:56 2025 +0000" }, "message": "udev rules: Restore mode/group configuration\n\nuaccess grants seat sessions access to the devices, but there might be\nrobot-like setups which need access as well. So, restore the mode/group\nconfiguration and grant users in the `plugdev` group read/write\naccess. This does not conflict with uaccess.\n\nChange-Id: Icf3e2582d7c4313b53a946880d1330079b1e0074\nSigned-off-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/320\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "c90d6c425094d39c1bc1114c64e2560acf073412", "tree": "b66c1e54ebd36007afebb90db1b7a8e0d406ff8a", "parents": [ "ee8cf1c9c6218681f78193ba29c890bf9b7ba30a" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 02 23:37:59 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 17:23:14 2025 +0000" }, "message": "flashchips: Add some 25LC series EEPROMs\n\nChange-Id: Iff02282cc1b9e76ce681467fb4b228a7f078b06f\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/316\nReviewed-by: ftr4 ftr4 \u003cftr4@sharklasers.com\u003e\n" }, { "commit": "ee8cf1c9c6218681f78193ba29c890bf9b7ba30a", "tree": "63429fd591599bc1bd63e0007d0f648324f4dd80", "parents": [ "4e6155afd4b0e1f5cf190cdd21fa83a656c4088a" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 02 23:17:25 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 17:23:14 2025 +0000" }, "message": "Provide no-op probe function, always returning 1\n\nChange-Id: Ic0567a0da29790dbde24c432f3f1d4d109156165\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/315\n" }, { "commit": "4e6155afd4b0e1f5cf190cdd21fa83a656c4088a", "tree": "395a5592506087f34ec696887eb965ec335f8b5d", "parents": [ "9512c9c16c73e46b6190c9c9fd9ea0555a4d7e24" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 02 23:05:09 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 17:23:14 2025 +0000" }, "message": "spi25: Add SPI25_EEPROM enum and handle \u003c 3-byte addresses\n\nChange-Id: I043f6ea987a07853b8c50e34b3cd63faf995ecbc\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/314\n" }, { "commit": "9512c9c16c73e46b6190c9c9fd9ea0555a4d7e24", "tree": "64dd2e31837a0feb64034f3404d0d68e2fce9178", "parents": [ "06fbccc61ea5cc8410cb795554dffcfdda111139" ], "author": { "name": "Nico Huber", "email": "nico.huber@secunet.com", "time": "Thu Jan 30 22:38:18 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 17:01:45 2025 +0000" }, "message": "Add missing copyright notices to recently created files\n\nAdd copyright notices for new CLI code (2023), the AMD SPI100\ndriver (2023), and new SPI support code for dual/quad i/o and\nQPI (2024). Initially, some code was moved from `flashprog.c`\ninto `spi25_prepare.c` which dates back to 2017 and 2018.\n\nChange-Id: I980382b8950e2aea6880f4b56df23d4eafc6bb3d\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/318\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "06fbccc61ea5cc8410cb795554dffcfdda111139", "tree": "18bea04deb690c8cad0ff1a77ddadbe1147c5bae", "parents": [ "bc001daac6232df01eb4c20e5b701553bcd22ca5" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 08 17:36:28 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add GigaDevice GD25LB256E 1.8V part\n\nThis chip has WPS and DC bits in unsupported configuration registers.\nHence we can\u0027t support QPI and block protection for now.\n\nDatasheet used:\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230627/DS-00513-GD25LB256E-Rev2.0.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-00573-GD25LR256E-Rev1.6.pdf\n\nChange-Id: I0dab32efab33d34a4c29ca84a5e1e1fe0b408e07\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/304\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "bc001daac6232df01eb4c20e5b701553bcd22ca5", "tree": "d855b3746bce72cb0ff6de98506c687c660ec46b", "parents": [ "7d0f556db8e793df25f54504c6ebfccbcf62f292" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 08 17:11:56 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add some GigaDevice GD25L*256 1.8V parts\n\nHere\u0027s a bunch of chips that all share the same ID. They differ however\nin their block-protection support (which is where we split them), their\nsupport for native 4BA commands, and their logic to configure dummy cy-\ncles in SPI mode.\n\nDatasheets used:\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00301-GD25LQ256D-Rev2.0.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00282-GD25LE256D-Rev1.7.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00314-GD25LB256D-Rev1.4.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240729/DS-00562-GD25LQ255E-Rev1.2.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-01085-GD25LQ256H-Rev1.1.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-01113-GD25LE256H-Rev1.1.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230926/DS-00978-GD25LB256F-Rev1.0.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00619-GD25LE255E-Rev1.2.pdf\n\nChange-Id: Id995c53f371c9b83dabe5fb6f881954a7e7f4f59\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/303\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "7d0f556db8e793df25f54504c6ebfccbcf62f292", "tree": "424f9ca6daba9a658f4a721139221f016a423e3f", "parents": [ "7f8c12d63d214bfd2b3ba841a3e3633ab82d825d" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 08 15:06:22 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Update GigaDevice 1.8V family up to GD25LQ128\n\nThese chips all are supposed to support volatile status-register writes\nand feature the most usual block-protection bits. The 1.695V limit looks\ncertainly like a typo. All datasheets found start at 1.65V.\n\nDatasheets used:\nhttps://treetoptech.com/Resources/Datasheets/GD25LQ32C_Rev1.3.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00230-GD25LQ32D-Rev2.2.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240902/DS-00543-GD25LQ32E-Rev1.6.pdf\nhttps://www.mouser.com/datasheet/2/870/gd25lq64c_rev3_4_20190615-2486443.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240729/DS-00593-GD25LQ64E-Rev1.4.pdf\nhttps://www.tme.com/Document/3677f0b602f733a6800806f5bd7a79f9/gd25lq128c.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00291-GD25LQ128D-Rev1.9.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240729/DS-00533-GD25LQ128E-Rev1.2.pdf\n\nChange-Id: I581c3936fbae43f13b01ebf01bf94e68c3150efd\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/302\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "7f8c12d63d214bfd2b3ba841a3e3633ab82d825d", "tree": "3b0580d5fe3e86efd8381a99d638022aea639990", "parents": [ "565471ce44b21aa39698b0cd876020b9dbacd690" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 08 14:24:14 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add GigaDevice GD25LQ20, update family up to GD25LQ16\n\nThey all are supposed to support volatile status-register writes and\nfeature the most usual block-protection bits. The 1.695V limit looks\ncertainly like a typo. All datasheets found start at 1.65V.\n\nDatasheets used:\nhttps://device.report/m/0dd9581d418568153f88153cd3bd298f85f83fba817fc6b242405e98002f7c44.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00347-GD25LQ20C-Rev1.5.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20221129/DS-00785-GD25LQ20E-Rev1.2.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20221129/DS-00663-GD25LQ40E-Rev1.2.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00405-GD25LQ80C-Rev1.9.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00583-GD25LQ80E-Rev1.3.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00289-GD25LQ16C-Rev2.1.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240902/DS-00576-GD25LQ16E-Rev1.4.pdf\n\nChange-Id: I23b3b199d9c6fd7b42de468cbe8b3945774f15e8\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/301\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "565471ce44b21aa39698b0cd876020b9dbacd690", "tree": "aee9b5c6f67060e8b580fe44d231287794142ae6", "parents": [ "6ee2f8958e20c30d52758d37a41f8f043345d5ff" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 08 13:07:52 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add GigaDevice GD25B512ME..GD55B02GE 3.3V parts\n\nThese E versions have different, peculiar IDs (0x47 prefix) and\ndon\u0027t support dual-output/-io commands. They have special non-\nvolatile dummy-cycle registers, hence we don\u0027t support QPI and\nblock-protection for now.\n\nDatasheets used:\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230321/DS-00649-GD25B512ME-Rev1.6.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-00742-GD25R512ME-Rev1.2.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230321/DS-00650-GD55B01GE-Rev1.4.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230321/DS-00651-GD55B02GE-Rev1.4.pdf\n\nChange-Id: Iffbb5b53383373a5bf677742e2730deaf486883d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/299\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "6ee2f8958e20c30d52758d37a41f8f043345d5ff", "tree": "4564611b4980dbfea1d0bfde6e439e66a6e07cbe", "parents": [ "c230c69c7d4c8403859c4735241158624eade964" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 27 12:15:50 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Update GigaDevice GD25Q/B/R 128Mbit, 3.3V parts\n\nRename and move the GD25B128B/GD25Q128B entry so that it lives closer to\nthe other similar chips (the B version is just a Q with fixed QE\u003d1, thus\nsort it by Q). All the other, newer chips support volatile status regis-\nter writes, however differ in QIO/QPI support. In particular, the newest\nchips have a non-volatile dummy-cycle configuration bit, which we do not\nsupport at the moment.\n\nDatasheets used:\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00220-GD25Q127C-Rev2.3.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-00319-GD25R127D-Rev1.4.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20220714/DS-00277-GD25B127D-Rev1.5.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-00480-GD25Q128E-Rev1.4.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-01121-GD25Q128H-Rev1.1.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-00751-GD25R128E-Rev1.0.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240902/DS-00594-GD25B128E-Rev1.1.pdf\nhttps://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20240902/DS-01137-GD25B128H-Rev1.1.pdf\n\nChange-Id: If2893e59e73d06ecc542c9eb2bb429f2c4e469b9\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/297\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "c230c69c7d4c8403859c4735241158624eade964", "tree": "59154a1fc4d6d3a1295bf176d43ed4a425c43c96", "parents": [ "06e0264aa076bb9359274692850bf9010a1fe5c7" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Oct 26 01:16:23 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add remaining Puya PY25Q..H 3.3V parts\n\nThe remaining chips use 32-bit addresses (4BA). They seem to support\nthe maximum of fast-read commands, also in QPI/4BA mode.\n\nDatasheets used:\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q256HB_Datasheet_V1.3.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25R256HB_Datasheet_V1.0.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F256HB_Datasheet_V1.2.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q512HB_Datasheet_V1.2.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F512HB_Datasheet_V1.2.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q01GHB_Datasheet_V1.2.pdf\n\nChange-Id: I2ace2734d9dcf0920fb12f607d57fc419db8563e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/296\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "06e0264aa076bb9359274692850bf9010a1fe5c7", "tree": "c72b5d6086fe5de5c64730bdcc144521c7099d58", "parents": [ "fe21b43203c08f597c1295dba556323e63b3f209" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Oct 26 00:46:11 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Puya PY25Q..H family up to PY25Q128H\n\nThese are all the 3.3V parts of the family with only 24-bit\naddresses (3BA). First two (PY25Q40HB, PY25Q80HB) don\u0027t have\na configuration register and no WPS bit. From PY25Q64HA on,\nthe voltage range starts from 2.7V (instead of the 2.3V they\nhad before). There are versions with fixed quad-enable bits.\nAlas, they use different IDs, so we need duplicate database\nentries again.\n\nDatasheets used:\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q80HB_Datasheet_V1.7.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q16HB_Datasheet_V1.6.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q32HB_Datasheet_V1.7.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q64HA_Datasheet_V1.9.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F64HA_Datasheet_V1.1.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q128HA_Datasheet_V2.0.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25R128HA_Datasheet_V1.0.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F128HA_Datasheet_V1.2.pdf\n\nChange-Id: I9f97e686604cf722af36c799dc0c5c1e7e942a26\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/295\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "fe21b43203c08f597c1295dba556323e63b3f209", "tree": "05161bf0efd4ca85f8483a92d8d014e457332c67", "parents": [ "1c5d8296f9997e6b773352688fce59c24c1aafd5" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Oct 25 23:51:05 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add remaining P25Q..H family 3.3V chips\n\nThey all support QPI, and WPS for individual sector protection.\nHowever, the original P25Q32H and P25Q64H have a different de-\nfault setting for the dummy cycles in QPI mode. Hence, we need\nduplicate database entries once more.\n\nDatasheets used:\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q32H_Datasheet_V1.4.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q32SH_Datasheet_V1.9.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q64H_Datasheet_V1.4.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q64SH_Datasheet_V1.5.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q128H_Datasheet_V1.6.pdf\n\nChange-Id: I700747a6bc1762f113846aa62f55681fa2c8cfbb\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/294\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "1c5d8296f9997e6b773352688fce59c24c1aafd5", "tree": "f1ac20fa75e0d2198f7ef0f132d136b89201d751", "parents": [ "b0cae5e30ef780f73b89b8c4ff43c651a3612698" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Oct 25 23:21:02 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Puya P25Q40SH, P25Q80SH, P25Q16SH 3.3V parts\n\nThese are updated versions of the original `H\u0027 chips. They have\na configuration register that is read/written like a third sta-\ntus register, also support QPI, and have a WPS bit for indivi-\ndual sector protection. Because of the WPS bit, they need their\nown database entries, even though they share the old IDs.\n\nDatasheets used:\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q40SH_Datasheet_V1.9.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q80SH_Datasheet_V1.5.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q16SH_Datasheet_V1.8.pdf\n\nChange-Id: I203bec24b8f4028f50388fb79350d0bf388f404d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/293\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "b0cae5e30ef780f73b89b8c4ff43c651a3612698", "tree": "6321ef6d3dbe4140a4094bb63f26fe66dd26d6b3", "parents": [ "b09136b0971913cf7f984355c1005f65575aba44" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Oct 25 23:03:40 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Puya P25Q06H, P25Q11H, P25Q21H 3.3V parts\n\nThese look like an update to the original quad-i/o chips. They\nhave a configuration register that is read/written like a third\nstatus register. Otherwise, they seem very much compatible, but\nhave different IDs.\n\nDatasheet used:\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q21H_11H_06H_Datasheet_V2.1.pdf\n\nChange-Id: I984c574bcfd7275a2234c1db13935c01d12fab72\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/292\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "b09136b0971913cf7f984355c1005f65575aba44", "tree": "c11416105bf9ff3bb8a8a8b2a1ade79f9e63278c", "parents": [ "ed8b82c17e285de43437325fe7c402186719da8c" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Oct 25 22:52:30 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Puya P25Q05..16H 3.3V parts\n\nAll quad-i/o chips with block-protection similar to Winbond. One\nspecialty is a page-erase operation. At the upper end (P25Q08H,\nP25Q16H), they have a configuration register that is read like a\nthird status register however written like a second (31h, accor-\nding to the datasheets).\n\nDatasheets used:\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q40H_20H_10H_05H_Datasheet_V2.0.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q80H_Datasheet_V1.7.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q16H_Datasheet_V2.1.pdf\n\nChange-Id: I8ca43d19603cd11fd9cf06d2afc930b1096548d3\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/291\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "ed8b82c17e285de43437325fe7c402186719da8c", "tree": "e252a99cb8978e5fc27eda846dc8c92de9058024", "parents": [ "4a351349eb0e2156adc06cb628f4db64d7857d40" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Oct 22 00:12:03 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Fudan FM25Q128 3.3V part\n\nThis chip has non-volatile DC bits that control the number of dummy\ncycles for all fast-read commands in all modes. As we don\u0027t check\nsuch bits, we don\u0027t enable any fast reads for now. Otherwise it\nlooks well featured. Block protection seems to follow Winbonds\nscheme, however without SEC and SRL bits.\n\nDatasheet used:\nhttp://eng.fmsh.com/nvm/FM25Q128_ds_eng.pdf\n\nChange-Id: I9cda2fdbc13c20eda999555d09c9a847d0192536\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/290\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "4a351349eb0e2156adc06cb628f4db64d7857d40", "tree": "9a58cfe7e2eb88a4417b96c0194e042a99e782aa", "parents": [ "7f7bffa8b4c71d0cf652d94c1386284cdd5a012a" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Oct 22 00:03:52 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Fudan FM25Q08A 3.3V part\n\nThis chip is almost identical to the older FM25Q08, however\nthe CMP bit is at a different offset. /o\\\n\nDatasheet used:\nhttp://eng.fmsh.com/nvm/FM25Q08A_ds_eng.pdf\n\nChange-Id: I703487c24491d0be1c90579af798bd5c7457148a\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/289\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "7f7bffa8b4c71d0cf652d94c1386284cdd5a012a", "tree": "01c190da882dd96fd5563396a8dba41039ae8ba8", "parents": [ "c591518dca2c097d907787858d177707158bc10e" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Oct 21 23:57:11 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Fudan FM25Q64, update FM25Q08..Q32\n\nFor all bits that matter to us, these chips seem to have the same\nstatus-register layout. The FM25Q64 differs in a few bits that are\nout-of-scope, and additionally supports a WRSR2.\n\nDatasheets used:\nhttp://eng.fmsh.com/nvm/FM25Q08_ds_eng.pdf\nhttp://eng.fmsh.com/nvm/FM25Q16_ds_eng.pdf\nhttp://eng.fmsh.com/nvm/FM25Q32_ds_eng.pdf\nhttp://eng.fmsh.com/nvm/FM25Q64_ds_eng.pdf\n\nChange-Id: I820ed60366d19ab4d87f8c02b4018ffb5591ca5f\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/288\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "c591518dca2c097d907787858d177707158bc10e", "tree": "0bdc1e5ece5d1fc5935c50f845a82a928723ea71", "parents": [ "fea6e16e177fc7a9fd5acd75f812272bcadab163" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Oct 21 23:40:10 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Fudan FM25Q02/Q04 3.3V parts\n\nThese smallest two in the series seem to have the same status-\nregister layout. They look almost feature-complete, with only\na SEC-bit missing.\n\nDatasheets used:\nhttp://eng.fmsh.com/nvm/FM25Q02_ds_eng.pdf\nhttp://eng.fmsh.com/nvm/FM25Q04_ds_eng.pdf\n\nChange-Id: Ic267ddd2b33b63e72ad923f2bbe0af29aaa6bf93\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/287\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "fea6e16e177fc7a9fd5acd75f812272bcadab163", "tree": "1a00a179b4076d6b6e885f47547b439c5c87b64d", "parents": [ "56d727e3829923c01b21d4f8d2a281acbb2c83bf" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 23:11:57 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Winbond W25Q16JV_M (DTR version)\n\nFully featured 3.3V version of Winbond\u0027s 16Mbit chip.\n\nDatasheet used:\nhttps://www.winbond.com/resource-files/w25q16jv_dtr%20reve%2002092018%20plus.pdf\n\nChange-Id: I3150b4690c73c1118b6819b83b9dfab55ddf3c8f\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/286\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "56d727e3829923c01b21d4f8d2a281acbb2c83bf", "tree": "3200a071d02f9f5726da294a9577d70d5c2a8570", "parents": [ "c64a80362eabce9bbdc44c79b9d2fbd1e77389c2" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 22:46:12 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add newer gen. XTX Tech. XT25F..F 3.3V parts\n\nThese F versions don\u0027t support QPI but have a 3rd status register.\nThere are non-volatile DC bits, that control the number of dummy\ncycles for dual- and quad-i/o reads. As we don\u0027t check such bits,\nwe only enable dual- and quad-output commands for now.\n\nDatasheets used:\nhttps://en.xtxtech.com/download/?AId\u003d516\nhttps://en.xtxtech.com/download/?AId\u003d257\nhttps://en.xtxtech.com/download/?AId\u003d450\nhttps://en.xtxtech.com/download/?AId\u003d454\nhttps://en.xtxtech.com/download/?AId\u003d531\n\nChange-Id: Icc187d835a65357a72854d0a04c17e9f54beaee9\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/285\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "c64a80362eabce9bbdc44c79b9d2fbd1e77389c2", "tree": "14a32474129ea9057efa2c3c471b6267edad21ca", "parents": [ "46e42096032e85265b0740b47c86f4975cf365ef" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 19:14:19 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add XTX Tech. XT25F..B 3.3V family\n\nThese are old versions of the 3.3V family, that don\u0027t seem to be\nmanufactured anymore. Except for the smallest 16Mbit chip, they\nhave QPI support which newer versions lack. The block-protection\nseems to follow Winbond\u0027s model.\n\nDatasheets used:\nhttps://xonstorage.blob.core.windows.net/pdf/xtx_xt25f16bsoigu_xonjuly20_20_link.pdf\nhttps://www.lcsc.com/datasheet/lcsc_datasheet_2410121518_XTX-XT25F32BSOIGU-S_C558851.pdf\nhttps://www.lcsc.com/datasheet/lcsc_datasheet_2411220126_XTX-XT25F64BSSIGU_C3202692.pdf\nhttps://www.lcsc.com/datasheet/lcsc_datasheet_2410121527_XTX-XT25F128BSSIGU_C558845.pdf\n\nChange-Id: Ifc5607674fabf1466155d821e7d5e88886d3b21b\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/284\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "46e42096032e85265b0740b47c86f4975cf365ef", "tree": "c4d77e4da37ec5b45fc3aafdff84c5c5a76c8095", "parents": [ "6bc88e72d97a140cf657571a2f4a4f3e1c643954" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 18:21:43 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add XTX Tech. XT25F02E/04D/08B 3.3V parts\n\nThese are old chips with rather limited capabilities. Their\nblock-protection ranges are rather special, hence not added\nat the moment.\n\nDatasheets used:\nhttps://en.xtxtech.com/download/?AId\u003d118\nhttps://en.xtxtech.com/download/?AId\u003d136\nhttps://en.xtxtech.com/download/?AId\u003d51\n\nChange-Id: I28ec5087be63b394b0f387ca01e2391823680272\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/283\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "6bc88e72d97a140cf657571a2f4a4f3e1c643954", "tree": "58bb0483d5951b1648707ff651a318ffe27b7623", "parents": [ "3cddff471a7c5ada2770bd5c3e928e85fe2d037d" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 16:32:08 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Boya/BoHong BY25Q32/64/128 3.3V variants\n\nAdd all remaining 3BA, 3.3V parts of the BY25Q family. Once more,\ndatasheets look very similar. The whole family supports volatile\nstatus-register writes, three status registers, and all the usual\ndual- and quad-i/o instructions. Also, they use the common, Win-\nbond-like block protection bits.\n\nDatasheets used:\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q32BS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q32CS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q32ES.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q64AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q64ES.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q128AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q128ES.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q128FS.pdf\n\nChange-Id: Iff9c0459d215669025bc2af8b619fcf17c56f528\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/282\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "3cddff471a7c5ada2770bd5c3e928e85fe2d037d", "tree": "2a2b5b44965fbbf695ee172d9bd0ac032b841fb5", "parents": [ "34e3de6f9e89801eb34927bc372a084e934042f2" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 15:18:53 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Complete Boya/BoHong BY25D family\n\nExcept for the sizes, the datasheets look the same. All chips support\ndual-output fast reads. There is some overlap with the BY25Q family,\nbut given the small sizes (2MiB max.), it doesn\u0027t seem worthwhile to\nadd additional entries for these chips.\n\nThe block protection of the BY25Ds is rather peculiar, hence not con-\nfigured: It looks like hardcoded CMP\u003d1, SEC\u003d1 with 8KiB sectors and\nno 32KiB limit.\n\nDatasheets used:\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D05AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D10AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D20AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D40AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D40ES.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D80AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D16AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q80BS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q80ES.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q16BS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q16ES.pdf\n\nChange-Id: Ie3f8578c152fcedd3ccb60873018d92e1dc80876\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/281\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "34e3de6f9e89801eb34927bc372a084e934042f2", "tree": "11a9b565564d0290c0cacd20f18e89313ceceaf9", "parents": [ "f050370395afb0f4658458697984075dce551123" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 13:00:12 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Zetta Device ZD25LQ64/128 1.8V parts\n\nDatasheets for both look very much the same. Block protection and\nQPI implementations seem to follow Winbond.\n\nDatasheets used:\nhttp://www.zettadevice.com/upload/file/pdf/DS_Zetta_25LQ64_RevA_20180801.pdf\nhttp://www.zettadevice.com/upload/file/20150821/DS_Zetta_25LQ128_RevA_20180815.pdf\n\nChange-Id: Iea8c4076105910b4e0975b02a92f287ded745eae\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/280\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "f050370395afb0f4658458697984075dce551123", "tree": "1032bb666c324b818d855208faa69a5c2d26e7eb", "parents": [ "d40037a83dd03b91042c0725ba4dac2d6b7ffc92" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 08 16:15:53 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "selfcheck: Check dummy-cycle settings when QPI is advertised\n\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\n\nChange-Id: I8395a721dc12fbe078f63b3af7e6404cc45437fa\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/279\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "d40037a83dd03b91042c0725ba4dac2d6b7ffc92", "tree": "877e9d73b89d0d0f8174340c0d29ff890b46e96b", "parents": [ "2a1036b98c44529c64db645c481c0b35c81b21b0" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 23:20:46 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "selfcheck: Check for WP functions when BP bits are given\n\nWhen block-protect bits in a status/configuration register are\nadvertised, check for the respective function pointers.\n\nChange-Id: I3cabb7ecbe7b21371720690b8f08a922b3b4c4aa\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/278\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "2a1036b98c44529c64db645c481c0b35c81b21b0", "tree": "c72d463a2c50ce6f3145a38637094bedbb9b56a7", "parents": [ "d4e41d353604cb19938305590efbc81642152422" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 23:19:49 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Fix up GD25Q128C write-protect support\n\nThe SPI write-protection functions were missing in the GD25Q128C\nentry. Fix that.\n\nDatasheet used:\nhttps://files.pine64.org/doc/datasheet/pine64/GD25Q128C-Rev2.5.pdf\n\nChange-Id: Ibda9f224fb5f57a0878246c324bceb2089dd70ae\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/277\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "d4e41d353604cb19938305590efbc81642152422", "tree": "50d1ec87c227b58de5c56723bfb86b6c09b1e305", "parents": [ "04c1cf789b0468de5fd1368469d90b6fc75b3c46" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Oct 18 14:59:54 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add SST26VF080A\n\nSimple 8Mbit SPI flash, with one caveat though: SFDP reports 0xd8 as\nboth 32KiB and 64KiB eraser. The datasheet[1] lists this too in the\nSFDP table, however otherwise consistently states that erase blocks\nare uniform, and lists 0x52 as the 32KiB eraser. For now, we\u0027ll try\nthe latter.\n\n[1] https://ww1.microchip.com/downloads/aemDocuments/documents/MPD/ProductDocuments/DataSheets/SST26VF080A-2.5V-3.0V-8-Mbit-Serial-Quad-IO-%28SQI%29-Flash-Memory-20006203C.pdf\n\nChange-Id: I7d66ff23ef9ded7365e9c75a1aff0a68678a4ba0\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/263\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "04c1cf789b0468de5fd1368469d90b6fc75b3c46", "tree": "3a907becee99560f497f6758342bc1d48c712662", "parents": [ "eb2c04185f8f471c768b742d66e4c552effdd9cb" ], "author": { "name": "Arthur Heymans", "email": "arthur@aheymans.xyz", "time": "Thu Jan 09 16:04:45 2025 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jan 31 11:40:27 2025 +0000" }, "message": "Add .envrc\n\nhttps://direnv.net/ with use nix, requires the shell.nix to be placed at\nthe project root. This is a very common setup.\n\nChange-Id: I6eff8cca03aaa35c68a034ba1f553946c893377c\nSigned-off-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/317\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "eb2c04185f8f471c768b742d66e4c552effdd9cb", "tree": "a92b76fff56165acb60db7e65e503d13e4d2c33e", "parents": [ "e05e3343366340048c421ab0bfa744ea077185c8" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Nov 14 14:22:43 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Nov 21 20:31:44 2024 +0000" }, "message": "cli_wp: Fix bail-out when multiple chips are detected\n\nWe need to bail out in this case, too. Otherwise flashprog tries to\nuse the null pointer `flash\u0027.\n\nChange-Id: Id2588c7e8065169236cf56d67a524779c51f2577\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/310\n" }, { "commit": "e05e3343366340048c421ab0bfa744ea077185c8", "tree": "0dabe05c1720cf63137fd1df44e03e9ea07a1cff", "parents": [ "efad610a409c48139d8e482b36dca82cc0d73b44" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Nov 14 14:08:56 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Nov 21 20:31:44 2024 +0000" }, "message": "cli_common: Rename local `optarg\u0027 variable\n\nSome toolchains complain that this shadows the global from \u003cgetopt.h\u003e.\nAlas, toolchains seem inconsistent in the decision when to warn about\nshadowing of globals from system headers and when not to. Hence, just\nrename `optarg\u0027 -\u003e `opt_arg\u0027.\n\nChange-Id: Ic973f6076109156ec5ca77ea032bd13e5a452d5b\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/309\n" }, { "commit": "efad610a409c48139d8e482b36dca82cc0d73b44", "tree": "984e6c5bc135d1a55afd97d80919419c11ced052", "parents": [ "09289fbb5a4c6c61748844db2b97af0d0e60d319" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 15:07:16 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 14:20:08 2024 +0000" }, "message": "manibuilder: Include NetBSD (anita tags) in `native\u0027 target\n\nThe NetBSD images can now run with KVM on compatible architectures.\nHence they are a lot faster, and can be treated as native.\n\nChange-Id: Ica5124dba752ea58216adbc15e4a9e1c04100444\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/276\n" }, { "commit": "09289fbb5a4c6c61748844db2b97af0d0e60d319", "tree": "39099bc88b74802ed4ef5d8d56c64c0bcc19c70b", "parents": [ "1457cc6a0500d006a516b63ede5654dc404a69c3" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Nov 09 22:56:25 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 14:20:08 2024 +0000" }, "message": "manibuilder: Replace unmaintained DEFAULT_TAGS list\n\nAFAIR, I\u0027ve only used the `working\u0027 target for flashprog releases\nso far. The default became a little stale, so just remove it. For\na quicker test, the `native\u0027 target is still around.\n\nChange-Id: I1dad9ce6dcb1ab77e8c174e801f3b9830b33b190\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/275\n" }, { "commit": "1457cc6a0500d006a516b63ede5654dc404a69c3", "tree": "23d134c0c8b99c323dd303d33e27304fb70a5bcb", "parents": [ "1faffa5666f6828a15b10bff63ac6ad9ac701fcb" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Nov 09 22:49:59 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 14:20:08 2024 +0000" }, "message": "manibuilder: Stop build testing oldest, EOL targets\n\nThese old targets can\u0027t compile the complete flashprog code anymore.\nAs they are all EOL, just remove them. As a bonus, this also reduces\nour quirk handling a lot.\n\nChange-Id: I0c1d7914e5d2bcce508ea6b8ce3a82d909081975\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/274\n" }, { "commit": "1faffa5666f6828a15b10bff63ac6ad9ac701fcb", "tree": "e6d0a1b983a8d70de37cf203ed57728b16638ed3", "parents": [ "61dbe36e8cb35c5142e70609d3281901d55f2386" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Nov 09 22:44:53 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 14:20:08 2024 +0000" }, "message": "manibuilder: Fix Ubuntu Noble Numbat (24.04) for amd64\n\nSome parts of the Dockerfile.ubuntu accidentally broke the apt setup for\namd64. Check for the newer `/etc/apt/sources.list.d/ubuntu.sources\u0027, and\nskip the old hacks if it exists.\n\nChange-Id: Iae42ba548e5ffa228922bd060a38450e969e4405\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/273\n" }, { "commit": "61dbe36e8cb35c5142e70609d3281901d55f2386", "tree": "813ab00ae14ad3d77a5fbf9a28b79dbfbd1cc7a9", "parents": [ "63d30a26b7abfdbf6dc60fd0607173cd1b8b05db" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 01 15:02:44 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 14:20:08 2024 +0000" }, "message": "udev rules: Use `uaccess\u0027 tag instead of `plugdev\u0027 group\n\nNot all systems have a `plugdev\u0027 group. The `uaccess\u0027 tag, however,\nseems to be the standard these days (seems to exist for about a de-\ncade on major distros). We rename the file to have a higher priority\nby default. At least on ArchLinux, it has to precede `73-seat-late\u0027.\n\nTested on ArchLinux (local session) and Raspbian (remote session).\n\nChange-Id: Iadcc74b32b92660fbf86b235e65692369535f7a6\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/266\n" }, { "commit": "63d30a26b7abfdbf6dc60fd0607173cd1b8b05db", "tree": "8de92e7468c02069c4868130c6554cd0d3ca9571", "parents": [ "6ce26a72f721461d3de48c12cd1dc09a96b5519c" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Nov 01 14:18:30 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 14:20:08 2024 +0000" }, "message": "install: Install binary into bin/, not sbin/\n\nThere are plenty of ways today to run flashprog as a normal,\nnon-root user. Hence it should live in bin/, where it can be\nshared by root and others.\n\nChange-Id: Ia614ea234237668cb4d6a0c1915e41975aae70d4\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/265\n" }, { "commit": "6ce26a72f721461d3de48c12cd1dc09a96b5519c", "tree": "7ca4f4b528dd04b73af42d05b721d4c30c00ca7a", "parents": [ "612519b2c54a008744891540407f2c8ff251083d" ], "author": { "name": "Alexandru M Stan", "email": "ams@frame.work", "time": "Fri Oct 11 22:47:24 2024 -0700" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 14:00:40 2024 +0000" }, "message": "flashchips: add Winbond W25R512NW / W74M51NW\n\nI used W25Q256JW as a template and just increased every erase size\ncalculation.\n\nDatasheet can be found by form contact only via\nhttps://www.winbond.com/hq/product/code-storage-flash-memory/serial-nor-flash/?__locale\u003den_TW\u0026partNo\u003dW25R512NW\n\nI tested it by running:\ndd if\u003d/dev/urandom of\u003d/tmp/random.bin bs\u003d1M count\u003d64\nsudo /tmp/flashrom/build/flashrom -p ft2232_spi:type\u003d2232H -w /tmp/random.bin --progress\nsudo /tmp/flashrom/build/flashrom -p ft2232_spi:type\u003d2232H -v /tmp/random.bin\nAnd I saw \"Verifying flash... VERIFIED.\"\n\nChange-Id: Ibf670e4014a22e4636789768b759cb51f75cd046\nSigned-off-by: Alexandru M Stan \u003cams@frame.work\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/84752\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/272\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "612519b2c54a008744891540407f2c8ff251083d", "tree": "f264bf5339ab332436dfd9acaa86d76b7492c1cf", "parents": [ "d5a61efe4e73675570eba7d537b4ec7e476946cb" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Nov 06 23:37:11 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ichspi: Add Intel Arrow Lake support\n\nARL looks much like a desktop version of Meteor Lake. Hardware registers\nseem to be the same, and the descriptor mostly differs in strap settings\n(as far as we are concerned).\n\nOdd enough, the old (pre 500 series) format for processor straps is used\nagain. For the descriptor detection, we shuffle the old default for Ibex\nPeak around, and make Arrow Lake the default for everything with over 80\nPCH traps.\n\nTested `ich_descriptors_tool\u0027 output for a GIGABYTE Z890M GAMING X BIOS.\n\nDocuments used:\n * Intel® Core™ Ultra 200S Series Processors Datasheet, Volumes 1 and 2\n * Arrow Lake-S and Arrow Lake-HX Client Platform\n SPI Programming Guide\n\nChange-Id: Ibaaeb896273eed3806561ba8c01d89770d27ff18\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/270\n" }, { "commit": "d5a61efe4e73675570eba7d537b4ec7e476946cb", "tree": "615c8bc476cf847c2d0bea4f7f1f154eede67e5a", "parents": [ "5e0d9b04a07f5646038020e1a45dd04c0b14e8f3" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Nov 06 23:55:44 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ichspi: Add Intel Lunar Lake support\n\nHardware looks much the same as Meteor Lake. The descriptor, however,\nknows 7 masters and regions are named a bit differently. Hence, add a\nnew enum entry for Lunar Lake.\n\nTested `ich_descriptors_tool\u0027 output for an MSI Prestige 13 A2VMG BIOS.\n\nDocuments used:\n * Intel® Core™ Ultra 200V Series Processors Datasheet, Volumes 1 and 2\n * Lunar Lake Client Platform\n SPI Programming Guide\n\nChange-Id: Ia377872cba56a3db6d853b7ce1bd495e5a03a868\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/271\n" }, { "commit": "5e0d9b04a07f5646038020e1a45dd04c0b14e8f3", "tree": "70386babe868ba7282cbbb0d8bc53880286025e8", "parents": [ "0ef2eb8f041ad6918dd41f4837d39be8811889c9" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jul 19 21:44:52 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ichspi: Add Intel Meteor Lake SoC\n\nHardware looks the same as C740 series / Emmitsburg. The descriptor\nis somewhere between the latter and latest desktop platforms.\n\nOutput of `ich_descriptors_tool\u0027 with an image from Google/Rex looks\nreasonable.\n\nTested probing and reading on a Lenovo L16 ThinkPad.\n\nDocuments used:\n * Intel® Core™ Ultra Processor Datasheet, Volumes 1 and 2\n * Meteor Lake/Arrow Lake-U / H Client Platform\n SPI Programming Guide\n\nChange-Id: I7f1d162622a141fadcad715b064f92b1ccf7c72a\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/189\n" }, { "commit": "0ef2eb8f041ad6918dd41f4837d39be8811889c9", "tree": "978d212a6cc5031e589162c49a36e4353e91c937", "parents": [ "42daab10a7704bfbe4a0af1a07748b8858649301" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jul 19 21:38:17 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ichspi: Add Intel Snow Ridge SoC\n\nHardware looks the same as C740 series / Emmitsburg. The descriptor,\nhowever, has very different frequency settings and different regions\nand masters.\n\nThe output of `ich_descriptors_tool\u0027 tested with an image from Intel\nlooks reasonable.\n\nChange-Id: I9f9dc4414af63cbe48d22ef2955df28e297d7e4c\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/188\n" }, { "commit": "42daab10a7704bfbe4a0af1a07748b8858649301", "tree": "9a9aa5465db9f58aa9d0c55f9807a2f694a98e05", "parents": [ "af26008fbabdd780bc6966acca4ad2481520b304" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Jul 16 00:27:27 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ichspi: Properly add Emmitsburg PCH\n\nThe Emmitsburg or C740 series PCH is actually ahead of all the other,\ncurrently supported chipsets. Finally, Intel added new registers that\ncarry the read and write access permissions for all 16 regions.\n\nThe old FRAP register seems to be still around, so we print both new\nand old registers. For the detailed report we use the new registers,\nthough.\n\nWe also adapt the descriptor detection slightly: We check for `NM \u003d\u003d 6`\njust like we did for Lewisburg. This way we won\u0027t treat a huge range of\nISL (ICH/PCH strap length) values as Emmitsburg, which should result in\nless false positives.\n\nThe output of `ich_descriptors_tool\u0027 tested on some Supermicro firmware\nlooks reasonable. Also tested read/erase/write in `swseq\u0027 and `hwseq\u0027\nmodes with 7 series PCH, reading with ADL-P. All logs still report FRAP\nsettings correctly.\n\nChange-Id: Ibf5ebe2e2edfe5e5ae26bf1136648bf6354b0aa9\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/187\n" }, { "commit": "af26008fbabdd780bc6966acca4ad2481520b304", "tree": "4462465349f22b4a69725e4b060c26822ef814f0", "parents": [ "82fe12380a10ce24680ef7e4e4ea682ecc58a20c" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jul 19 18:19:48 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ich_descriptors_tool: Add missing options for EHL \u0026 C620\n\nAdd a missing usage line for Elkhart Lake (EHL), and a new option\nfor C620 series Lewisburg (LWB).\n\nChange-Id: I98492eb924c3d4abf4b5f57f940a24e2fc726cf4\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/186\n" }, { "commit": "82fe12380a10ce24680ef7e4e4ea682ecc58a20c", "tree": "79dad3c3ba40a89360bab43d786ef8b3c0c44b9a", "parents": [ "157b81865725e9c544c9da323ab8ff93ff2c1ae5" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jul 19 17:28:47 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ich_descriptors: Hard code number of masters for newer gens\n\nThe number of masters (NM) field is ignored by the hardware and often\nnot updated in Intel\u0027s tooling. Since PCH100 / Skylake, it\u0027s always\nbeen 2 masters for the small core, 5 for the big core, and 6 for the\nserver platforms.\n\nChange-Id: I4975f5b55981791fa5b10c4731af8f330cbbefa8\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/185\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n" }, { "commit": "157b81865725e9c544c9da323ab8ff93ff2c1ae5", "tree": "7c41dfdb3639efd6f68edcfe1b4841fb8f33bd88", "parents": [ "db878fb03658e560b9b19728d11c99ccbb961165" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jul 19 17:48:12 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ich_descriptors: Guard MCH strap handling by chipset version\n\nAt some point, Intel abandoned the classic MCH/processor strap layout\nidentified by the FMSBA/MSL fields. Avoid misinterpreting the fields\nthat replaced them by guarding all FMSBA/MSL references.\n\nChange-Id: Ib1ce357bd4db85282903cb7aa5ad6d6066b62c2d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/184\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n" }, { "commit": "db878fb03658e560b9b19728d11c99ccbb961165", "tree": "c8b65acbd471be943b66ef4ace420d8be638f266", "parents": [ "b3cc2c6d3b39cc3c97d4130257b805a152a79b4c" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jul 19 17:37:09 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ich_descriptors: Drop chipset detection based on `freq_read`\n\nFinish what commit 72a9dc0db4e6 (ich_descriptors: Don\u0027t base chipset\ndetection on `freq_read`) started: This was the original check that\n`ifdtool\u0027 used to distinguish pre/post PCH100 descriptors. Bringing\nthis into flashrom never helped, on better days it was only a mainte-\nnance burden, sometimes it even triggered the wrong path. Let\u0027s drop\nit before adding more platforms.\n\nChange-Id: Ic76f36df91e2816281a51fea1e693113b1d3db9c\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/183\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n" }, { "commit": "b3cc2c6d3b39cc3c97d4130257b805a152a79b4c", "tree": "a8175496af3d776dcd5b528a045bc8853d5f3455", "parents": [ "8e4151ddb5b4533aa004594e5009ad92159b0651" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 15 00:45:17 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ich_descriptors: Unify pretty printing of PCH100+ masters\n\nThe newer platforms mostly differ in names and numbers of masters and\nregions. Make that obvious, and write a generic printing loop. Hope-\nfully this will make future additions easier.\n\nChange-Id: I3e616064743e9558f799159ef8b702f2bbd8ec89\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/182\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n" }, { "commit": "8e4151ddb5b4533aa004594e5009ad92159b0651", "tree": "64a5d90d128a7e4997cf8e6c4af84e5c72a7498f", "parents": [ "6d72efaff26d50626008f7f52f710cf2e263b5c6" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Aug 25 13:01:23 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "chipset_enable: Remove hidden-spidev workaround for Elkhart Lake\n\nWe already use the ID of the SPI device here.\n\nChange-Id: I0edce3468399184f295d5be53893c7297a912e8f\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/253\n" }, { "commit": "6d72efaff26d50626008f7f52f710cf2e263b5c6", "tree": "9feda016aaca2da0b89d55d4c2aab70dbca8f72b", "parents": [ "092a699d02a5003b323ed6df5a9e1b1241c4d620" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Aug 25 13:01:23 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "chipset_enable: Remove hidden-spidev workaround for all 14nm PCHs\n\nWhen the 300 and 400 series PCH (Cannon Point, Comet Point) support\nwas added, we did not know if all firmware will be consistent in the\ndecision not to hide the SPI PCI devices. A few years later, we can\nconfirm that it is: Grepping[1] through the `linuxhw\u0027 database[2] re-\nveals that we actually gain some hardware support, when matching the\nSPI PCI device directly.\n\nH410 and B460 are actually 22nm \"PCH V\", so they keep the workaround.\n\nJasper Lake already used the PCI ID of the SPI device.\n\nTested read/erase/write on CM246 (Cannon Point).\n\n[1] diff -u \u003c(git grep -lE \u00271f.5.*8086:(9da4|02a4|34a4|a324|06a4)\u0027 \\\n | grep -v README) \\\n \u003c(git grep -lE \u00271f.0.*8086:(9d84|028[45]|a30[3-68-ac-e]|3482|068[457c-e]|0697)\u0027 \\\n | grep -v README)\n[2] https://github.com/linuxhw/LsPCI/\n\nChange-Id: I1b490207818d3a44c8037b6d4046eefe6ead7bda\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/252\n" }, { "commit": "092a699d02a5003b323ed6df5a9e1b1241c4d620", "tree": "b71c0d02ae41304cd22da77dd6c80da084a7cea7", "parents": [ "5bbd3241aa74908d916e42ce37ed94f1f0bce4f3" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Aug 25 12:45:18 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "chipset_enable: Remove hidden-spidev workaround for TGP+\n\nWhen the 500 series PCH (Tiger Point) support was added, we did\nnot know if all firmware will be consistent in the decision not\nto hide the SPI PCI devices. A few years later, we can confirm\nthat it is: Grepping[1] through the `linuxhw\u0027 database[2] shows\nthat we actually gain some hardware support, when matching the\nSPI PCI device directly.\n\nFor Alder Lake and Raptor Lake, we already used the PCI IDs of\nthe SPI device.\n\nTested read on Alder Lake P, read/erase/write on RM590E (Tiger\nPoint) which was previously not detected.\n\n[1] diff -u \u003c(git grep -lE \u00271f.5.*8086:(a0a4|43a4)\u0027 | grep -v README) \\\n \u003c(git grep -lE \u00271f.0.*8086:(a08[123678]|438[1-df])\u0027 | grep -v README)\n[2] https://github.com/linuxhw/LsPCI/\n\nChange-Id: I2474d94be53fe01f8bd01d924098fa28fd43d657\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/251\n" }, { "commit": "5bbd3241aa74908d916e42ce37ed94f1f0bce4f3", "tree": "2f06cb896db5c8b838e723319ae24b560c641251", "parents": [ "a08847581ff039e901644922c65efd07dba62cc1" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Aug 25 12:40:46 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "chipset_enable: Add missing PCI ID for Intel PCH H410\n\nThis is a Comet Point PCH V (22nm).\n\nChange-Id: I9b27163d63f7676391a9579d706caeee17979275\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/250\n" }, { "commit": "a08847581ff039e901644922c65efd07dba62cc1", "tree": "65fca18733796e382116eae9d3945a8c0a01cdf5", "parents": [ "5eb7a58c1bc34f64c43f98578ce5b9be21a3f152" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Aug 25 12:29:44 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "chipset_enable: Factor PCH100 hidden-spidev workaround out\n\nIntel mandates that the SPI PCI device, usually 00:1f.5, is hidden\non all 22nm PCHs. This applies to the whole 100 and 200 series PCHs\nas well as some special 300 and 400 series PCHs, and the respective\nserver PCHs and small-core SoCs.\n\nTo cope with the hidden PCI device, we match the LPC PCI device and\nthen crudely assume that the SPI device exists too (only its vendor\nand device IDs are hidden). We don\u0027t need this workaround for newer\ngenerations where the PCI device isn\u0027t hidden anymore, hence split\nit out.\n\nTested read on Alder Lake P, read/erase/write on CM246 (Cannon Point).\n\nChange-Id: I77b5240b99015ecf56773f4a34436cfd3c83bdf6\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/249\n" }, { "commit": "5eb7a58c1bc34f64c43f98578ce5b9be21a3f152", "tree": "fe01f2dc6954114e565a0a5eaad30b54a29d21db", "parents": [ "7427569e2572cc8182e056876c0c67ddae213fc3" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Nov 05 10:30:19 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Nov 06 11:15:42 2024 +0000" }, "message": "Drop 1s delay before automatic verification\n\nThis delay was added in commit 8ab49e72af84 (Disallow erase/write for\nknown bad chips so people won\u0027t try without a clear understanding) to\nhelp with \"a few reports where verify directly after erase had unplea-\nsant side effects\".\n\nSince 2011 however, commit b4061f61cdf9 (Move erase verification to\ngeneric code), we read each erased block back directly, without any\ndelay. So it seems the original problem is either gone, or would hit\nus much earlier.\n\nGrepping through 3 years of mailing-list archives, also didn\u0027t reveal\nanything specific. Most reports of failed verifications could be ex-\nplained with write protections. More recent ones were about SPI flash\nchips with auto address increment (AAI) writes, where flashrom didn\u0027t\nerase automatically before writing (and hence gave rather suspicious\nresults).\n\nChange-Id: I9871ee7085156816bfffb117cda60b9267990609\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/269\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n" }, { "commit": "7427569e2572cc8182e056876c0c67ddae213fc3", "tree": "0dd0104a5a0556a715a2126301eb6e52ab163374", "parents": [ "5a9d6ea76f7c1f06f60b9cbbda885add2fb0eaeb" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Aug 16 13:49:10 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Nov 06 11:12:38 2024 +0000" }, "message": "libflashprog: Run programmer_shutdown() on failed setup\n\nThe programmer init functions can already register shutdown functions\nthat we missed to call should the initialization fail. The callers of\nflashprog_programmer_init() can\u0027t take care of it, because they never\nreceive a valid handle in this case.\n\nChange-Id: I03111d8096fac908f8808480a4df513fca8d84f5\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/243\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n" }, { "commit": "5a9d6ea76f7c1f06f60b9cbbda885add2fb0eaeb", "tree": "3d1a61cd5643bfbce077d48c74d2e66a0e82249e", "parents": [ "e149fbe31368a8502d31391346a679064014ac81" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Aug 16 13:47:49 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Nov 06 11:12:38 2024 +0000" }, "message": "chipset_enable: Fix memory leaks introduced with AMD SPI100\n\nThe libpci function pci_get_dev() allocates a device struct that\nneeds to be free\u0027d with pci_free_dev() manually.\n\nChange-Id: Ic14f0931beb660b05cfe3f6e6d43b649dce8fff4\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/242\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n" }, { "commit": "e149fbe31368a8502d31391346a679064014ac81", "tree": "2a42a0d9db27c9e686e69ae63099cf014e6c8d49", "parents": [ "07ebc68943bb19d561f8a79e52fefd144720bdcc" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Aug 21 10:23:53 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Nov 05 20:42:52 2024 +0000" }, "message": "Only try to check erase opcodes for SPI25 chips\n\nCalling spi_get_opcode_from_erasefn() is only valid when\nthe SPI25 command set is advertised. Note, this includes\nAT45 chips that are partially compatible.\n\nChange-Id: I1800e9a4bc1079a37758722e1924a13cd3e7a4c5\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/248\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n" } ], "next": "07ebc68943bb19d561f8a79e52fefd144720bdcc" }