)]}' { "log": [ { "commit": "fb433baeeaa721a8ee90a10e8d3c41bc68ddb131", "tree": "b351bf56a3fe4df91dfb8de85ede6b0343614771", "parents": [ "25ea7173f089ef3a615aee644fdc8edb98f462d1" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 19:09:47 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 17 15:24:18 2023 +0000" }, "message": "manibuilder: Switch to a per-image ccache\n\nWe used to have one big, shared ccache dir used by almost all images.\nThis doesn\u0027t scale well when we already know that parallel builds\n(for different architectures, for instance) don\u0027t have a chance to\nhit the same cache entries. Also, newer versions of ccache seem to\nhave a problem with this setup (Debian Bookworm and Fedora 37, to be\ninvestigated).\n\nWe pass a per-image identifier `${IDENT}` into the build and place\nthe cache in `/ccache/${IDENT}`. However, the configuration is kept\nin the default location, e.g. `~/.ccache/ccache.conf`. We can\u0027t\nconfigure this via ENV variables easily, because some distributions\noverride them.\n\nWe used to have the default 5GiB ccache limit. Now with the growing\nlist of images, we set a 32MiB limit per image. This should keep us\nwithin 5GiB for a while.\n\nChange-Id: I082f95aee050efad85867b309d363f61bfea751e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73471\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "25ea7173f089ef3a615aee644fdc8edb98f462d1", "tree": "0d6683f5ee037c3a5ae283652573a41a927eef42", "parents": [ "9b243b7adaf856e5e3f31a28df0bc35917656806" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 03 17:06:30 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 17 15:24:18 2023 +0000" }, "message": "manibuilder: Replace `master` branch with `main`\n\nChange-Id: I4a7c6d0238cf915473cd5a2143e6afc00817caac\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73431\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "9b243b7adaf856e5e3f31a28df0bc35917656806", "tree": "e50145a8504318ac1a962863eb706202806ed5aa", "parents": [ "c5077dd1e310a3a51359a82acef864ffec9f1cb3" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 02 23:13:38 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 17 15:24:18 2023 +0000" }, "message": "manibuilder/fedora: Add meson package\n\nChange-Id: Ib3a9e86f7c848f49b6abc9c56697d1e2cd4877a7\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73430\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "c5077dd1e310a3a51359a82acef864ffec9f1cb3", "tree": "11eac56a08616fab36bd57e36a278a8d26037091", "parents": [ "b115c9856191947f50d64c0e3bce25d8c8817b59" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 02 23:12:51 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 17 15:24:18 2023 +0000" }, "message": "manibuilder/fedora: Drop libusb-devel\n\nOnly the newer libusbx-devel is needed by flashrom nowadays.\n\nChange-Id: Ie972417c3d33e71156df3d2c0db0a0a5387ab4a2\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73409\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "b115c9856191947f50d64c0e3bce25d8c8817b59", "tree": "232e617feb657bfdbdd3de63dba03362671eadfc", "parents": [ "e59061aed9d9553785c5d922b38382a3cea4ee60" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 02 23:10:05 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 17 15:24:18 2023 +0000" }, "message": "manibuilder/debian,ubuntu: Add meson package\n\nChange-Id: Id887c77ce86d6a008dbab001674dd729d6b24c81\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73408\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "e59061aed9d9553785c5d922b38382a3cea4ee60", "tree": "2c7d19d853cabd189a38129cf6fa2cd9439b4bf1", "parents": [ "b50d73d47303bd2601445557829e567e4c7af1f1" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 02 23:08:09 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 17 15:24:18 2023 +0000" }, "message": "manibuilder/debian,ubuntu: Drop old libusb, switch to libftdi1\n\nThe old libusb is not used by flashrom anymore. It turned out that\nthere are two versions of libftdi packaged too, so we switch to the\nnewer one.\n\nChange-Id: Id0799aaca74ab1a195599eacfa95f1201ad88bee\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73407\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "b50d73d47303bd2601445557829e567e4c7af1f1", "tree": "5a0adfec2a30cacdbef8abb69fed063c162c8cad", "parents": [ "bad19ae4e38885f91c5a0d9870fcd9bc7ebb4dc0" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Mar 01 17:25:12 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 17 15:24:18 2023 +0000" }, "message": "manibuilder/anita: Update to NetBSD 9.3\n\nContainer images need to be rebuilt for Meson support anyway.\n\nChange-Id: I4f1a034fac6e2e43c6572bf59f98548e39273801\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73406\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "bad19ae4e38885f91c5a0d9870fcd9bc7ebb4dc0", "tree": "bc0f808eda66fb6536cc5469484052088b09720f", "parents": [ "74e0f52b7d7809cc8830be1e179723265a9cbbf8" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Mar 01 17:24:28 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 17 15:24:18 2023 +0000" }, "message": "manibuilder/anita: Install meson package\n\nChange-Id: I1a988c316959e27168f6c7d3d856edd49d526446\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73405\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "74e0f52b7d7809cc8830be1e179723265a9cbbf8", "tree": "1b36ade21c2f3e38cae8fe6f1c2a2fb35002f53e", "parents": [ "582267fb959f1db4ab477442aa0b4ba22e21d121" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 26 15:23:37 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 17 15:24:18 2023 +0000" }, "message": "manibuilder/alpine: Optionally add meson\n\nMeson is available since Alpine v3.7.\n\nChange-Id: I19f0c040d6a64abaf2c284d4159ec2d87fa6ee71\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73404\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "582267fb959f1db4ab477442aa0b4ba22e21d121", "tree": "7afbb925152ee9641d0abcad5cfa6865d1d947e0", "parents": [ "9b2f05235353e65ce17f3144d8634032e4e18aea" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 26 15:22:37 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 17 15:24:18 2023 +0000" }, "message": "manibuilder/alpine: Drop libusb-compat, add libftdi\n\nChange-Id: Ie04d8555e55456231141d931c94ea40fb36681c4\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73403\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "9b2f05235353e65ce17f3144d8634032e4e18aea", "tree": "564ded34728e8aee64be71726cd358bf92301f06", "parents": [ "8fbd36fe10a76cc770e9ae117411a67239eebbd4" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 26 15:17:03 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 17 15:24:18 2023 +0000" }, "message": "manibuilder/alpine: Fix SSL cert issues\n\nOnce more, try to find a way to build all the containers. They enabled a\nredirection from http to https recently and there is no option to skip\ncertificate checks. So the only move is to provide a current CA certifi-\ncate by ourselves. Note, the added certificate is the current Root CA\nof Let\u0027s Encrypt. Due to issues with the ca-certificates packages in\nAlpine v3.7, nothing using another Root CA will work this way.\n\nChange-Id: I3bb340428b863ea5e24ad6e1da6f3fe428eb187d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73402\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "8fbd36fe10a76cc770e9ae117411a67239eebbd4", "tree": "ddff0334166dbfa732e4b62291ba5a4b14831fcc", "parents": [ "abdb07fdd7e931e6e13122fad4f5d6e9f1633e00" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 26 20:57:32 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 16 23:09:46 2023 +0000" }, "message": "dirtyjtag_spi: Add DJTAG2 support\n\nThe new DJTAG2 protocol supports special command modifiers to speed\nthings up:\n\n* NO_READ allows a write without returning the sampled MISO data.\n* EXTEND_LENGTH allows to send 32B extra per transfer.\n\nAs SPI flash commands are basically half-duplex, we utilize NO_READ\nto send all the write data in a first loop and then receive data in\na second loop. Only flash writes can benefit from this and due to\ntheir programming delay the difference is marginal ~2%.\n\nLong reads, OTOH, benefit from the increased transfer size and we\nare about 45% faster.\n\nTested with DJTAG2 on a Blue Pill (STM32F103).\n\nChange-Id: Ie38b309f5865c7704c6b2a85e7437fe2621623d3\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73265\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Jean THOMAS \u003cvirgule@jeanthomas.me\u003e\n" }, { "commit": "abdb07fdd7e931e6e13122fad4f5d6e9f1633e00", "tree": "761b694bc084d07b94f23296fb719a4effbae304", "parents": [ "6be0655ceb9e7de86c1a40b72d45b54a8fd7de60" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 26 17:09:34 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 16 23:09:46 2023 +0000" }, "message": "dirtyjtag_spi: Add DJTAG version detection\n\nRead the version with CMD_INFO and set our `spi_master.command`\naccordingly.\n\nChange-Id: Idbbeb149b1c3d92354817a2c8db570426d834452\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73264\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Jean THOMAS \u003cvirgule@jeanthomas.me\u003e\n" }, { "commit": "6be0655ceb9e7de86c1a40b72d45b54a8fd7de60", "tree": "d41d9b57cc4e561042e61a921a892bd58cf6ef03", "parents": [ "a2eaf4aa0166e107b3a3f9c50040d1b983cf4622" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 12 00:18:09 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 16 21:49:52 2023 +0000" }, "message": "spi95: Fix error return code of probe_spi_st95()\n\nProbing methods return 1 for success, 0 if nothing was found or\non error.\n\nChange-Id: I3e6242d24e1cf5fa75100ecc56de721248dca174\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72993\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "a2eaf4aa0166e107b3a3f9c50040d1b983cf4622", "tree": "0b0d4dc14d8898f4456705ab968d66e9a85cdc29", "parents": [ "07dd1219ff158a63dc9fa2d0f32f91bb03d8722e" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Feb 15 22:56:53 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 16 21:49:40 2023 +0000" }, "message": "flashchips: Add entries for SST26VF016/032\n\nThey share a datasheet and look similar to the A/B variants that\nalready had entries but different IDs.\n\nChange-Id: I62ca123de917dc5c4766f3cf00a11d05b3befd4f\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73043\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "07dd1219ff158a63dc9fa2d0f32f91bb03d8722e", "tree": "6727a19be021623cb27d4ce985da511351055237", "parents": [ "da5daed724eeb11449b89d06618b2c4e77a7bb80" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 16:36:28 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 16 21:48:53 2023 +0000" }, "message": "Makefile: Enable jlink_spi by default\n\nNow that we give proper hints in case of missing dependencies, we can\nenable the `jlink_spi` driver by default.\n\nChange-Id: Idb3d40ba39ef720093409158d39ec32266969410\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73447\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "da5daed724eeb11449b89d06618b2c4e77a7bb80", "tree": "ee4a1f57f987542f647791c73fc13e6149c4147e", "parents": [ "aded7cc15ca380b22a08b10c92c12d48ac3e01d9" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 16:33:35 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 16 21:48:53 2023 +0000" }, "message": "Makefile: Port library dependency checks to mark_missing_dep\n\nThe dependency checks have to be moved after setting the CONFIG_*\ndefaults so that we can alert the user of missing dependencies for\nthings that should be enabled by default.\n\nChange-Id: Ibf54b41b104a01029855f957c867208b36fe0714\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73446\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "aded7cc15ca380b22a08b10c92c12d48ac3e01d9", "tree": "6c03f6aeb32aa2743d6953968552a7116000294f", "parents": [ "054c0b5c42b2a6dbf964eccc28a0640b0ea14559" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 16:06:11 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 16 21:48:53 2023 +0000" }, "message": "Makefile: Add infrastructure to handle missing dependencies\n\nAdd a macro `mark_missing_dep` to gather information about missing\ndependencies for selected (default or explicit) features. If anything\nis tagged as missing, we print an error message and bail out.\n\nThis should make sure that we don\u0027t miss anything when building\nreleases. It comes with a slight inconvenience for casual builds:\nOne has to disable the affected features manually. This should be\nhandled better with Meson which discerns release builds by default.\n\nChange-Id: I7a816de20df4313985d7d270c08be1871616ea41\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73445\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "054c0b5c42b2a6dbf964eccc28a0640b0ea14559", "tree": "78aeb468db1a91c67921ff7269c726adf89160ff", "parents": [ "aa5268df1dde6a952465e345bcdf806c22d3154b" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 15:29:24 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 16 21:48:53 2023 +0000" }, "message": "Makefile: Add missing semicolon after \u0027unsupported\u0027 message\n\nMake it bail out instead of printing \"exit 1\".\n\nChange-Id: I58c00eb7faa661351b1f00e477f0e8ccc08854a3\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73444\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "aa5268df1dde6a952465e345bcdf806c22d3154b", "tree": "45d2547b29ac97dc17f0bbe73ccfbd62a78aae54", "parents": [ "71c97eebf266e1b682e4d1643b50cf4bc753b0be" ], "author": { "name": "Nico Huber", "email": "nico.huber@secunet.com", "time": "Thu Mar 09 17:15:23 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Mar 16 21:48:53 2023 +0000" }, "message": "Rename CONFIG_LINUX_GPIOD --\u003e CONFIG_LINUX_GPIO_SPI\n\nRename the config variable so it matches the programmer driver\u0027s name.\n\nChange-Id: I5cb44203dc9bb3db6de0c79e97435a376c059723\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73588\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "71c97eebf266e1b682e4d1643b50cf4bc753b0be", "tree": "c59ee9d66730dab1567cb1570afdcf494838472b", "parents": [ "819ba502d65b46adb734375adb974a665ac9d349" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 07 23:01:53 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Mar 15 00:08:27 2023 +0000" }, "message": "test_build: Use Meson if present\n\nIf Meson is available, do a release build. Allow ${CPUS} to override\nthe number of Ninja jobs.\n\nChange-Id: Ie2afa3ceb31396822ac9a127011cb9a7fc92e988\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73574\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "819ba502d65b46adb734375adb974a665ac9d349", "tree": "5ac4bc6994f6ebe71c36ac2b2a101cb744f4eb03", "parents": [ "b84f55bbfa4ed6e1ae7eab6525f28a3a9db1b865" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 07 22:59:01 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Mar 15 00:08:27 2023 +0000" }, "message": "test_build: Add some simple dummy-flasher tests\n\nTest that an emulated SPI flash can be probed, read, written with\nrandom data and verified. Also test that specifying the chip to\nprobe works and that we can overwrite the contents with another\nset of random data.\n\nChange-Id: I9800c36f10d637dae8f271468fd120f0508487ec\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73573\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "b84f55bbfa4ed6e1ae7eab6525f28a3a9db1b865", "tree": "6a2d0475a976d9266a49358e5e79796bf4efb366", "parents": [ "8c37eaa29e585ad5709dc306232cd21b2ab06b2c" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 07 22:55:51 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Mar 15 00:08:27 2023 +0000" }, "message": "test_build: Update make call\n\nUse ccache and parallel builds by default, unless ${CC} or ${CPUS} is\noverridden. Also allow ${WARNERROR} to be set to `no` (it defaults to\n`yes` in the Makefile already).\n\nThe make command can be overridden by setting ${MAKECMD}. This can be\nused in testing environments where GNU make is installed as `gmake`,\nfor instance.\n\nRun `make clean` ahead to make sure that we always have a clean build.\n\nChange-Id: Ie68bbc530474d30aad997c372a2b2f9144aae012\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73572\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "8c37eaa29e585ad5709dc306232cd21b2ab06b2c", "tree": "abcf1479206a3d7348ff98c5001de8bd16136297", "parents": [ "e0b92e0c8e88b19ed53c28ec71e3dd585f4b96dc" ], "author": { "name": "Christopher Lentocha", "email": "christopherericlentocha@gmail.com", "time": "Wed Jan 18 12:36:18 2023 -0500" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 14 23:59:16 2023 +0000" }, "message": "Add missing Intel B460 flash chip id\n\nNote that while I can read the chip, on my Lenovo Legion T5 28IMB05,\ncannot write to the flash chip with any tools except upgrading with\nvendor tool, no downgrades are allowed, due to the fact of SMM, even if\nI did manage to flash the BIOS chip somehow, would still face bootguard\nsince this machine has bootguard. But if I read the chip, and verify my\nread bin file, it works fine, until changing the SMBIOS, which is in\nthe vendor BIOS update package.\n\nflashrom-stable:\nMarked as DEP as that is the convention for config-dependent chipsets.\n\nChange-Id: Id8fcb59d5dbafea3e79c4e3ad75484bbd163feca\nSigned-off-by: Christopher Lentocha \u003cchristopherericlentocha@gmail.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/72056\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Paul Menzel \u003cpaulepanter@mailbox.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73486\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "e0b92e0c8e88b19ed53c28ec71e3dd585f4b96dc", "tree": "41f402c9e215ab1731e58dc9451aa10190b436f0", "parents": [ "12d5eb9d2047cc15b7a4b1f46514e1151342dfa6" ], "author": { "name": "Jan Samek", "email": "jan.samek@siemens.com", "time": "Tue Dec 06 16:42:56 2022 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 14 23:59:16 2023 +0000" }, "message": "chipset_enable.c: add PCI ID for TGL-UP3\n\nAdd PCI ID for the Tiger Lake UP3 (Industrial SKU) SoC.\n\nChange-Id: Ie93af14eb5857bfe51964f6565e475b6249dd407\nSigned-off-by: Jan Samek \u003cjan.samek@siemens.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70388\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73485\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "12d5eb9d2047cc15b7a4b1f46514e1151342dfa6", "tree": "9b1a6a63670e36607d08d33b4b20b9ce91a1012a", "parents": [ "d48318c92c88d35e9b90d61796d18df1266f2a82" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Feb 15 00:11:10 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 14 23:59:16 2023 +0000" }, "message": "chipset_enable: Add PCI ID for Raptor Lake S\n\nThe ID was found in [1].\n\n[1] Intel(r) 700 Series Chipset Family Platform Controller Hub\n Datasheet, Volume 1 of 2\n Doc. No.: 743835, Rev.: 002\n\nChange-Id: Iea4c6e856d2f153cef4906c7febbe895d958edae\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73484\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "d48318c92c88d35e9b90d61796d18df1266f2a82", "tree": "ada182ab55fe420fa36782479efbae6030c04dce", "parents": [ "c1fa3418ad546f1c6029174fa2f75c0e6b48e7a2" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 14 23:37:18 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 14 23:59:16 2023 +0000" }, "message": "chipset_enable: Add missing Tiger Lake IDs\n\nIt is unclear if the SPI controller is never hidden on Tiger Lake,\nhence we keep stacking the IDs of the eSPI controller. Tiger Point H\nIDs are from [1], the UP3/4 IDs from [2].\n\n[1] Intel(r) 500 Series Chipset Family Platform Controller Hub\n Datasheet, Volume 1 of 2\n Doc. No.: 635218, Rev.: 008\n[2] `src/include/device/pci_ids.h` in coreboot\n\nChange-Id: I4e50df6d6511e0ecd1ead96c67247e433fbf271a\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73483\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "c1fa3418ad546f1c6029174fa2f75c0e6b48e7a2", "tree": "8d55916f42b24d8c68905ab901181594de33290a", "parents": [ "c152f53a12c11f9effe08671d9366d11a0a6587d" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 23:56:12 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 14 23:48:20 2023 +0000" }, "message": "chipset_enable: Add a line break in debug output\n\nIf loglevel is \u003e\u003d debug, we should end all lines at\ninfo level with a line break.\n\nChange-Id: Ibf85869a9156facda58c5fb6a0a558d124ffd2b8\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72586\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "c152f53a12c11f9effe08671d9366d11a0a6587d", "tree": "683eeb0253861771aaf5fd11fe5a08a9d0f21650", "parents": [ "d2472e5a8e3ee6faa85c3c14b5932c5e96c132e8" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Jan 25 23:53:18 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 14 23:47:16 2023 +0000" }, "message": "Switch default to version info from Git\n\nWe gave an existing `versioninfo.inc` priority over more accurate\nversion info from Git. Now that we allow checked in version info,\nit makes sense to switch the default to Git. This way, we get the\nbest of both.\n\nChange-Id: If057442a5a52409f35538dc7738ae5da2d03c813\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72445\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Paul Menzel \u003cpaulepanter@mailbox.org\u003e\n" }, { "commit": "d2472e5a8e3ee6faa85c3c14b5932c5e96c132e8", "tree": "9a6abde0488a16df0df6fa6373106eeb259442f8", "parents": [ "f5fcd742a0568aaf50274bc32e1206f99d65a8b8" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 12 00:44:15 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 14 23:31:10 2023 +0000" }, "message": "amd_spi100: Check IllegalAccess before executing command\n\nThe SPI controller immediately sets the IllegalAccess flag if we\nconfigured an opcode (and optional address) that is not allowed\nin the current configuration.\n\nChange-Id: Icfa5a2823a302857aef0331ce44221747cf5fdd9\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73678\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "f5fcd742a0568aaf50274bc32e1206f99d65a8b8", "tree": "efdc370c3cc1fcca883364200bc0b6fff5db83ae", "parents": [ "2d614d61c39eefb2796a6edaecb88a0b31650f3c" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 11 17:11:12 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 14 23:31:10 2023 +0000" }, "message": "amd_spi100: Revise 4BA support\n\nWith current SoCs, a flash bigger than 16MiB can\u0027t be fully\nmemory mapped. Also, the memory mapping doesn\u0027t necessarily\nshow us the expected window of the flash.\n\nSo, we consider a memory-mapped read only if we know that\nthe SPI controller\n* sends 32-bit addresses, and\n* doesn\u0027t remap any address bits.\n\nMoreover, we disable support for 4BA mode changes, as we\ncurrently don\u0027t reset the chip state and don\u0027t know if the\ncontroller feels in charge of these.\n\nSending native 4BA commands, however, shouldn\u0027t be a problem,\nso enable these.\n\nChange-Id: I899a89067774334fe15b05bf0b7f2baed5068353\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73677\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "2d614d61c39eefb2796a6edaecb88a0b31650f3c", "tree": "bcb4b67d76b9dcb2a9de7fa1f6fc82d1e7129bc9", "parents": [ "50fb6f19bb8faad483078d3201977c65e2b57d5c" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 11 01:06:15 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 14 23:31:10 2023 +0000" }, "message": "amd_spi100: Fix memory-mapped reads for partially mapped chips\n\nIf the memory-mapping doesn\u0027t cover exactly the full flash chip,\nwe have to translate the `start` offset by subtracting the offset\nof the mapping inside the chip\u0027s space (`mapped_start`). This\ncalculation should also work if more than the chip\u0027s size is\nmapped. Then this offset would be negative.\n\nWe also use the newly added `mapped_start` for the preceding\ncalculations in the SPI engine fallback case. It keeps its exact\nsemantics, though.\n\nChange-Id: I4881b2420cb80c079052235ad54cedbb6fa3c945\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73671\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Marty E. Plummer \u003chanetzer@startmail.com\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "50fb6f19bb8faad483078d3201977c65e2b57d5c", "tree": "e049c59cf3d888cd1fc72970c98eba275668d572", "parents": [ "5d6cc5d64f65550ca6160a4730b79a295bb093de" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 14 22:44:37 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 10 13:18:24 2023 +0000" }, "message": "programmer_table: Clean up stale references\n\nThese programmers are not in flashrom-stable (yet). This slipped when\ncherry picking the table.\n\nChange-Id: I2db2785a598b4d96b051a6f2722f57ec429b32d8\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73482\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "5d6cc5d64f65550ca6160a4730b79a295bb093de", "tree": "8c2dd479ad0c9a5ae858186223e893ea044d3d5d", "parents": [ "c32e954c732b8a7eb894f4d835e16b7f7b496193" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Feb 24 18:20:26 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Mar 08 23:15:32 2023 +0000" }, "message": "manpage: Fix markup and parameter description for dirtyjtag_spi\n\nThe heading for the subsequent entry should start with `.SS`, the\n`.BR` was probably spurious (led to missing whitespace) and the\nparameter name is `spispeed`, the argument placeholder `frequency`.\n\nChange-Id: Ie0ce51d5fcd1a45cd0362ed08d8992169184ab3d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73256\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Jean THOMAS \u003cvirgule@jeanthomas.me\u003e\n" }, { "commit": "c32e954c732b8a7eb894f4d835e16b7f7b496193", "tree": "9e3411b1d9e15dc47f9cdbfea66262b8181ac14d", "parents": [ "111c380b2502df035057806fb727a724b18c815f" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 21 00:46:37 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Mar 08 23:15:32 2023 +0000" }, "message": "ch347_spi: Add simple `spispeed` parameter\n\nAdd a programmer parameter `spispeed` that accepts a frequency in kHz\nlike it\u0027s done for other drivers. The frequency will be rounded down\nto the closest possible divisor setting.\n\nChange-Id: Ifa05b95f723dba81bdcc7015dcdf557af5f2e0a8\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73153\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nicholas Chin \u003cnic.c3.14@gmail.com\u003e\n" }, { "commit": "111c380b2502df035057806fb727a724b18c815f", "tree": "c552fa6497313652798c34a16f41c2d3e56c6cd3", "parents": [ "b8ee2d63ae9f67bee7d6a2cab11de88128021e51" ], "author": { "name": "Kapil Porwal", "email": "kapilporwal@google.com", "time": "Fri Dec 09 19:41:27 2022 +0530" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 06 23:36:26 2023 +0000" }, "message": "flashchips.c: Add reg_bits for W25Q256JW_DTR\n\nAdd reg_bits for W25Q256JW_DTR as per the datasheet.\n\nw/o this patch:\nFailed to get WP status: WP operations are not implemented for this chip\n\nw/ this patch:\nflashrom -p internal --wp-range 0x0,0x2000000\nflashrom -p internal --wp-enable\nflashrom -p internal --wp-status\nflashrom -p internal -E \u003c---- failed to erase the flash as WP (which is\nexpected)\n\nSigned-off-by: Kapil Porwal \u003ckapilporwal@google.com\u003e\nChange-Id: I8ac23f706d4293a7d7d11ad6b2f62526fb075367\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70549\nOriginal-Reviewed-by: Subrata Banik \u003csubratabanik@google.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73481\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "b8ee2d63ae9f67bee7d6a2cab11de88128021e51", "tree": "afcaa01f77398b4174d0fade5f1835636ed27ed2", "parents": [ "b078ec67e6fbfe21bf1b3700c3351bc30c1b4626" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Dec 11 16:20:16 2022 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 06 23:36:26 2023 +0000" }, "message": "serial: Add Darwin/macOS support for custom and \u003e230400 baudrates\n\nThis change is based on the patch proposed by Denis Ahrens in\nhttps://review.coreboot.org/c/flashrom/+/67822\n\nChange-Id: I3e6b88d2b4c2a130b16456752681fd9f807bf6f0\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70571\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73480\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "b078ec67e6fbfe21bf1b3700c3351bc30c1b4626", "tree": "1a64c7842a131c05b6df1b514d28dd4408d91af1", "parents": [ "272b07327250e88385fd34ba10c7ece342153d06" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Dec 11 04:02:10 2022 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 06 23:36:26 2023 +0000" }, "message": "serial: Call set_custom_baudrate() thrice\n\nCall the function before tcsetattr() settings are known, then again\nwith settings prepared but not yet applied and finally a third time\nafter tcsetattr().\n\nDarwin support needs this change; there custom_baud code must be\ncalled to modify the settings passed to tcsetattr() and then again\nafter tcsetattr() returns.\n\nThe change should be non-functional on all currently supported systems;\ncurrent code calls set_custom_baudrate() before any tcsetattr()\nsettings are prepared, so we have three stages in total.\n\nThis change originates from discussion of the macOS patch proposed by\nDenis Ahrens in https://review.coreboot.org/c/flashrom/+/67822\n\nChange-Id: I40cc443cfb7bf6b212b31826d437b898cc13c427\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70569\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73479\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "272b07327250e88385fd34ba10c7ece342153d06", "tree": "fb54ff3fef099e1ab0caed753d445f75787ede93", "parents": [ "0d929fe12e8b8f4c517f8b1ec269f8a1e6fce0a2" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Dec 11 03:55:02 2022 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 06 23:36:26 2023 +0000" }, "message": "meson: Determine custom_baud source file only once\n\nChange-Id: I13221bdca7d14a483f416e81e3830a495659a85e\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70568\nOriginal-Reviewed-by: Paul Menzel \u003cpaulepanter@mailbox.org\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73478\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "0d929fe12e8b8f4c517f8b1ec269f8a1e6fce0a2", "tree": "e5658f8dba563e9d689baf83a2d01351cc518bb8", "parents": [ "e03b17584e720dfa5226cf7f7a94449a2aff6a9a" ], "author": { "name": "Alexander Goncharov", "email": "chat@joursoir.net", "time": "Tue Jan 24 14:43:12 2023 +0400" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 06 23:36:26 2023 +0000" }, "message": "dummyflasher: fix propagation of register_*_master() return values\n\nThis patch checks return value of register_*_master()\nso that in case of an error this error is not ignored anymore.\n\nChange-Id: I3a7eeb3cdd814db18b0717ae8b40ecadb4c32f7c\nSigned-off-by: Alexander Goncharov \u003cchat@joursoir.net\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/72430\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73477\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "e03b17584e720dfa5226cf7f7a94449a2aff6a9a", "tree": "e48e18fb530648d521ce1e7c14c2d9f53acd4a9d", "parents": [ "48dc090ae357bae82cdac2449fce8e7aad545922" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Tue Mar 15 13:23:00 2022 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 06 23:36:26 2023 +0000" }, "message": "gitignore: add libflashrom.a\n\nChange-Id: I9258a1710780df5c6a7c864de246ebbe850d60fe\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/62826\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73476\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "48dc090ae357bae82cdac2449fce8e7aad545922", "tree": "4fce1e7327fa5bd620213fdcc53fa62f39b427c6", "parents": [ "1e56360b267056e347b786349e6ec72e8f7216bc" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 05 17:20:55 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 06 23:36:26 2023 +0000" }, "message": "flashchips: Drop FEATURE_4BA_WREN from MT25QU128\n\nThe chip is too small for that.\n\nChange-Id: I4672d6d0d1802490b200db475d6fa464772018d7\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73475\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "1e56360b267056e347b786349e6ec72e8f7216bc", "tree": "dfeb62f02b184503719463de61396a95b88bd191", "parents": [ "5d5b12201bfc7a56d7ece9a90632a960aa8393d3" ], "author": { "name": "Rick Altherr", "email": "kc8apf@kc8apf.net", "time": "Thu Dec 22 10:25:34 2022 -0800" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 06 23:36:26 2023 +0000" }, "message": "flashchips: Remove FEATURE_4BA_WREN for MT25QL128 and mark as tested\n\nUsing both a Dediprog SF100 and a Bus Pirate, read and erase works\ncorrectly on a MT25QL128 but writes were failing to take effect.\nCurrently, the entry in flashchips.c indicates that this device supports\n4-byte addressing. Micron\u0027s datasheet indicates that it does not.\nAfter removing FEATURE_4BA_WREN from feature_bits, both SF100 and\nBus Pirate were able to successfully read, erase, and write a\nMT25QL128 so also marking as tested.\n\nChange-Id: I6341456c722840a413bd2c51fe9a78bbda5cdbab\nSigned-off-by: Rick Altherr \u003ckc8apf@kc8apf.net\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/71206\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73474\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "5d5b12201bfc7a56d7ece9a90632a960aa8393d3", "tree": "b39e2fa1fc65fcdd6d017a03c5e8bc14d4bdf917", "parents": [ "618994707d5ba556704ad9555191379cf46df6ae" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 11 19:18:50 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:36:30 2023 +0000" }, "message": "Makefile: Include .d files for CLI objects\n\nCommit 33ff32a589cf (Makefile: use libflashrom.a as input to build\nthe flashrom executable) forgot to update this after moving the CLI\nobjects out of $(OBJS). Fix it.\n\nChange-Id: I9b4a4c8a9ef0e0d55bc407ea0ef0657d40b2f738\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72992\nReviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "618994707d5ba556704ad9555191379cf46df6ae", "tree": "ad771fb01ca88cbf4ed3e93da0576f4a831a3929", "parents": [ "28790a23f71d942f7ec9aa03c5ec90fb90503d0f" ], "author": { "name": "Steve Markgraf", "email": "steve@steve-m.de", "time": "Mon Jan 09 23:06:52 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:33:03 2023 +0000" }, "message": "programmer: Add bitbanging programmer driver for Linux libgpiod\n\nWith this driver, any single board computer, old smartphone, etc. with\na few spare GPIOs can be used for flashrom.\n\nTested by reading of a 2048 kB flash chip on a Qualcomm MSM8916 SoC\n@800 MHz, ran the following command:\n\ntime flashrom -p linux_gpiod:gpiochip\u003d0,cs\u003d18,sck\u003d19,mosi\u003d13,miso\u003d56 -r test.bin\n\nThis command uses /dev/gpiochip0 with the specified GPIO numbers for the\nSPI lines. All arguments are mandatory.\n\nOutput:\n[...]\nFound GigaDevice flash chip \"GD25LQ16\" (2048 kB, SPI) on linux_gpiod.\n[...]\nreal 1m 33.96s\n\nChange-Id: Icad3eb7764f28feaea51bda3a7893da724c86d06\nSigned-off-by: Steve Markgraf \u003csteve@steve-m.de\u003e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73290\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "28790a23f71d942f7ec9aa03c5ec90fb90503d0f", "tree": "ea732ae212558f61e872d38e1fdd2b2f5b4db052", "parents": [ "7c706de8b11e6093f2b0f72ddb948b016420c61f" ], "author": { "name": "Felix Singer", "email": "felixsinger@posteo.net", "time": "Thu Aug 25 22:38:10 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:33:03 2023 +0000" }, "message": "util/shell.nix: Explicitly install gnumake and GCC packages\n\nEven if both packages are provided by stdenv, add the packages gnumake\nand GCC to buildInputs so that the list of (build-) dependencies is\ncomplete.\n\nSigned-off-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nChange-Id: I683eb0459404738a501a57d4301a90a6e3b46f93\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67087\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73401\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "7c706de8b11e6093f2b0f72ddb948b016420c61f", "tree": "67391af55dff02f722421cc53bb34ba16dd66639", "parents": [ "e255c4c33a0550a6d8019f3df5d5ef1c5c3565ac" ], "author": { "name": "Felix Singer", "email": "felixsinger@posteo.net", "time": "Sun May 15 04:06:36 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:33:03 2023 +0000" }, "message": "util/shell.nix: Add libjaylink\n\nlibjaylink is packaged since NixOS 21.11 and it is out for many months\nnow. Thus, include the package libjaylink and remove comments.\n\nSigned-off-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nChange-Id: I56e750831143a4e34be95ec111a37bb476abfe85\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/64352\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Paul Menzel \u003cpaulepanter@mailbox.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73400\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "e255c4c33a0550a6d8019f3df5d5ef1c5c3565ac", "tree": "24068512175c0c08289de00984d54647eb2d583b", "parents": [ "12e6ab087609e7ea40990a974e4452260e412ca7" ], "author": { "name": "Felix Singer", "email": "felix.singer@secunet.com", "time": "Tue Sep 28 15:20:17 2021 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:33:03 2023 +0000" }, "message": "util: Add Nix shell file\n\nAdd a Nix shell file which is able to compile flashrom.\n\nflashrom-stable: Drop cmocka.\n\nChange-Id: I9757b952f4b034e98c2b4b70fbede52d8efb9d50\nSigned-off-by: Felix Singer \u003cfelix.singer@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/58012\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73399\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "12e6ab087609e7ea40990a974e4452260e412ca7", "tree": "4e58548b0e1b98fad1731501c9a8cd90b3e4dbc5", "parents": [ "6e6cce0d07f716ed5caf72650fa762073081be17" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Thu Aug 18 12:32:15 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:33:03 2023 +0000" }, "message": "Documentation: Add build instructions for meson\n\nflashrom-stable:\n* Drop references to unit tests\n* Rename to `building_meson.md`\n\nChange-Id: I3476f17fa274cd71e3e0e84f791d547d08165ecb\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66862\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73398\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "6e6cce0d07f716ed5caf72650fa762073081be17", "tree": "a1a510898596a596d13c2ca93d0c6662536e22c4", "parents": [ "0e78818c2c818aa860a976524cfdf552792cfeba" ], "author": { "name": "Anastasia Klimchuk", "email": "aklm@chromium.org", "time": "Wed May 26 10:07:59 2021 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:33:03 2023 +0000" }, "message": "bitbang_spi.c: Pass spi data into bitbang_spi_master functions\n\nChange-Id: I90a340aeb9ed70605f5963aa66ee913d22bff865\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54992\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73269\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "0e78818c2c818aa860a976524cfdf552792cfeba", "tree": "0bd2c0ba9086639ba4c49259bfef7777ce95a82a", "parents": [ "a447c12ecf71954f40a2b07817b3933b7bd3e495" ], "author": { "name": "Anastasia Klimchuk", "email": "aklm@chromium.org", "time": "Wed May 26 09:54:08 2021 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:33:03 2023 +0000" }, "message": "bitbang: Extend bitbang_spi_master functions to accept spi data\n\nThis way every bitbang spi master has access to its own spi data,\nand can use this data in all its functions.\n\nThis patch only changes the signatures of functions.\n\nflashrom-stable: Adapted new function signatures in `nicintel_spi`.\n\nChange-Id: Id5722a43ce20feeed62630ad80e14df7744f9c02\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54991\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73268\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "a447c12ecf71954f40a2b07817b3933b7bd3e495", "tree": "073037c43b3dc9b5f6c0204cc5ea8ef0161b7271", "parents": [ "cbc5ba049f7d6ce4744eae836221b0fb35a9ac69" ], "author": { "name": "Anastasia Klimchuk", "email": "aklm@chromium.org", "time": "Mon May 31 11:20:01 2021 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:33:03 2023 +0000" }, "message": "bitbang: Extend register_spi_bitbang_master() API with spi data\n\nThis allows the users of register_spi_bitbang_master() API to pass\ntheir spi data into the API, and then the data can go further, into\nregister_spi_master() API.\n\nflashrom-stable: Removed unnecessary if.\n\nChange-Id: I13e83ae74dbc3a3e79c84d1463683d360ff47bc0\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54990\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73267\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "cbc5ba049f7d6ce4744eae836221b0fb35a9ac69", "tree": "247ae317cd783c7e74bbb75ef468ddca27fc5c08", "parents": [ "11d8577d6896eb8dac2ca26bf6fb0f78539b610c" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Wed Jan 06 14:10:52 2021 +1100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:33:03 2023 +0000" }, "message": "tree/: Drop const from opaque data ptr in master definitions [alt]\n\nThe opaque data pointer need not necessarily have constant\ndata for the life-time of the specific master. This is because\nthe data field purpose is for the master to use as it sees fit\nfor managing its own internal state and therefore we should not\nconstrain this as being RO data at init time.\n\nflashrom-stable:\n* Applied bitbang_spi part, now that we can test it.\n* Added OOM check.\n* Use new shutdown API right away.\n\nChange-Id: I6c3cf561313de1de4e3caec8732137a8c23bf1e6\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/49131\nOriginal-Reviewed-by: Sam McNally \u003csammc@google.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73266\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "11d8577d6896eb8dac2ca26bf6fb0f78539b610c", "tree": "79a844b92a55270e432de0a910744e6a5c725b6e", "parents": [ "96f964b419845e185ccd718d46dc38751fbc7967" ], "author": { "name": "Alexander Goncharov", "email": "chat@joursoir.net", "time": "Sat Feb 25 17:32:21 2023 +0400" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 28 23:43:35 2023 +0000" }, "message": "flashrom.8.tmpl: add missing chip for ft2232_spi programmer\n\nFTDI FT4233H chip was added in commit\nbc2e3b6b79dd1383cdf3d965df2fc5c0d6596b02\n\nChange-Id: Id25f6444bfe871f7b01ae2caff23ce973b44567a\nSigned-off-by: Alexander Goncharov \u003cchat@joursoir.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73261\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "96f964b419845e185ccd718d46dc38751fbc7967", "tree": "468e7139c3ad9d88758ab555b3f1b288d99a5b47", "parents": [ "4d51e07242459f86d00eaf522786695e46ec2511" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 21 23:47:51 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 28 23:42:48 2023 +0000" }, "message": "chipset_enable: Mark AMD Pinnacle/Raven Ridge and Matisse as DEP\n\nTested Pinnacle Ridge and Raven Ridge on an ASRock A320M-HDV and\nMatisse on an ASRock A520M-HDV. Because there can be access pro-\ntections set up in the chipset, mark them as DEP.\n\nChange-Id: Id389786d2b2dcea0141322c94ac72e03161019db\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73157\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "4d51e07242459f86d00eaf522786695e46ec2511", "tree": "a513666f34cc601d6a9e9bf4f506383dbf69bcb2", "parents": [ "e3c305dfd234503faa23c5491962db8f52d0134c" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 17:56:29 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 28 23:42:48 2023 +0000" }, "message": "amd_imc/sb600spi: Move handle_imc() into amd_imc.c\n\nMove handle_imc() to make it easier to share it with other drivers.\n\nChange-Id: I72dff5feda199e1d258c067e230abdf33c451249\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72575\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "e3c305dfd234503faa23c5491962db8f52d0134c", "tree": "b86a019224a05586e18b98eae8ff0c9b51a1c701", "parents": [ "070587892b4af723bf8f1f423d0b26e12e061084" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 21:45:56 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 28 23:42:48 2023 +0000" }, "message": "amd_spi100: Implement memory-mapped reads\n\nQuery the RomRange2 register for the memory range (usually top below 4G)\nand try to map that. Reads outside this range will still be served via\nthe command engine.\n\nChange-Id: I21aa67d550ccda0f55a9cf3ff14545a881624d11\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72583\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "070587892b4af723bf8f1f423d0b26e12e061084", "tree": "7217441f5e207ec4750e912079aae5a3b95ffc05", "parents": [ "d81637c3d7c2bf25f1709b6f28a423e074d906f3" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 19:56:39 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 28 23:42:48 2023 +0000" }, "message": "amd_spi100: Use source-aligned read for the FIFO\n\nMakes reading twice as fast (on this Raven Ridge).\n\nChange-Id: I878c7603e514859c48a9c7823f98a391ea921b21\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72582\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "d81637c3d7c2bf25f1709b6f28a423e074d906f3", "tree": "d1a34eaafa5030d10b787d51c84421cb02fa1943", "parents": [ "735b186eeffb997a957075d7e610b9700b53cbe1" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 19:45:44 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 28 23:42:48 2023 +0000" }, "message": "physmap: Implement source-aligned version of mmio_readn()\n\nImplement readn() with explicit alignment of the source pointer.\n\nChange-Id: Ic754c552c826ec06ea209a039c3035265ca61c9a\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72581\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "735b186eeffb997a957075d7e610b9700b53cbe1", "tree": "1e27f0dc7f2cae492459530df208859221a1d3ca", "parents": [ "197b7c7b03bc2bbfa6a706812fa69897a3eb7cdb" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 18:28:45 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 28 23:42:48 2023 +0000" }, "message": "amd_spi100: Add new driver for AMD SPI100 controllers\n\nStart with a very simple PIO driver. Reads are slow this way, but\nwe can optimize that later. A factor of 2 is possible simply by\naligning the FIFO reads, and another factor of 3 (at least) with\nmemory-mapped reads.\n\nWe override the SPI speed but choose a conservative value to be\non the safe side. Flashrom only supports normal read commands,\nhence we won\u0027t go over 33MHz. Also, if the firmware set a lower\nspeed for normal reads, we use that. We can\u0027t use dual/quad I/O\nwith the SPI command engine, and tests have shown that increasing\nthe SPI speed lifts the read speed only marginally. It seems to\nbe limited by the FIFO reads.\n\nChange-Id: I403d5f103b3ae72f3a91829d562984c54c2e2d00\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72577\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "197b7c7b03bc2bbfa6a706812fa69897a3eb7cdb", "tree": "bf6b57efe06c818f4dbec5d54466930930fa52c0", "parents": [ "dafd51e22b30b7e13e79567c065e55d30c788fa2" ], "author": { "name": "Nicholas Chin", "email": "nic.c3.14@gmail.com", "time": "Sun Oct 23 13:10:31 2022 -0600" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 25 00:42:12 2023 +0000" }, "message": "ch347_spi: Add initial support for the WCH CH347\n\nAdd support for the WCH CH347, a high-speed USB to bus converter\nsupporting multiple protocols interfaces including SPI. Currently only\nmode 1 (vendor defined communication interface) is supported, mode 2\n(USB HID communication interface) support will be added later. The code\nis currently hard coded to use CS1 and a SPI clock of 15 MHz, though\nthere are 2 CS lines and 6 other GPIO lines available, as well as a\nconfigurable clock divisor for up to 60MHz operation. Support for these\nwill be exposed through programmer parameters in later commits.\n\nThis currently uses the synchronous libusb API. Performance seems to be\nalright so far, if it becomes an issue I may switch to the asynchronous\nAPI.\n\nTested with a MX25L1606E flash chip\n\nSigned-off-by: Nicholas Chin \u003cnic.c3.14@gmail.com\u003e\nChange-Id: I31b86c41076cc45d4a416a73fa1131350fb745ba\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73106\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "dafd51e22b30b7e13e79567c065e55d30c788fa2", "tree": "f57d534157f225c85055bec837ae6f9153d57928", "parents": [ "78cd559d0eebeb2e725f19db89ab2f11aac05613" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Feb 10 23:58:19 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 21 23:36:27 2023 +0000" }, "message": "libflashrom: Add missing line ending when listing programmers\n\nChange-Id: I4e570498afdee90c8f218022576c88eb8def2484\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72980\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Matt DeVillier \u003cmatt.devillier@gmail.com\u003e\nReviewed-by: Elyes Haouas \u003cehaouas@noos.fr\u003e\nReviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\n" }, { "commit": "78cd559d0eebeb2e725f19db89ab2f11aac05613", "tree": "6c7e68cca1b199aec9d6a9fce34da32171f12f8f", "parents": [ "e604d56cf5654db8b744cbe5fb4fdb5fbfecd4e8" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 18:24:34 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 21 22:52:42 2023 +0000" }, "message": "chipset_enable: Start new driver for AMD SPI100\n\nWe start with the known fam17h PCI devices. Handle what we can gather\nfrom the LPC device and then hand over to a to-be-written SPI driver.\n\nChange-Id: I8215d2bf30ac95ec2258f28267edfdb7af569bea\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72576\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "e604d56cf5654db8b744cbe5fb4fdb5fbfecd4e8", "tree": "997104c21770b3a847d438004873691b39aea898", "parents": [ "019810f3fd083df5f6f61d19dda2d252709d02fe" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 17:34:57 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 21 22:52:42 2023 +0000" }, "message": "chipset_enable: Split detection for AMD Merlin Falcon and Stoney\n\nSplit the chipset enable entries because future SoCs use the same\nPCI IDs. We use the SMBus device for this, just like `sb600spi`.\nHowever, as the latter expects the LPC device to be passed, we\nhave to look that up first.\n\nChange-Id: Iba02d8695d150f9be51c996932b845a487b0e4ce\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72574\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "019810f3fd083df5f6f61d19dda2d252709d02fe", "tree": "d9f2f1e6f8e10b6bb1d4b7f56f431f9073942fbc", "parents": [ "6d98aece44f6f3458c79160adf4dddc7f8500378" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 17:11:24 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 21 22:52:42 2023 +0000" }, "message": "chipset_enable: Optionally check PCI revision field\n\nWe used to match compatible chipset devices by vendor and device ID\nonly. On some chipsets, e.g. AMD southbridges / SoCs, this is not\nenough, though, as the device IDs are rarely updated.\n\nIn the case of AMD chipsets, we can identify the chipset with the\nrevision ID of the SMBus device. So we add that field to the chipset\nenable list.\n\nChange-Id: I4021cf8e83c605fde4360c274b39481b1e0ff070\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72573\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "6d98aece44f6f3458c79160adf4dddc7f8500378", "tree": "5a2455824ee3f88232328c08512a3480cc9e2bc2", "parents": [ "e7a41e3cec25165b6564b62b6aa64f90bd2dab71" ], "author": { "name": "Aarya Chaumal", "email": "aarya.chaumal@gmail.com", "time": "Sun Aug 14 23:16:44 2022 +0530" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "flashrom.c: Update check_block_eraser function to use probe opcode\n\nUpdate the check_block_eraser function to use probe_opcode to see if the\ngiven block_eraser is supported by the spi master. This will help to get\na real count of usable block_erasers.\n\nflashrom-stable: Query `flash-\u003echip-\u003ebustype`.\n\nChange-Id: I6591a84ae1fe5bc1648051cc30b9393450033852\nSigned-off-by: Aarya Chaumal \u003caarya.chaumal@gmail.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66717\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72544\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "e7a41e3cec25165b6564b62b6aa64f90bd2dab71", "tree": "a635e566992d379fa1acca5de7fd7517e5c13580", "parents": [ "b0be3200954bebf2431c4d7bd441096f157f621e" ], "author": { "name": "Nikolai Artemiev", "email": "nartemiev@google.com", "time": "Mon Nov 28 17:40:56 2022 +1100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "tree/: Make probe_opcode() flashctx argument const\n\nProbing an opcode generally shouldn\u0027t involve mutating the flashctx\nstate and currently no probe_opcode functions do that.\n\nMake the flashctx arg const so that call sites don\u0027t need to have a\nnon-const pointer.\n\nTested: ninja test\n\nChange-Id: I19e98be50d682de2d2715417f8b7b8c62b871617\nSigned-off-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70030\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72543\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "b0be3200954bebf2431c4d7bd441096f157f621e", "tree": "f77f849073a8e0a8d0f6105c55ef06b969d3c982", "parents": [ "3561451faed250ced4a55e15d1abe5e3d94abfc4" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Tue Sep 20 00:07:23 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi.c: Add AT45 erasefn opcode mapping\n\nflashrom-stable: Dropped spurious/wrong function description.\n\nChange-Id: I798a91f1e20b63662715c68e6d43d03fc6005d51\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67717\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72542\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "3561451faed250ced4a55e15d1abe5e3d94abfc4", "tree": "dd5c68bd13dee2adfb609540c64bac463848b941", "parents": [ "e2ff4e90125680a48623a2a908bff38d5b91e44e" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Mon Sep 19 23:46:58 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi25.c: Rename spi_get_erasefn_from_opcode to spi25_get_erasefn_from_opcode\n\nThis function works only with spi25 chips\n\nChange-Id: Ie054160b0fdd34bcb128285c6a047e3a3fa8be0c\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67716\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72541\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "e2ff4e90125680a48623a2a908bff38d5b91e44e", "tree": "20d7cec6607c5ffd1d64d57a88148275d02a715f", "parents": [ "0cea753aff33b78051febadf8786df83144b5ee7" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Mon Sep 19 23:31:08 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi25.c: Move spi_get_opcode_from_erasefn() to spi.c\n\nSplit spi_get_opcode_from_erasefn() out into spi.c to add support for\nnon spi25 flashes next.\n\nChange-Id: Id654e998d0af2d3f5845336bb98b38d724519038\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67715\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72540\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "0cea753aff33b78051febadf8786df83144b5ee7", "tree": "8972ea6cf44e249659ddad7ea3d9aa2dedffc0b6", "parents": [ "ab9f25893f1fa87cbbaf656869e346391eccdb31" ], "author": { "name": "Aarya Chaumal", "email": "aarya.chaumal@gmail.com", "time": "Mon Jul 04 18:21:50 2022 +0530" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi: Add function to probe erase command opcode for all spi_master\n\nAdd a field, probe_opcode, to struct spi_master which points to a\nfunction returning a bool by checking if a given command is supported by\nthe programmer in use. This is used for getting a whitelist of commands\nsupported by the programmer, as some programmers like ichspi don\u0027t\nsupport all opcodes.\n\nMost programmers use the default function, which just returns true.\nICHSPI and dummyflasher use their specialized function.\n\nflashrom-stable: Added `.probe_opcode` for `dirtyjtag_spi`, `ich7`.\n\nChange-Id: I6852ef92788221f471a859c879f8aff42558d36d\nSigned-off-by: Aarya Chaumal \u003caarya.chaumal@gmail.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/65183\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72539\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "ab9f25893f1fa87cbbaf656869e346391eccdb31", "tree": "f21fc6e6e4541cd6905a17bcf3ace937a6e9b5ac", "parents": [ "b725c0cd0e1c3fb56807c197b965620ac37b996b" ], "author": { "name": "Aarya Chaumal", "email": "aarya.chaumal@gmail.com", "time": "Thu Jun 23 16:21:23 2022 +0530" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi25.c: Add function to return opcode of passed erase fucntion pointer\n\nThere is a function, spi_get_erasefn_from_opcode, which returns the\nerase function for given opcode. Add a function which does the opposite\ni.e. returns the opcode for given erase function.\n\nChange-Id: Ia3aefc9b9465efdd16b1678bb2ada9a23f00d316\nSigned-off-by: Aarya Chaumal \u003caarya.chaumal@gmail.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/65355\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72538\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "b725c0cd0e1c3fb56807c197b965620ac37b996b", "tree": "c3a2dee921479ffe469f95717254eda0c864c592", "parents": [ "a7cb7e959e4510820f452d6d8da2df3b4bd4ba02" ], "author": { "name": "Aarya Chaumal", "email": "aarya.chaumal@gmail.com", "time": "Thu Jun 23 16:12:12 2022 +0530" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi25.c: Add a list to lookup erasefn and opcode instead of switch case\n\nAdd a list (erasefn, opcode) which maps opcodes to erase functions.\nModify the spi_get_opcode_from_erasefn to use this list.\n\nChange-Id: I126f88c313ad309b509b367f9087235b87df6136\nSigned-off-by: Aarya Chaumal \u003caarya.chaumal@gmail.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/65351\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Simon Buhrow\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72537\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "a7cb7e959e4510820f452d6d8da2df3b4bd4ba02", "tree": "4a449cb03a202b8c5578b0b90f67e670a4044db9", "parents": [ "0b587f921aebd36aaa9f69faea0d2601386d7379" ], "author": { "name": "Anastasia Klimchuk", "email": "aklm@chromium.org", "time": "Fri Nov 25 18:10:43 2022 +1100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 12 01:11:46 2023 +0000" }, "message": "cli, manpage: Clean up occurrences of old image argument\n\n--include argument was introduced and replaced --image argument in\ncommit 45d50a101e8073191e6d88143990ed91d3bfe815\n\nThis patch cleans up remaining few places where old `--image`\nargument was mentioned so that now all the documentation has\n`--include`. --image is deprecated.\n\nBoth old --image and new --include have the same short version -i\nand it remains the same. The code remains the same since the code\nhandles --include already.\n\nTested by running\nflashrom -h\nman ./flashrom.8.tmpl\n\nTicket: https://ticket.coreboot.org/issues/372\n\nChange-Id: If457e2b8548034868105b515125d7e8b4d5f6134\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70003\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71737\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "0b587f921aebd36aaa9f69faea0d2601386d7379", "tree": "c13c57f89dd385d3ed1bd76893cf7a251f8eba1a", "parents": [ "7310f19a07d70a16a0e6342ceb538854729282cd" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Fri Sep 09 23:01:05 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "spi: Make \u0027default_spi_write_aai\u0027 the default unless defined\n\nA NULL func pointer is necessary and sufficient for the\ncondition `NULL func pointer \u003d\u003e default_spi_write_aai\u0027 as to not\nneed this explicit specification of \u0027default\u0027.\n\nTherefore drop the explicit need to specify the \u0027default_spi_write_aai\u0027\ncallback function pointer in the spi_master struct. This is a reasonable\ndefault for every other driver in the tree with only a few exceptions.\n\nThis simplifies the code and driver development.\n\nflashrom-stable: Updated `dirtyjtag_spi` which was added earlier.\n\nChange-Id: I7f14aaea0edcf0c08cea0e9cd27d58152707fb2a\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67479\nOriginal-Reviewed-by: Peter Marheine \u003cpmarheine@chromium.org\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72369\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "7310f19a07d70a16a0e6342ceb538854729282cd", "tree": "b27e68cc1c3664e152f812cfedc96f895522fe3c", "parents": [ "9818b3faba2535bb99b658f72ee5e2d5c4fdbc41" ], "author": { "name": "Anastasia Klimchuk", "email": "aklm@chromium.org", "time": "Sat Dec 10 19:38:52 2022 +1100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "layout: Add new line to out of memory error message\n\nChange-Id: I1f5134378b7967931d52ee0556e2061c9a30d27f\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70552\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72368\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "9818b3faba2535bb99b658f72ee5e2d5c4fdbc41", "tree": "01503ea4eea05b1277dd51ea6c64b24d4323c78d", "parents": [ "32392b59d053a875088edbea0edf4e943ad9fe09" ], "author": { "name": "Felix Singer", "email": "felixsinger@posteo.net", "time": "Tue Nov 29 17:08:03 2022 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "meson.build: Rename conf object to config_manfile\n\nThe config data in the conf object is specific to the man file. Thus,\nrename it accordingly and also move the declaration to the place where\nit is used.\n\nChange-Id: Icf24b9c47d4c7553f1ec045a9dfd3685b1376445\nSigned-off-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70209\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72367\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "32392b59d053a875088edbea0edf4e943ad9fe09", "tree": "c6d7d1cc2d16c5c0d7cf9ff32da88d6b534a0928", "parents": [ "6edf9f8b8340904f88027e2d7c425b3509dae037" ], "author": { "name": "Nicholas Chin", "email": "nic.c3.14@gmail.com", "time": "Thu Dec 01 11:51:04 2022 -0700" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "flashrom.8.tmpl: Clarify supported ft2232_spi frequencies\n\nThe manpage suggests that ft2232_spi chips are only capable of up to\n6 MHz SPI clock frequencies, whereas flashrom disables the divide-by-5\nprescaler on the \u0027H\u0027 chips allowing up to 30 MHz frequencies. This\ndetail was already present in the comments of ft2232_spi.c.\n\nSigned-off-by: Nicholas Chin \u003cnic.c3.14@gmail.com\u003e\nChange-Id: Id7690e1d4e11a3d0495afbc650f3c67430946468\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70218\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72366\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "6edf9f8b8340904f88027e2d7c425b3509dae037", "tree": "37a416cffe047f9d57687c1d612f8c4fdc341b9d", "parents": [ "92ae5bbb4c1a7666d0ea36e93194070b402e30f3" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Sat Nov 12 12:08:46 2022 +1100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "flashrom.c: Replace \u0027exit(1)\u0027 leaks with return codes on err paths\n\nDo not just exit in the middle of the process, rather return\na value back up to the caller to allow proper resource cleanup\u0027s\nto occur.\n\nflashrom-stable:\n* Dropped change to extract_param() because it can\u0027t return errors\n\nChange-Id: Ie4186a40071e9a7296d601582ff15ad7df09c70a\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/69474\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72365\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "92ae5bbb4c1a7666d0ea36e93194070b402e30f3", "tree": "fb254d0b924aae29d893936b1002f6b6f2ddbb5d", "parents": [ "d4390883dfdeb9f348cfefc7c27e8711acd3451e" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Mon Sep 05 11:13:56 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "cli_classic.c: Make count_max_decode_exceedings() pure\n\nPass by argument the max_rom_decode structure such that the\nfunction is pure and defined upon its parameters.\n\nNote, unfortunately a itermediate step of a \u0027_\u0027 suffix is\nrequired for the \u0027max_rom_decode\u0027 parameter as to not alias\nthe global symbol within the function body.\n\nChange-Id: Ia01f77993deab68e251850008e885828e55b9462\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/68479\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72364\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "d4390883dfdeb9f348cfefc7c27e8711acd3451e", "tree": "e1bf229d5924b78e364722f7c4b369580906a493", "parents": [ "aba3658513da245a61ba59cfab9dba5facdb1054" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Fri Nov 18 22:53:56 2022 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "libpayload: Fix compiling bugs\n\nhwaccess_physmap.c: make `void *sys_physmap(()` static\n\nhwaccess_x86_io.c: Add missing include\n\nChange-Id: I5062c5a62b90f7a189488f3f569dc357bd2cb85f\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/69831\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Paul Menzel \u003cpaulepanter@mailbox.org\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72363\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "aba3658513da245a61ba59cfab9dba5facdb1054", "tree": "5924d8009154e6b59aa2e10a2f66a263fcf2d358", "parents": [ "00ea3898669aa35bb3f208c1d17f34e3a5c50795" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Mon Sep 05 11:09:28 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "flashrom.c: Move count_max_decode_exceeding() to cli\n\nThe count_max_decode_exceeding() function is only ever called\nwithin the cli_classic logic so move it there and make it\nstatic. This further cleans up the flashrom.c symbol namespace.\n\nChange-Id: If050eab7db8560676c03d5005a2b391313a0d642\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/68438\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72362\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "00ea3898669aa35bb3f208c1d17f34e3a5c50795", "tree": "e29e9590c5be29a0676bb9c099143b2d7f261679", "parents": [ "621208c341cb400b9b13b5874da49504818a9f49" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Tue Oct 11 21:27:37 2022 +1100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "flashrom.c: Separate out default layout init\n\nget_default_layout() is undefined without a\ninit_default_layout() so separate out that logic\nfrom probe_flash().\n\nChange-Id: I8fd0af8fb1c32dc9f2b00cc39b518d2f4d98e3ac\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/68296\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72361\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "621208c341cb400b9b13b5874da49504818a9f49", "tree": "1a851dd54e96add7fe6e30de98fe3b5e4424a775", "parents": [ "56684d9a2ed8a0f878472d5aa0518a3200526812" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Wed Sep 07 22:21:39 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "drivers/: Make \u0027fallback_{un}map\u0027 the default unless defined\n\nDrop the explicit need to specify the default \u0027fallback_{un}map\u0027\ncallback function pointer from the \u0027programmer_entry\u0027 struct.\nThis is a reasonable default for every other driver in the tree\nwith only a select few exceptions [atavia, serprog, dummyflasher\nand internal].\n\nThus this simplifies driver development and paves way\nto remove the \u0027programmer\u0027 global handle.\n\nflashrom-stable: Updated `dirtyjtag_spi` which was added earlier.\n\nChange-Id: I5ea7bd68f7ae2cd4af9902ef07255ab6ce0bfdb3\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67404\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72360\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "56684d9a2ed8a0f878472d5aa0518a3200526812", "tree": "020c2d8db0e05a74981b5b381c37febd46fb796d", "parents": [ "78ed668a924db5dd78c3530655127f895728fe59" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Wed Sep 07 10:47:45 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "drivers/: Make \u0027internal_delay\u0027 the default unless defined\n\nDrop the explicit need to specify the default \u0027internal_delay\u0027\ncallback function pointer in the programmer_entry struct.\nThis is a reasonable default for every other driver in the\ntree with only the two exceptions of ch341a_spi.c and serprog.c.\n\nThus this simplifies driver development.\n\nflashrom-stable: Updated `dirtyjtag_spi` which was added earlier.\n\nChange-Id: I17460bc2c0aebcbb48c8dfa052b260991525cc49\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67391\nOriginal-Reviewed-by: Peter Marheine \u003cpmarheine@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nOriginal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72359\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "78ed668a924db5dd78c3530655127f895728fe59", "tree": "a57ad8b3e2dd6823f86a4505ccd0071827a1a355", "parents": [ "3ecf0b6edcf75081128ba159a87871d78a3b97f7" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Mon Aug 08 21:55:07 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "print.c: Fix format string for Windows\n\ndwMajorVersion and dwMinorVersion are DWORDS. Cast them to `unsigned\nlong` to avoid a format error.\n\nTested: Builds on Cygwin (Windows 10, amd64, gcc 11.3.0)\n\nChange-Id: I049220089f42e488fcc88e6738522f64171720eb\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66547\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72358\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "3ecf0b6edcf75081128ba159a87871d78a3b97f7", "tree": "3c3588b0ac52158064069e16bd4ce3441fe6f7f8", "parents": [ "b975da1d94317004efeb4a3ab70ba045b5cec0cd" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Thu Aug 18 12:16:29 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "meson: Refactor the programmer selection\n\nThis implements a positive selection choice of which programmers should\nbe built.\n\n- Each programmer is represented through an entry in the programmer\n dictionary\n- The entry contains:\n - A list of systems and CPU families where the programmer can run on\n - A list of required dependencies\n - A list of sources needed to build the programmer\n - A list of compiler flags\n - A flag to determin if the programmer should be build on \u0027auto\u0027\n- If an entry is not given it is set to the default value\n- If a programmer gets selected, an \u0027active\u0027 flag is added to the entry\n on runtime\n- All programmers with an \u0027active\u0027 flag will be included in the build\n- One or more programmers can be selected through \u0027-Dprogrammer\u003d\u003c\u003e\u0027\n - \u0027auto\u0027 enables all programmers which are available, deps are found\n and have the \u0027default\u0027 flag\n - \u0027all\u0027 enables all programmers which are available and deps are found\n - \u0027group_***\u0027 enables all programmers which are available, deps are\n found and the programmer belongs to the selected group\n - \u0027_programmer_name_\u0027 forces the programmer to be built or the build\n will fail.\n\nChange-Id: Ib44b26e3748fc71f116184082b4aed0bb208b4c1\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/63724\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72357\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "b975da1d94317004efeb4a3ab70ba045b5cec0cd", "tree": "e865ae54d6f638ed5c13a0a4506b025991152790", "parents": [ "a12e0105e3fbfb55465251e621df04f682eb2e78" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Sat Aug 13 12:10:05 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "meson: Overhaul the print_wiki option\n\n- Rename `print_wiki` to `classic_cli_print_wiki`\n- Make it a meson feature type\n- `classic_cli` must be enabled to enable `classic_cli_print_wiki`\n- `classic_cli_print_wiki` is disabled by default\n\nChange-Id: Ic6c959b8b64ec2756b4535bd1b3320860f836aa5\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66703\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72356\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "a12e0105e3fbfb55465251e621df04f682eb2e78", "tree": "ee7a4c5b52de98bc0ea64fb3c1a7e48734e27e57", "parents": [ "bd82fa980566512dc937df084110cccd0b19a81f" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Sat Aug 13 12:42:05 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "meson: Build the classic cli / flashrom cli executable as feature\n\nProvide the meson option `-Dclassic_cli\u003dauto/enabled/disabled` to\ndetermine if the classic cli flashrom executable should be built. This\nis needed to support targets, like libpayload, which can only build\nlibflashrom.\n\nChange-Id: If39981ad0b3281edd6fc7e220362d2938dddf814\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66705\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72355\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "bd82fa980566512dc937df084110cccd0b19a81f", "tree": "f0c69fce9d7529d4d1f9dcc3426c8e0955052210", "parents": [ "b8db74a9b2bc91bb43942f7487c151bd598483b1" ], "author": { "name": "Felix Singer", "email": "felixsinger@posteo.net", "time": "Fri Aug 19 02:40:39 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "linux_mtd.c: Retype appropriate attributes with bool\n\nUse the bool type instead of an integer for appropriate attributes,\nsince this represents their purpose much better.\n\nSigned-off-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nChange-Id: I8be4e08e714047d155dcc032cc3d8dabb422b27f\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66881\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72354\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "b8db74a9b2bc91bb43942f7487c151bd598483b1", "tree": "8e2fdcf8c3bb95124ae1870bd7830fab6f415ee1", "parents": [ "f2a1e073434485d54172e95fc88845a2bd917636" ], "author": { "name": "Felix Singer", "email": "felixsinger@posteo.net", "time": "Fri Aug 19 00:19:26 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "internal.c: Retype appropriate variables with bool\n\nUse the bool type instead of an integer for the variables\n`force_laptop`, `not_a_laptop`, `force_boardenable` and\n`force_boardmismatch` since this represents their purpose much better.\n\nSigned-off-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nChange-Id: I159d789112d7a778744b59b45133df3928b8445e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66870\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72353\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "f2a1e073434485d54172e95fc88845a2bd917636", "tree": "321ac9d177424569e99faaf4d9be3d5c6df36780", "parents": [ "3b64d8107b56dc437cde606e17abaae435d7ba35" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Mon Aug 15 11:14:50 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "print.c: Move list of known boards to known_boards.c\n\nThis free\u0027s up namespace pollution and a layer of ifdef.\n\nChange-Id: Id098343b9b79fd9b01c7dc48e64756ad350f9d83\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66720\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72352\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "3b64d8107b56dc437cde606e17abaae435d7ba35", "tree": "3971e382111e87d2dc6d00e38e4198d78ec46eb7", "parents": [ "23b2b864777a09b4d9a9024675670a7d694c1e06" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Fri Aug 12 13:07:51 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "flashrom.c: Move print logic to print.c\n\nThis free\u0027s up flashrom.c from namespace pollution.\n\nChange-Id: I2724f7910fa3e01bcf49b8093260a4f1643df777\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66652\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72351\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "23b2b864777a09b4d9a9024675670a7d694c1e06", "tree": "223843e1109f7bb57556b9d527970ce3d296b536", "parents": [ "63f6a37984cf361229b433343ea9146c57a87f18" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Aug 23 18:07:54 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "ich_descriptors_tool/Makefile: Add missing `override` for CFLAGS\n\nThis allows to build `ich_descriptors_tool` with custom CFLAGS in the\nenvironment.\n\nChange-Id: If10f08e44141d05f0ee52615303652da576d2fc6\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66979\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72350\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "63f6a37984cf361229b433343ea9146c57a87f18", "tree": "0ebdaca6bbf8168b6bbb93da3b3be9dcc0336fe3", "parents": [ "ee3fbd7c7c05efbdea2ded8484bcfe96238f0124" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Fri Aug 12 12:56:43 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "parallel.c: Consoldiate parallel master registration logic\n\nThis is analogous to spi.c and opaque.c however parallel\nlogic was previously never consoldiated.\n\nThis free\u0027s up flashrom.c from namespace pollution.\n\nTested: builds with both make and meson.\n\nChange-Id: Ie08e2e6c51ccef5281386bf7e3df439b91573974\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66651\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72349\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "ee3fbd7c7c05efbdea2ded8484bcfe96238f0124", "tree": "6a364d738bf3a0881623bdc37e84b4ffa453e11b", "parents": [ "4c76c73e5f1ca1bb33199270714f650ad7bf4c53" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Mon Aug 15 10:53:32 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "flashrom.c: Move write_buf_to_file() to helpers_fileio.c\n\nConstructing a written file from a buffer is auxiliary\nfunctionality to the core flashrom algorithms. Move\naside to decrease the overall complexity of flashrom.c\n\nChange-Id: Ib613e74597d4bdd689043ba93aeb6a87ec80cc14\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66646\nOriginal-Reviewed-by: Evan Benn \u003cevanbenn@google.com\u003e\nOriginal-Reviewed-by: Sam McNally \u003csammc@google.com\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72348\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "4c76c73e5f1ca1bb33199270714f650ad7bf4c53", "tree": "1b74060951e91a9cbdc7e2b5ea54d0e8684aa577", "parents": [ "7a9daa0bc996b8a676187c6157a35a4d3ab5267e" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Fri Aug 12 11:03:00 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "flashrom.c: Move read_buf_from_file() to helpers_fileio.c\n\nConstructing a buffer from a read file is auxiliary\nfunctionality to the core flashrom algorithms. Move\naside to decrease the overall complexity of flashrom.c\n\nChange-Id: Ia6e1eeb876722899defb5b75346d1f22c70bfbd1\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66645\nOriginal-Reviewed-by: Evan Benn \u003cevanbenn@google.com\u003e\nOriginal-Reviewed-by: Sam McNally \u003csammc@google.com\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72347\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "7a9daa0bc996b8a676187c6157a35a4d3ab5267e", "tree": "2e253a719b6bcaddb8e0f0e82ca4a2bb1d87049a", "parents": [ "b7341b1acac4fde6bfb28ee2db83627f6feac781" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Fri Aug 12 19:52:23 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "Makefile: print dependency versions\n\nWhen a library is found, then print its version in the config target.\n\nChange-Id: Ie1ff8107311247fba9e5caa252d559447c871867\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66695\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72346\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "b7341b1acac4fde6bfb28ee2db83627f6feac781", "tree": "da8e0e114cb11c25fcf0e7776b9a699f30e53426", "parents": [ "2a768e4bdcec155f2abea5f231a17d7493359e37" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Sat Aug 13 12:21:44 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "meson: Build the ich_descriptors_tool as feature\n\nProvide the meson option `-Dich_descriptors_tool\u003dauto/enable/disabled`\nto determin if the ich_descriptors_tool should be build or not. On\n`auto` or `enabled` it will be, on `disabled` it will not be build.\nThis is usefull for environments where the ich_descriptors_tool is not\nneeded.\n\nChange-Id: Ief65a914019f72536d563eda36bd7f2f5330bea8\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66704\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72345\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "2a768e4bdcec155f2abea5f231a17d7493359e37", "tree": "e3c1a4258fd3d9a04507bd0edbe06406951cbe5c", "parents": [ "317b4ec62214d35bb514c34667a04fa11b161799" ], "author": { "name": "Felix Singer", "email": "felixsinger@posteo.net", "time": "Sun May 22 02:04:18 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "cli_classic.c: Make use of bool type in the main function\n\nUse the bool type instead of integer in the main function where\npossible, since this represents the purpose of some variables much\nbetter. Also, then we don\u0027t have to use the \"!!\" operator to turn any\nnumber into one or zero, which is used as an equivalent to true and\nfalse.\n\nAlso, since we have booleans and integers now, slightly change the\nordering of the variable declarations, so that the integers come before\nthe booleans.\n\nTested some parameters using the following commands:\n\nflashrom -L\n\nflashrom -p dummy\n\nflashrom -p dummy:emulate\u003dSST25VF040.REMS,image\u003dfoo2 -c \"SST25LF040A\" --progress -v foo1\n\nflashrom -p dummy:emulate\u003dSST25VF040.REMS,image\u003dfoo2 -c \"SST25LF040A\" --progress -w foo1\n\nflashrom -p dummy:emulate\u003dSST25VF040.REMS,image\u003dfoo2 -c \"SST25LF040A\" --progress -r foo1\n\nflashrom -p dummy:emulate\u003dSST25VF040.REMS,image\u003dfoo2 -c \"SST25LF040A\" --progress -E\n\nSigned-off-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nChange-Id: I06572da040e12ac88f8e5fc39f60a9e212b86bd7\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/64564\nOriginal-Reviewed-by: Evan Benn \u003cevanbenn@google.com\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Alexander Goncharov \u003cchat@joursoir.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72344\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" } ], "next": "317b4ec62214d35bb514c34667a04fa11b161799" }