)]}' { "log": [ { "commit": "f79edb9a11a74a2a1e7652badce5356f2ce38c1a", "tree": "8c343406448761849134777cf4a7c81b089a7d58", "parents": [ "a69c447b908c2e4b31df78eba830a88ab8547662" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Mon Jan 26 01:23:31 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 26 01:23:31 2009 +0000" }, "message": "Darwin / Mac OS X\n\nThrough DirectIO from coresystems GmbH we now support Darwin/Mac OS X.\nDirectIO is available at http://www.coresystems.de/en/directio\n\nCorresponding to flashrom svn r399 and coreboot v2 svn r3905.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "a69c447b908c2e4b31df78eba830a88ab8547662", "tree": "56b97dff2ef46cc42f38cf4272a06625c40509b9", "parents": [ "0593f21f1049e2dc8df1e2920c29ce9e93f7a663" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 26 01:16:09 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 26 01:16:09 2009 +0000" }, "message": "Small cleanup in Makefile\n\nCorresponding to flashrom svn r398 and coreboot v2 svn r3904.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "0593f21f1049e2dc8df1e2920c29ce9e93f7a663", "tree": "a542b94c7b06b0242a00a3e6c538a475bb2f86e5", "parents": [ "776d2021fd27ada1874cbe795b57f3cce1834c8b" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Mon Jan 26 01:10:48 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 26 01:10:48 2009 +0000" }, "message": "Abstract mmap() in physmap.c and only open /dev/mem on the first physmap() call\n\nCorresponding to flashrom svn r397 and coreboot v2 svn r3903.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "776d2021fd27ada1874cbe795b57f3cce1834c8b", "tree": "e8a335046cab5d44f31813a3eba296b860a0d27f", "parents": [ "a0d75a07b449b44cbccbd559d41c16f9d657f5b1" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 26 00:39:57 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 26 00:39:57 2009 +0000" }, "message": "Change flashrom.c:map_flash_registers() from int to void\n\nThe function exit()s on failure, and no callers check the return value.\n\nCorresponding to flashrom svn r396 and coreboot v2 svn r3901.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "a0d75a07b449b44cbccbd559d41c16f9d657f5b1", "tree": "1c38aed1f4f0118629c82707c6eb918eb8a2675c", "parents": [ "2dc3aaac4cc54c126a5c2f3590be90f47451428f" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 26 00:19:36 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 26 00:19:36 2009 +0000" }, "message": "Forgot some things in r3899\n\nCorresponding to flashrom svn r395 and coreboot v2 svn r3900.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "2dc3aaac4cc54c126a5c2f3590be90f47451428f", "tree": "952d80578717513ac0028fa48ae9368bacd5a92d", "parents": [ "f02edec2ae04d98d6fee1e0aaa354ec399afaabb" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 26 00:15:56 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 26 00:15:56 2009 +0000" }, "message": "Little readability improvement in cbtable.c:coreboot_init()\n\nCorresponding to flashrom svn r394 and coreboot v2 svn r3899.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "f02edec2ae04d98d6fee1e0aaa354ec399afaabb", "tree": "03ff961aad98c8dff3e95b9fd1115abf3ba0b151", "parents": [ "cedb09de9d27d1608e02158c710dd6f2908c8ef1" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Mon Jan 26 00:07:25 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 26 00:07:25 2009 +0000" }, "message": "Change FreeBSD #ifdef into #if defined()\n\nCorresponding to flashrom svn r393 and coreboot v2 svn r3898.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "cedb09de9d27d1608e02158c710dd6f2908c8ef1", "tree": "3c999ec60414975705887e63c4d8adbcf7ab64b2", "parents": [ "8440cc0ee51dca7ddadb95ac3fc32ab157455e06" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 25 23:59:30 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 25 23:59:30 2009 +0000" }, "message": "Make Makefile a bit more portable\n\nShell echo doesn\u0027t always know -n.\n\nCorresponding to flashrom svn r392 and coreboot v2 svn r3897.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "8440cc0ee51dca7ddadb95ac3fc32ab157455e06", "tree": "bba038683f4044f36089ffd997a205a7b4a10bf1", "parents": [ "5cafc33831ddbc92a3b59c49e2c61ac87f8a948e" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 25 23:55:12 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 25 23:55:12 2009 +0000" }, "message": "Add dry Am29F080B Am29LV081B SST39VF080 definitions per data sheets\n\nCorresponding to flashrom svn r391 and coreboot v2 svn r3896.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "5cafc33831ddbc92a3b59c49e2c61ac87f8a948e", "tree": "a41dd813b366abe249924b0054f1caadd0b48173", "parents": [ "9371dc3cb13a5382ddeb8b98ce2d3eca6a50d0ef" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 25 23:52:45 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 25 23:52:45 2009 +0000" }, "message": "Beautify flash chip ID verbose printout a little, always use %02x\n\nCorresponding to flashrom svn r390 and coreboot v2 svn r3895.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "9371dc3cb13a5382ddeb8b98ce2d3eca6a50d0ef", "tree": "8c666a70866ccc8079c621239496594d46ff37e1", "parents": [ "a657e94127137550ef8d460935c49daa6f3db87e" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 25 20:41:51 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 25 20:41:51 2009 +0000" }, "message": "Fix stupid off-by-one error in erase verification\n\nAs reported by Jody McIntyre. Thanks!\n\nCorresponding to flashrom svn r389 and coreboot v2 svn r3894.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "a657e94127137550ef8d460935c49daa6f3db87e", "tree": "ac742f55225cac376c21c601cdfde55775437bd3", "parents": [ "51f4062ff4ff5dc06ba5356389eff29b1113b3c8" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jan 24 23:01:08 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jan 24 23:01:08 2009 +0000" }, "message": "ST M50FW080 TEST_OK_ PROBE READ ERASE WRITE\n\nReport by Jody McIntyre. Thanks!\n\nCorresponding to flashrom svn r388 and coreboot v2 svn r3893.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "51f4062ff4ff5dc06ba5356389eff29b1113b3c8", "tree": "c462619586df2e4021342e2754140c3e2c7240db", "parents": [ "ccf8c6c79444108b45ed82d96b18cbdb6a8d2cff" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jan 24 01:32:40 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jan 24 01:32:40 2009 +0000" }, "message": "SST25VF080B TEST_OK_PROBE\n\nReport by Scaldov M.V. Thanks!\n\nCorresponding to flashrom svn r387 and coreboot v2 svn r3892.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "ccf8c6c79444108b45ed82d96b18cbdb6a8d2cff", "tree": "b7417fb2e24f15ed90e8102301ff365a71852878", "parents": [ "72c9668b9535bfe40d3e321faa26cfe5bb9a44b3" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Jan 23 05:23:06 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Jan 23 05:23:06 2009 +0000" }, "message": "Check all mmap() calls and print helpful Linux error message\n\nCorresponding to flashrom svn r386 and coreboot v2 svn r3890.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "72c9668b9535bfe40d3e321faa26cfe5bb9a44b3", "tree": "f002bdae8d1af4c4f46f6540c73772a34c028a92", "parents": [ "37179b807c416a4e7030a414454a3de484c1114c" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Thu Jan 22 22:53:59 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Thu Jan 22 22:53:59 2009 +0000" }, "message": "Provide some hints for the user in case /dev/mem mmap fails\n\nResolves #121\n\nCorresponding to flashrom svn r385 and coreboot v2 svn r3889.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "37179b807c416a4e7030a414454a3de484c1114c", "tree": "32deca3b0e458250d18bf239c4697447ceb68f66", "parents": [ "016d4e16f8154c747cc795de52f2b99ba3dac45b" ], "author": { "name": "FENG yu ning", "email": "fengyuning1984@gmail.com", "time": "Sun Jan 18 06:39:32 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 18 06:39:32 2009 +0000" }, "message": "Fix ICH9 locking register address and add important debug output\n\nCorresponding to flashrom svn r384 and coreboot v2 svn r3869.\n\nSigned-off-by: FENG yu ning \u003cfengyuning1984@gmail.com\u003e\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: FENG yu ning \u003cfengyuning1984@gmail.com\u003e\n" }, { "commit": "016d4e16f8154c747cc795de52f2b99ba3dac45b", "tree": "2c4d62220ce66b2ce18526a15fcc52ef261d37ce", "parents": [ "9982aefc8735f9bad10af463b01ac6ccfa0e2bd1" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Thu Jan 15 02:13:18 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Thu Jan 15 02:13:18 2009 +0000" }, "message": "Add ICH opcode debugging\n\nCorresponding to flashrom svn r383 and coreboot v2 svn r3862.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "9982aefc8735f9bad10af463b01ac6ccfa0e2bd1", "tree": "48fa23bd177f6b5d78353ba478c4f2886603463a", "parents": [ "f9ad0bb5c118af6dda6b9a96e931e59b42b617d2" ], "author": { "name": "Stephan Guilloux", "email": "stephan.guilloux@free.fr", "time": "Thu Jan 15 00:48:24 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jan 15 00:48:24 2009 +0000" }, "message": "Use designated initializers for the board enable table\n\nSimilarly to flashchips array, this patch intends to make the table board_pciid_enables more readable.\n\nCorresponding to flashrom svn r382 and coreboot v2 svn r3861.\n\nSigned-off-by: Stephan Guilloux \u003cstephan.guilloux@free.fr\u003e\n\n\u003e What real problem does this solve?\n\n1. Next time someone adds a new struct member, we avoid mistakes of\nordering of initializers\n2. we avoid mistakes in the first place.\n\nThe .x \u003d y stuff was added for a (good) reason, I think this is an\nimprovement.\nAcked-by: Ronald G. Minnich \u003crminnich@gmail.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "f9ad0bb5c118af6dda6b9a96e931e59b42b617d2", "tree": "368f4a26f2e9ce4ccb138fa49cb0b9d77b41d67e", "parents": [ "5807206cfe469be9e1bf0cfc079b583a2904a8ce" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Jan 13 14:32:27 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Jan 13 14:32:27 2009 +0000" }, "message": "Always print address when verification fails, not only with -V\n\nCorresponding to flashrom svn r381 and coreboot v2 svn r3860.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "5807206cfe469be9e1bf0cfc079b583a2904a8ce", "tree": "b03dd6a56b6db33a780122b6874fa803deca52c9", "parents": [ "d3bce83599358722791b6051ea45de70628adb57" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 12 21:31:14 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 12 21:31:14 2009 +0000" }, "message": "Board enable for GIGABYTE GA-MA78G-DS3H\n\nThis board has 2x MX25L8005 flash chips behind an IT8718F LPC-\u003eSPI bridge.\nThe board uses GIGABYTE\u0027s patented BIOS failover technology, and at this point\nwe do not know how to control which of the two chips flashrom actually hits.\n\nCorresponding to flashrom svn r380 and coreboot v2 svn r3859.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Yul Rottmann \u003cyulrottmann@bitel.net\u003e\n" }, { "commit": "d3bce83599358722791b6051ea45de70628adb57", "tree": "94f81a93a4b675f5d8bf942449420ff0201fc29f", "parents": [ "1fec0f35c70bede4c9d54e3007f609611b354f1e" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 12 21:28:03 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 12 21:28:03 2009 +0000" }, "message": "IT8718F works just like IT8716F\n\nCorresponding to flashrom svn r379 and coreboot v2 svn r3858.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Yul Rottmann \u003cyulrottmann@bitel.net\u003e\n" }, { "commit": "1fec0f35c70bede4c9d54e3007f609611b354f1e", "tree": "76d5371b6a5d6eaa6e0600a8e3d5a5cdcf98554b", "parents": [ "4cf3eefb84138f8b1f2578915520a4aff73dd92f" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 12 21:00:35 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jan 12 21:00:35 2009 +0000" }, "message": "Check return value of fscanf()/fwrite()/fread()\n\nFix build error on distros with warn_unused_result attributes in glibc.\n\nCorresponding to flashrom svn r378 and coreboot v2 svn r3857.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Yul Rottmann \u003cyulrottmann@bitel.net\u003e\n" }, { "commit": "4cf3eefb84138f8b1f2578915520a4aff73dd92f", "tree": "e3e52ca8e392abbee50b65fffda710ee7f3a3d66", "parents": [ "f8bc28fc3a52c4b635a4c2c1af3c105b44d5c475" ], "author": { "name": "Idwer Vollering", "email": "vidwer@gmail.com", "time": "Sun Jan 11 03:31:02 2009 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 11 03:31:02 2009 +0000" }, "message": "Update usage in README\n\nMimicked from flashrom.c\n\nCorresponding to flashrom svn r377 and coreboot v2 svn r3855.\n\nSigned-off-by: Idwer Vollering \u003cvidwer@gmail.com\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "f8bc28fc3a52c4b635a4c2c1af3c105b44d5c475", "tree": "9907373911d2536b2a54832367e7b20f02034062", "parents": [ "851ecf29f196e9f394db551fb76d8817a16a19ad" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jan 08 16:53:13 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jan 08 16:53:13 2009 +0000" }, "message": "Add erase and write functions to the following chip definitions\n\nAT25DF021 AT25DF041A AT25DF081 AT25DF161 AT25DF321 AT25DF321A AT25DF641\nAT25F512B AT25FS010 AT25FS040 AT26DF081A AT26DF161 AT26DF161A AT26DF321\nAT26F004\n\nStraight from the data sheets, untested because I lack the hardware.\n\nCorresponding to flashrom svn r376 and coreboot v2 svn r3853.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "851ecf29f196e9f394db551fb76d8817a16a19ad", "tree": "793432f605c14d1fab3ade89409f1e6c49259a72", "parents": [ "5c5b525652c1624d485e6c19e433f25f36ff04d5" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jan 08 04:56:59 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jan 08 04:56:59 2009 +0000" }, "message": "The flashrom man page has incomplete author/copyright sections and an incorrect license section\n\n- Remove the copyright listings and refer the reader to the source\n files.\n- Update the author list to those which have copyright messages in the\nsource files.\n- Correct the license from GPL v2+ to (GPL v2, with some files under\n later versions as well)\n\nCorresponding to flashrom svn r375 and coreboot v2 svn r3852.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "5c5b525652c1624d485e6c19e433f25f36ff04d5", "tree": "f53f3c1f10e18fe35f858b43574eb4afe2a534c5", "parents": [ "c208dfb66f2056d4817907613d7b26719b93f383" ], "author": { "name": "Stephan Guilloux", "email": "mailto:stephan.guilloux@free.fr", "time": "Thu Jan 08 03:40:17 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jan 08 03:40:17 2009 +0000" }, "message": "This patch improves machine parseability and human readability of flashchips.c\n\nThe explicit initialization makes sure any future struct flashchip\nreordering is not needed. (Except for the case where we need arrays\nof some of the struct members.)\n\nCorresponding to flashrom svn r374 and coreboot v2 svn r3851.\n\nSigned-off-by: Stephan Guilloux \u003cmailto:stephan.guilloux@free.fr\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "c208dfb66f2056d4817907613d7b26719b93f383", "tree": "b35494a4bafb94c6de27181b1e782efb84069702", "parents": [ "b5d677b5e329442f667e7302203ad8a3f51e38d3" ], "author": { "name": "Sven Schnelle", "email": "svens@stackframe.org", "time": "Wed Jan 07 12:35:09 2009 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Jan 07 12:35:09 2009 +0000" }, "message": "Add SST49LF020 support\n\nCorresponding to flashrom svn r373 and coreboot v2 svn r3850.\n\nSigned-off-by: Sven Schnelle \u003csvens@stackframe.org\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "b5d677b5e329442f667e7302203ad8a3f51e38d3", "tree": "f530f6f3843e6e8e4753286be1039d2fc248061f", "parents": [ "ed2352b3b61b53c42b10f690f131de4d52819ba2" ], "author": { "name": "Sven Schnelle", "email": "svens@stackframe.org", "time": "Wed Jan 07 12:15:46 2009 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Jan 07 12:15:46 2009 +0000" }, "message": "Add AMD-768 chipset support\n\nCorresponding to flashrom svn r372 and coreboot v2 svn r3849.\n\nSigned-off-by: Sven Schnelle \u003csvens@stackframe.org\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "ed2352b3b61b53c42b10f690f131de4d52819ba2", "tree": "dd4664cab7b828e6bc2dc9585e1ae7b0c8d8d0dd", "parents": [ "58783e395f7f46c04448eee4c0cbde26bffd7fc5" ], "author": { "name": "Sven Schnelle", "email": "svens@stackframe.org", "time": "Wed Jan 07 12:11:13 2009 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Jan 07 12:11:13 2009 +0000" }, "message": "Add i631x LPC support\n\nCorresponding to flashrom svn r371 and coreboot v2 svn r3848.\n\nSigned-off-by: Sven Schnelle \u003csvens@stackframe.org\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "58783e395f7f46c04448eee4c0cbde26bffd7fc5", "tree": "bb2cdf585ae0b6943587505ecb11079d5c6a0324", "parents": [ "0ab42985587bf1dc58ab0b90cba5a2e135a6776b" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Mon Dec 22 16:42:59 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Mon Dec 22 16:42:59 2008 +0000" }, "message": "If you pass a bogus layout file to the -l option flashrom will segfault\n\nFix that by throwing an error instead.\n\nCorresponding to flashrom svn r370 and coreboot v2 svn r3834.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "0ab42985587bf1dc58ab0b90cba5a2e135a6776b", "tree": "92a4df06a286b3a4ff90c36cf27aaa48714ed453", "parents": [ "e8a3e4c20996157aabaa8106b9b35df59d52afad" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Mon Dec 22 16:40:45 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Mon Dec 22 16:40:45 2008 +0000" }, "message": "Add another board-enable line for the Kontron 986LCD-M/mITX\n\nThere seem to be at least two versions of the board out there, and the\nsubsystem IDs changed between the versions.\n\nPatch successfully tested on hardware.\n\nCorresponding to flashrom svn r369 and coreboot v2 svn r3833.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "e8a3e4c20996157aabaa8106b9b35df59d52afad", "tree": "ac7eb7097f24efb52eca53b2eaf846defbdd1b7d", "parents": [ "f041e9b5865c9b5544905d163b47d2387732c634" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Dec 22 14:12:08 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Dec 22 14:12:08 2008 +0000" }, "message": "Initialize ICH SPI opcodes also for ICH9 and later\n\nCorresponding to flashrom svn r368 and coreboot v2 svn r3830.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "f041e9b5865c9b5544905d163b47d2387732c634", "tree": "7e43780959ba8b54ea09bc0711ef3e31bc989df7", "parents": [ "7de8639b29c4988ccf7ee110fc5ba6e7e66986f8" ], "author": { "name": "FENG yu ning", "email": "fengyuning1984@gmail.com", "time": "Mon Dec 15 02:32:11 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Dec 15 02:32:11 2008 +0000" }, "message": "Various ichspi.c refinements\n\n* add a generic preop-opcode-pair table.\n\n* rename ich_check_opcodes to ich_init_opcodes.\n\n* let ich_init_opcodes do not need to access flashchip structure:\n . move the definition of struct preop_opcode_pair to a better place\n . remove preop_opcode_pairs from \u0027struct flashchip\u0027\n . modify ich_init_opcodes and generate_opcodes so that they do not access the flashchip structure\n\n* call ich_init_opcodes during chipset enable. Now OPCODES generation mechanism works.\n\n* fix a coding style mistake.\n\nCorresponding to flashrom svn r367 and coreboot v2 svn r3814.\n\nSigned-off-by: FENG yu ning \u003cfengyuning1984@gmail.com\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "7de8639b29c4988ccf7ee110fc5ba6e7e66986f8", "tree": "674cb17350e969d10c48dc2639f86b3d9aac35f6", "parents": [ "90eff15351782d195fb1175cbc2a3f39b1792c06" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Dec 10 10:32:05 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Dec 10 10:32:05 2008 +0000" }, "message": "Add 28 flash chips of the MX29 series to the flashrom ID table and support the MX29LV040C\n\nMX29LV040C probe and read support tested by khetzal on IRC.\n\nCorresponding to flashrom svn r366 and coreboot v2 svn r3809.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "90eff15351782d195fb1175cbc2a3f39b1792c06", "tree": "1acd2edd4483d24a9eb3e70dfc8d9cb3c6242c9a", "parents": [ "c05a295dc33b273d16c2d289ffd95ba688727511" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 08 23:51:45 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 08 23:51:45 2008 +0000" }, "message": "Kill obsolete and misplaced comment\n\nCorresponding to flashrom svn r365 and coreboot v2 svn r3806.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "c05a295dc33b273d16c2d289ffd95ba688727511", "tree": "ad6db2e33101079d2b713bef06666b5e8e937eec", "parents": [ "ff692fb56777cbbf04e5c4858029340003190f5f" ], "author": { "name": "FENG yu ning", "email": "fengyuning1984@gmail.com", "time": "Mon Dec 08 18:16:58 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Mon Dec 08 18:16:58 2008 +0000" }, "message": "Generates OPCODES struct from the ICH7/ICH9/VIA chipset if its SPI configuration is locked down\n\nCorresponding to flashrom svn r364 and coreboot v2 svn r3805.\n\nSigned-off-by: FENG yu ning \u003cfengyuning1984@gmail.com\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "ff692fb56777cbbf04e5c4858029340003190f5f", "tree": "c5cea2ad6750e578e38a6440f327c15423ae2e00", "parents": [ "f0ef27bc5af918581ee4087854c25b54c0d145b6" ], "author": { "name": "FENG yu ning", "email": "fengyuning1984@gmail.com", "time": "Mon Dec 08 18:15:10 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Mon Dec 08 18:15:10 2008 +0000" }, "message": "Breaks chip info into multiple lines\n\nCorresponding to flashrom svn r363 and coreboot v2 svn r3804.\n\nSigned-off-by: FENG yu ning \u003cfengyuning1984@gmail.com\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "f0ef27bc5af918581ee4087854c25b54c0d145b6", "tree": "86c0c65dd3a1c07610ed189be197e2fac2bca0ad", "parents": [ "f63c0dcba949ff8a50f1670282d16d25eb8df782" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Dec 06 01:37:09 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Dec 06 01:37:09 2008 +0000" }, "message": "Display test status in -L chip listing\n\nLooks like this:\n\nSupported flash chips: Tested OK operations: Known BAD operations:\n\nAMD Am29F002(N)BB \nAMD Am29F002(N)BT PROBE READ ERASE WRITE \nAMD Am29F016D \nAMD Am29F040B PROBE READ ERASE WRITE \nAMD Am29LV040B \nAtmel AT45CS1282 READ \n\nCorresponding to flashrom svn r362 and coreboot v2 svn r3803.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "f63c0dcba949ff8a50f1670282d16d25eb8df782", "tree": "b3fd28e195ded56370e835726383f1dc14082176", "parents": [ "2fcc0b52e48b32de27086cfd7f2675c2b6600ee2" ], "author": { "name": "Niels Ole Salscheider", "email": "niels_ole@salscheider-online.de", "time": "Fri Dec 05 11:58:43 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Dec 05 11:58:43 2008 +0000" }, "message": "Add AMD SB700 flash enable\n\nThis patch adds SB700 support to flashrom. The code for enabling the flash\nrom is the same as for SB600. It was tested (read, write, verify) with an\nASUS M3A-H/HDMI which contains a Macronix MX25L8005.\n\nCorresponding to flashrom svn r361 and coreboot v2 svn r3799.\n\nSigned-off-by: Niels Ole Salscheider \u003cniels_ole@salscheider-online.de\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "2fcc0b52e48b32de27086cfd7f2675c2b6600ee2", "tree": "024eaf03d347d0320789b475f48ea6d9c1db0217", "parents": [ "f0c811dd15d09bee9c5ff34ed96930b3720a6f79" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Dec 05 11:56:57 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Dec 05 11:56:57 2008 +0000" }, "message": "Fix compilation of r3797 with gcc-4.3.2\n\nThanks to Niels Ole Salscheider for the problem report.\n\nCorresponding to flashrom svn r360 and coreboot v2 svn r3798.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "f0c811dd15d09bee9c5ff34ed96930b3720a6f79", "tree": "3f3bf981b01be6ba1c5330dc6289eabdd9678ce7", "parents": [ "052cdc337e0c57156d6eb6ea36d707a232a2fa1a" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Dec 05 02:22:30 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Dec 05 02:22:30 2008 +0000" }, "message": "Check if erase succeeds and exit with error on failure\n\nFlashrom used to exit 0 even if erase failed. Not anymore.\n\nCorresponding to flashrom svn r359 and coreboot v2 svn r3797.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "052cdc337e0c57156d6eb6ea36d707a232a2fa1a", "tree": "164778141e94c5f7c7cabee4059d9cfc6f21b3f6", "parents": [ "7ccce54a69770051aa39ce7cfd8958eea6cbf685" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Dec 04 00:58:10 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Dec 04 00:58:10 2008 +0000" }, "message": "Add RDID/REMS IDs for the following flash chips\n\nSST_25VF512A_REMS\nSST_25VF010_REMS\nSST_25VF020_REMS\nSST_25VF040_REMS\nSST_25VF040B_REMS\nSST_25VF080_REMS\nSST_25VF080B_REMS\nSST_25VF032B_REMS\nSST_26VF016\nSST_26VF032\nW_25X16\nW_25X32\nW_25X64\n\nStraight from the data sheets.\n\nThe REMS IDs help in case the RDID opcode is unavailable (due to opcode\nlockdown) or unsupported by the chip.\n\nSome day, we need to pair probe functions together with IDs. Multiple\npairs can exist per chip and duplicating chip definitions does not\nreally make sense.\n\nCorresponding to flashrom svn r358 and coreboot v2 svn r3793.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "7ccce54a69770051aa39ce7cfd8958eea6cbf685", "tree": "9ddcc393be14c4078b38b90daad71af329f28d0c", "parents": [ "73bdb92b5d753a39af733df1932e42839de88e8a" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Dec 03 23:36:48 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Dec 03 23:36:48 2008 +0000" }, "message": "Gcc thinks base could be used uninitialized, so shut it up\n\nBug from r3791.\n\nCorresponding to flashrom svn r357 and coreboot v2 svn r3792.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "73bdb92b5d753a39af733df1932e42839de88e8a", "tree": "888e2d264d1efaad725d2a64d9581767fb376f17", "parents": [ "9a6d1764a2a506f26b5e09bc155a6f1649ce7bdc" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Dec 03 21:39:56 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Dec 03 21:39:56 2008 +0000" }, "message": "Fix bug in r3790\n\nIf flashbase was set before probe_flash() it would only ever be used once, for\nthe very first flash chip probe.\n\nCorresponding to flashrom svn r356 and coreboot v2 svn r3791.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "9a6d1764a2a506f26b5e09bc155a6f1649ce7bdc", "tree": "2beae788f35f5893b5cee831bf43b1f248b99374", "parents": [ "13f98cefb784f55ac38e7c90be2975c4ee4bdf92" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Wed Dec 03 21:24:40 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Dec 03 21:24:40 2008 +0000" }, "message": "Replace #ifdefs for sc520 systems by run time probing\n\nFixes #109\n\nCorresponding to flashrom svn r355 and coreboot v2 svn r3790.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "13f98cefb784f55ac38e7c90be2975c4ee4bdf92", "tree": "4fa61941e7b6df02ea3ea6fdbf2a762c80485edc", "parents": [ "0faf03e6475c6e2b7a695cbe92b3bfc4fe13b5c1" ], "author": { "name": "Jason Wang", "email": "Qingpei.wang@amd.com", "time": "Sat Nov 29 15:07:15 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Sat Nov 29 15:07:15 2008 +0000" }, "message": "Copyright update by Jason Wang for freshly written sb600 code\n\nCorresponding to flashrom svn r354 and coreboot v2 svn r3782.\n\nSigned-off-by: Jason Wang \u003cQingpei.wang@amd.com\u003e\nReviewed-by: Joe, Bao \u003cZheng.Bao@amd.com\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "0faf03e6475c6e2b7a695cbe92b3bfc4fe13b5c1", "tree": "31d0d6c348dcfb6b75c6a5e647dc50b94a0b51f0", "parents": [ "6a0a25cada03fc6a36a065db18b29ca832288aa6" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Nov 28 23:47:55 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Nov 28 23:47:55 2008 +0000" }, "message": "Declare special commands to support the Atmel AT25F512A\n\nCorresponding to flashrom svn r353 and coreboot v2 svn r3781.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "6a0a25cada03fc6a36a065db18b29ca832288aa6", "tree": "43c7d76d6be2b101cc4d8c7c6040dfc977cb6701", "parents": [ "a3f04be761d45aed2f6113eb2a6d08679370f546" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Nov 28 23:45:27 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Nov 28 23:45:27 2008 +0000" }, "message": "Do not indicate known-bad functions as untested\n\nIf a chip has any TEST_BAD_* flag set, we don\u0027t even list the\nunsupported functions, giving the user the impression that the\nunsupported functions are tested.\n\nCorresponding to flashrom svn r352 and coreboot v2 svn r3780.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "a3f04be761d45aed2f6113eb2a6d08679370f546", "tree": "b1e437eb9e184676bc4ca62472bfb103ca4d2196", "parents": [ "7f30022fb0fb62a484514e50d5b3f15157a5885d" ], "author": { "name": "Jason Wang", "email": "Qingpei.Wang@amd.com", "time": "Fri Nov 28 21:36:51 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Fri Nov 28 21:36:51 2008 +0000" }, "message": "Add support for the AMD/ATI SB600 southbridge SPI functionality\n\nThis has been tested by Uwe Hermann on an RS690/SB600 board.\n\nCorresponding to flashrom svn r351 and coreboot v2 svn r3779.\n\nSigned-off-by: Jason Wang \u003cQingpei.Wang@amd.com\u003e\nReviewed-by: Joe Bao \u003czheng.bao@amd.com\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "7f30022fb0fb62a484514e50d5b3f15157a5885d", "tree": "61376bc0e4b1059bb7776f76df178961a5ae74a9", "parents": [ "14e50ac12310eac97f64ee8d6cb17dfb6407259b" ], "author": { "name": "Jason Wang", "email": "Qingpei.Wang@amd.com", "time": "Fri Nov 28 05:40:27 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Nov 28 05:40:27 2008 +0000" }, "message": "Add SST25VF080B flash chip support\n\nThis is the first chip which uses the infrastructure for alternative\nerase commands, namely spi_chip_erase_60_c7().\n\nCorresponding to flashrom svn r350 and coreboot v2 svn r3776.\n\nSigned-off-by: Jason Wang \u003cQingpei.Wang@amd.com\u003e\nReviewed-by: Joe Bao \u003czheng.bao@amd.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "14e50ac12310eac97f64ee8d6cb17dfb6407259b", "tree": "db1512123838cee8ce82f11fb61def54898b073f", "parents": [ "92a54ca0300dd6e0f9773a4313ab489df79020c7" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Nov 28 01:25:00 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Nov 28 01:25:00 2008 +0000" }, "message": "Flashrom already has the following probe functions\n\n- probe_spi_rdid with opcode 0x9f, usually 3 bytes ID\n- probe_spi_res with opcode 0xab, usually 1 byte ID\nWe are missing the following probe function:\n- probe_spi_rems with opcode 0x90, usually 2 bytes ID\n\nRDID provides best specifity (manufacturer, device class and device) and\nRES is supported by quite a few old chips. However, RES only returns one\nbyte and there are multiple flash chips with different sizes on the\nmarket and all of them have the same RES ID.\nREMS is from the same age as RES, but it provides a manufacturer and a\ndevice ID. It is therefore on par with the probing for parallel flash\nchips and specific enough.\n\nThe order in which chips should be detected is as follows:\n1. RDID\n2. REMS\n3. RES\n\nCorresponding to flashrom svn r349 and coreboot v2 svn r3775.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "92a54ca0300dd6e0f9773a4313ab489df79020c7", "tree": "873b9b570fd7b47fd5ff1aefea826c55e422ac71", "parents": [ "ebaffb6e51fcda2f3a337e86cbce5f5598c19367" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Nov 27 22:48:48 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Nov 27 22:48:48 2008 +0000" }, "message": "Try RES even if RDID fails\n\nThe existing check in probe_spi_res() was right for SPI controllers\nwhich support all commands, but may not exist. For controllers which\nsupport only a subset of commands, it will fail in unexpected ways. Even\nif a command is supported by the controller, it may be unavailable if\nthe controller is locked down.\n\nThe new logic checks if RDID could be issued and its return values\nmade sense (not 0xff 0xff 0xff). In that case, RES probing is not\nperformed. Otherwise, we try RES. There is one drawback: If RDID\nreturned unexpected values, we don\u0027t issue a RES probe. However, in that\ncase we should try to match RDID anyway.\n\nCorresponding to flashrom svn r348 and coreboot v2 svn r3774.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: FENG yu ning \u003cfengyuning1984@gmail.com\u003e\n" }, { "commit": "ebaffb6e51fcda2f3a337e86cbce5f5598c19367", "tree": "6203684081e810621e56cbc839a3210be0f7bb78", "parents": [ "738fdffe4079f72e2ebd10d7d8d94f526bd86e1f" ], "author": { "name": "Tero O Peippola", "email": "xeropp@gmail.com", "time": "Mon Nov 24 20:23:23 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Nov 24 20:23:23 2008 +0000" }, "message": "Add support for 32Mbit SPI flash SST25VF032B\n\nTested on gigabyte m57sli.\n\nFile util/flashrom/flash.h already had correct ID for that part.\n\nCorresponding to flashrom svn r347 and coreboot v2 svn r3769.\n\nSigned-off-by: Tero O Peippola \u003cxeropp@gmail.com\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "738fdffe4079f72e2ebd10d7d8d94f526bd86e1f", "tree": "2b702013808150a8829f47becd5e61e4a569400b", "parents": [ "598ec58e045715e75f43b8f13732caf8cd5193e3" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 18 00:43:14 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 18 00:43:14 2008 +0000" }, "message": "ichspi: use spi_nbyte_read() instead of running the opcode directly\n\nCurrently flashrom assumes every vendor BIOS shares our view about which\nSPI opcodes should be placed in which location.\n\nMove to a less optimistic implementation and actually use the generic\nSPI read functions. They\u0027re useful for abstracting exactly this stuff\nand that makes them the preferred choice.\n\nCorresponding to flashrom svn r346 and coreboot v2 svn r3758.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "598ec58e045715e75f43b8f13732caf8cd5193e3", "tree": "d749b21ab64b5d12af4f22f5e0fb214d890111e8", "parents": [ "76c2887154d00fc3350bd27ca9f14c5f38ce0fca" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 18 00:41:02 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 18 00:41:02 2008 +0000" }, "message": "Check for failed SPI command execution\n\nAlthough SPI itself does not have a mechanism to signal command failure,\nthe SPI host may be unable to send a given command over the wire due\nto security or hardware limitations. The current code ignores these\nmechanisms completely and simply assumes almost every command succeeds.\nComplain if SPI command execution fails.\n\nSince locked down Intel chipsets (like the one we had problems with\nearlier) only allow a small subset of commands, find the common subset\nof commands between the chipset and the ROM in the chip erase case. That\nis accomplished by the new spi_chip_erase_60_c7() which can be used for\nchips supporting both 0x60 and 0xc7 chip erase commands.\n\nBoth parts of the patch address problems seen in the real world. The\nincreased verbosity for the error case will help us diagnose and address\nproblems better.\n\nCorresponding to flashrom svn r345 and coreboot v2 svn r3757.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nOtherwise: Acked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "76c2887154d00fc3350bd27ca9f14c5f38ce0fca", "tree": "7be12c95925a8338526b94daf74993b93975330d", "parents": [ "986cae6790b6b9ce078fed49da10f67866e4a502" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 18 00:36:26 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 18 00:36:26 2008 +0000" }, "message": "Implement read support for the following Atmel chips\n\nAT25DF021\nAT25DF041A\nAT25DF081\nAT25DF161\nAT25DF321A\nAT25DF641\nAT25F512B\nAT25FS010\nAT25FS040\nAT26DF041\nAT26DF081A\nAT26DF161\nAT26DF161A\nAT26DF321\nAT26F004\n\nI double-checked the data sheets and am confident this will work.\n\nCorresponding to flashrom svn r344 and coreboot v2 svn r3756.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "986cae6790b6b9ce078fed49da10f67866e4a502", "tree": "c40c49c3dfabb543d4401a8fe3e1f9062e75116a", "parents": [ "d54ef6e789712b41cb4190021448f4fcaa729c56" ], "author": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Mon Nov 17 15:31:56 2008 +0000" }, "committer": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Mon Nov 17 15:31:56 2008 +0000" }, "message": "SST39VF020 TEST_OK_ PROBE READ ERASE WRITE\n\nTested fully on a ThinCan DBE61A\n\nCorresponding to flashrom svn r343 and coreboot v2 svn r3755.\n\nSigned-off-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\nAcked-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\n" }, { "commit": "d54ef6e789712b41cb4190021448f4fcaa729c56", "tree": "0fe9eee0b40661b65917d220454c932166d38cfd", "parents": [ "fc4a369669d9a113ae312b0a74874660f8eb5107" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Nov 15 13:55:43 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Nov 15 13:55:43 2008 +0000" }, "message": "The AT25 and AT26 series SPI chips from Atmel are plain EEPROMs\n\nThe AT45 series SPI chips are DataFlash EEPROMs which means they have\nodd (non-power-of-two) sector sizes, but some of the DataFlash chips can\nbe configured or ordered with power-of-two sector sizes.\n\nAdd probe support for the following Atmel SPI chips:\nAT25DF021\nAT25DF041A\nAT25DF081\nAT25DF161\nAT25DF321A\nAT25DF641\nAT25F512B\nAT25FS010\nAT25FS040\nAT26DF041\nAT26DF081A\nAT26DF161\nAT26DF161A\nAT26DF321\nAT26F004\nAT45CS1282\nAT45DB011D\nAT45DB021D\nAT45DB041D\nAT45DB081D\nAT45DB161D\nAT45DB321C\nAT45DB321D\nAT45DB642D\n\nAdd an explanation why the following chips can\u0027t be probed:\nAT45BR3214B\nAT45D011\nAT45D021A\nAT45D041A\nAT45D081A\nAT45D161\nAT45DB011\nAT45DB011B\nAT45DB021A\nAT45DB021B\nAT45DB041A\nAT45DB081A\nAT45DB161\nAT45DB161B\nAT45DB321\nAT45DB321B\nAT45DB642\n\nAdd the ID, but no probing function for this chip:\nAT25F512A\n\nCorresponding to flashrom svn r342 and coreboot v2 svn r3754.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nTested-by: Jesse Brandeburg \u003cjesse.brandeburg@intel.com\u003e\nTested-by: Andriy Gapon \u003cavg@icyb.net.ua\u003e\nAcked-by: Myles Watson \u003cmylesgw@gmail.com\u003e\n" }, { "commit": "fc4a369669d9a113ae312b0a74874660f8eb5107", "tree": "1d4dfd00c21f409a4278f9215d6124ebb8695a3e", "parents": [ "16d9c5be7fde1dbcb82a78333aaf6a03d454b434" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Nov 08 01:39:12 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Nov 08 01:39:12 2008 +0000" }, "message": "SST39SF040 TEST_OK_ PROBE READ ERASE WRITE\n\nPer report from Mario Rogen. Thanks!\n\nCorresponding to flashrom svn r341 and coreboot v2 svn r3736.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "16d9c5be7fde1dbcb82a78333aaf6a03d454b434", "tree": "490fa24de715d51e5f2019c6c649ba0e3f25e540", "parents": [ "1c2ec28ce499e532e2502b40364a1ce171b95b5c" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Nov 05 22:54:36 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Nov 05 22:54:36 2008 +0000" }, "message": "Mark ST M25P16 as fully tested\n\nThis has been confirmed by Stéphan Guilloux.\n\nCorresponding to flashrom svn r340 and coreboot v2 svn r3731.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "1c2ec28ce499e532e2502b40364a1ce171b95b5c", "tree": "5958d8798ad595203e59d0d7f0eecb089e0225a5", "parents": [ "d3b0e39f4cdee227afbbbe5ea6969f7151be471a" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 04 12:11:12 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 04 12:11:12 2008 +0000" }, "message": "Add support for 8 new chips and fix up 2 existing chips as well\n\nReplace age-old TODO comments with real explanations.\n\nFixed chips:\nFujitsu MBM29F400TC (ID definition)\nMacronix MX29F002T (chip name)\n\nNew chips:\nFujitsu MBM29F004BC\nFujitsu MBM29F004TC\nFujitsu MBM29F400BC\nMacronix MX25L512\nMacronix MX25L1005\nMacronix MX25L2005\nMacronix MX25L6405\nMacronix MX29F002B\n\nStraight from the data sheets, compile tested only.\n\nCorresponding to flashrom svn r339 and coreboot v2 svn r3730.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "d3b0e39f4cdee227afbbbe5ea6969f7151be471a", "tree": "ba19936d752c92482a9e2d507518725c594da8d7", "parents": [ "6afb613fefbd4b484babafa9680b9570aadb255d" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Nov 03 00:20:22 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Nov 03 00:20:22 2008 +0000" }, "message": "Dump ICH8/ICH9/ICH10 SPI registers\n\nThis helps a lot if we have to track down configuration weirdnesses.\n\nCorresponding to flashrom svn r338 and coreboot v2 svn r3723.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "6afb613fefbd4b484babafa9680b9570aadb255d", "tree": "582cf605e44d2d9c92de406d11cf850dd83b9fff", "parents": [ "4311956a807be357848216d5fdf665053b7ca524" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Nov 03 00:02:11 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Nov 03 00:02:11 2008 +0000" }, "message": "Add additional SPI sector erase and chip erase command functions\n\nNot all chips support all commands, so allow the implementer to select\nthe matching function. Fix a layering violation in ICH SPI code to be\nless bad. Still not perfect, but the new code is shorter, more generic\nand architecturally more sound.\n\nTODO (in a separate patch): - move the generic sector erase code to\nspi.c - decide which erase command to use based on info about the chip -\ncreate a generic spi_erase_all_sectors function which calls the generic\nsector erase function\n\nThanks to Stefan for reviewing and commenting.\n\nCorresponding to flashrom svn r337 and coreboot v2 svn r3722.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "4311956a807be357848216d5fdf665053b7ca524", "tree": "5b85af0b55a42b8bd9915d96241f6e12cfc2c8e9", "parents": [ "96e1b5507993eb62aebc4bd5bc5e3ecefae69a7e" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Sun Nov 02 19:51:50 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Sun Nov 02 19:51:50 2008 +0000" }, "message": "Drop nr/opcode_index parameter from run_opcode and search the opmenu for the opcode instead\n\nThis is slightly slower (ha, ha), but works on boards with a locked\nopmenu. Tested on ICH7 and works.\n\nCorresponding to flashrom svn r336 and coreboot v2 svn r3721.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "96e1b5507993eb62aebc4bd5bc5e3ecefae69a7e", "tree": "4af8e52788e4decd8a96c9b5217bd59bf8e02bf3", "parents": [ "81f730f792b304c713015609580969051e116d3f" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Nov 02 14:25:11 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Nov 02 14:25:11 2008 +0000" }, "message": "Add support for the ST M50FW002 chip\n\nIdentification only, erase/write are not implemented.\n\nCorresponding to flashrom svn r335 and coreboot v2 svn r3717.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n\ntested and\nAcked-by: Elia Yehuda \u003cz4ziggy@gmail.com\u003e\n" }, { "commit": "81f730f792b304c713015609580969051e116d3f", "tree": "ebcbf01445d1fdcf5fdbe8094964cf759005a61a", "parents": [ "424ed22ee975e80a61e2c3222dda757c39ebdf24" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Oct 30 03:10:17 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Oct 30 03:10:17 2008 +0000" }, "message": "Mark two more chips as fully tested\n\n - SST SST39SF010A\n - Winbond W29C011\n\nTested by me on actual hardware, all operations.\n\nCorresponding to flashrom svn r334 and coreboot v2 svn r3708.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "424ed22ee975e80a61e2c3222dda757c39ebdf24", "tree": "604ec97701af76c957c5b8eef17adab3bc95a02f", "parents": [ "b759db2cb510c3dc0a33bfdf8d9f757de500c664" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Wed Oct 29 22:13:20 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Wed Oct 29 22:13:20 2008 +0000" }, "message": "Flashrom support for some Numonyx parts (M25PE)\n\nUsing block erase d8 as discussed with Peter Stuge\n\nCorresponding to flashrom svn r333 and coreboot v2 svn r3707.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "b759db2cb510c3dc0a33bfdf8d9f757de500c664", "tree": "e21d91b2aff114a28b59fa57ae2e74495ae3f645", "parents": [ "2bc9f377597bde4c612db4a3ac97cd552c346ad0" ], "author": { "name": "Ed Swierk", "email": "eswierk@aristanetworks.com", "time": "Wed Oct 29 14:54:36 2008 +0000" }, "committer": { "name": "Ed Swierk", "email": "eswierk@arastra.com", "time": "Wed Oct 29 14:54:36 2008 +0000" }, "message": "Enable SPI boot flash support on EP80579, which has the ICH7 register set\n\nCorresponding to flashrom svn r332 and coreboot v2 svn r3706.\n\nSigned-off-by: Ed Swierk \u003ceswierk@aristanetworks.com\u003e\nAcked-by: Ed Swierk \u003ceswierk@aristanetworks.com\u003e\n" }, { "commit": "2bc9f377597bde4c612db4a3ac97cd552c346ad0", "tree": "a325429f59f4e1db4d989f67193966c3794ab444", "parents": [ "c556d320000949a9b82a367d9ad9d6312fe91d2a" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 28 12:00:59 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 28 12:00:59 2008 +0000" }, "message": "Mark Winbond W39V040FA (512 KB) as fully supported\n\nTested by Martin Stecklum \u003cstecky@gmx.net\u003e (both write and erase).\nThe tests were done on an MSI MS-7065 board, so that\u0027s supported now too.\n\nCorresponding to flashrom svn r331 and coreboot v2 svn r3697.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "c556d320000949a9b82a367d9ad9d6312fe91d2a", "tree": "f4ea2c7a5699353df5d7312636c88b4270a9bae2", "parents": [ "8720345d0737f943f7002a477337e42d01a6647a" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 28 11:50:05 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 28 11:50:05 2008 +0000" }, "message": "Add support for the Intel 82371MX (MPIIX) southbridge\n\nUntested, but should work just as well as the other *PIIX* southbridges\naccording to the datasheets.\n\nCorresponding to flashrom svn r330 and coreboot v2 svn r3696.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "8720345d0737f943f7002a477337e42d01a6647a", "tree": "4e9b6d02384c809db650cc2d07246b2a3d486e26", "parents": [ "190f8497d7f3bd354841ffc040e6d5115fda3b12" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sun Oct 26 18:40:42 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sun Oct 26 18:40:42 2008 +0000" }, "message": "Add support for the Intel 82371FB PIIX and 82371SB (PIIX3) southbridges\n\nTested on PIIX3 hardware.\n\nCorresponding to flashrom svn r329 and coreboot v2 svn r3694.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Corey Osgood \u003ccorey.osgood@gmail.com\u003e\n" }, { "commit": "190f8497d7f3bd354841ffc040e6d5115fda3b12", "tree": "0737dc79a6e2d338655d33e3aeffbb8f9daee937", "parents": [ "1b0f61f80b38aa3057468e1d040e28334dafb6ce" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sat Oct 25 18:03:50 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sat Oct 25 18:03:50 2008 +0000" }, "message": "Add support for the VIA VT82C586A/B chipset, improve documentation\n\nCorresponding to flashrom svn r328 and coreboot v2 svn r3693.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "1b0f61f80b38aa3057468e1d040e28334dafb6ce", "tree": "443c194a4296d838ab9fda3b3ec7748172d8d704", "parents": [ "394131ef1447aa9019f9b03797955fb4fdda74bd" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 21 22:09:02 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 21 22:09:02 2008 +0000" }, "message": "Reduce serial output, otherwise flashing will fail very often\n\nThis has been tested on hardware by me.\n\nCorresponding to flashrom svn r327 and coreboot v2 svn r3682.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "394131ef1447aa9019f9b03797955fb4fdda74bd", "tree": "8be1ee454d786c1aae0ea45be068e22b2a7c70a5", "parents": [ "a88daa731de1612641a9a8df2a63f5529ac7a6b1" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sat Oct 18 21:14:13 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sat Oct 18 21:14:13 2008 +0000" }, "message": "Coding-style fixes for flashrom, partly indent-aided\n\nCorresponding to flashrom svn r326 and coreboot v2 svn r3669.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "a88daa731de1612641a9a8df2a63f5529ac7a6b1", "tree": "0c806490d4be0f07f3468f55ed2e49104024251e", "parents": [ "3af487d419f87fef25a976055a0656c446212e0e" ], "author": { "name": "Urja Rannikko", "email": "urjaman@gmail.com", "time": "Sat Oct 18 13:54:30 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Oct 18 13:54:30 2008 +0000" }, "message": "Allow the SiS 620 chipset to detect and read at least 256kb chips\n\nBased on the 5595 datasheet and uniflash 1.40 sources, only looking for info\nabout SiS620.\n\nCorresponding to flashrom svn r325 and coreboot v2 svn r3668.\n\nSigned-off-by: Urja Rannikko \u003curjaman@gmail.com\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "3af487d419f87fef25a976055a0656c446212e0e", "tree": "ced984deeba81546b9218b645dd738275fa68539", "parents": [ "28ec74b22959d90d7587b09809dba5db010b39b5" ], "author": { "name": "Marc Jones", "email": "marcj.jones@amd.com", "time": "Wed Oct 15 17:50:29 2008 +0000" }, "committer": { "name": "Marc Jones", "email": "marcj.jones@amd.com", "time": "Wed Oct 15 17:50:29 2008 +0000" }, "message": "SB600 has four write once LPC ROM protect areas\n\nIt is not possible to write enable that area once the register is set so\nprint a warning.\n\nCorresponding to flashrom svn r324 and coreboot v2 svn r3659.\n\nSigned-off-by: Marc Jones \u003cmarcj.jones@amd.com\u003e\nAcked-by: Ronald G. Minnich \u003crminnich@gmail.com\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "28ec74b22959d90d7587b09809dba5db010b39b5", "tree": "497ac0588a29224d79c97dce000804e42d30b6dc", "parents": [ "23dc1df565e66bd31813c4063e75df015d630e75" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Oct 10 20:54:41 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Oct 10 20:54:41 2008 +0000" }, "message": "Add ICH10 support\n\nThe ICH9 and ICH10 data sheets are identical regarding FWH/SPI flash\ninterfaces, so this just adds the required PCI IDs.\n\nCorresponding to flashrom svn r323 and coreboot v2 svn r3648.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "23dc1df565e66bd31813c4063e75df015d630e75", "tree": "b0fbf43fd103eae5fe2bb35e505952e6ab21cce6", "parents": [ "cbfed288803019bba1901cf2fbeac2d9222bd761" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Oct 10 20:43:17 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Oct 10 20:43:17 2008 +0000" }, "message": "Check that a filename was specified also when using force read\n\nCorresponding to flashrom svn r322 and coreboot v2 svn r3647.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "cbfed288803019bba1901cf2fbeac2d9222bd761", "tree": "57fe9da2ac59ef2f5530f68f8df2db445c7b9ec1", "parents": [ "205633e12fc13676529fdf5a341b652740a3ee97" ], "author": { "name": "Mats Erik Andersson", "email": "mats.andersson@gisladisker.se", "time": "Tue Oct 07 12:21:12 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 07 12:21:12 2008 +0000" }, "message": "Support for AM29F002(N)B[BT]\n\nFully tested on AM29F002NBT.\n\nProbing, reading, and erasing use the Jedec-routines, whereas writing\nresort to the recent write_en29f002a(), since also these chips use a\nbyte wise algorithm.\n\nCorresponding to flashrom svn r321 and coreboot v2 svn r3639.\n\nSigned-off-by: Mats Erik Andersson \u003cmats.andersson@gisladisker.se\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "205633e12fc13676529fdf5a341b652740a3ee97", "tree": "8bf3687e34a91ff56e8d7648a22873309aceda3f", "parents": [ "9a362c583bb007ee91c75b7b8af4368e5587f958" ], "author": { "name": "Tim ter Laak", "email": "timl@scintilla.utwente.nl", "time": "Tue Sep 30 04:13:32 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Sep 30 04:13:32 2008 +0000" }, "message": "This patch fixes support for the AT49F002N(T) chip in the flashrom tool\n\nIt replaces the write function to one based on write_byte_program_jedec()\ninstead of write_page_write_jedec(), as this part does not support page\nprogramming.\nI have verified the NT variant to fully work now, and adjusted the test\nstatus accordingly. The N variant *should* also work with this patch, but\nremains untested.\n\nCorresponding to flashrom svn r320 and coreboot v2 svn r3619.\n\nSigned-off-by: Tim ter Laak \u003ctiml@scintilla.utwente.nl\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "9a362c583bb007ee91c75b7b8af4368e5587f958", "tree": "f3297dea10af18f062d23487adf2ef92eb100996", "parents": [ "c010e0b14ffde8618af3b2f37e7f4005448cb9c1" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Sep 30 04:00:23 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Sep 30 04:00:23 2008 +0000" }, "message": "ST M29F040B status TEST_OK_ PROBE READ ERASE WRITE\n\nPer report from Daniel Lindenaar. Thanks!\n\nCorresponding to flashrom svn r319 and coreboot v2 svn r3618.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "c010e0b14ffde8618af3b2f37e7f4005448cb9c1", "tree": "c51d616b3c893a698c86fe41f83cc5616801343d", "parents": [ "e8782a63074eb5338d0a5c08e1922563a068e1ee" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Sep 29 21:21:36 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Sep 29 21:21:36 2008 +0000" }, "message": "Fix typo in r3615 (TEST_PREW -\u003e TEST_OK_PREW)\n\nCorresponding to flashrom svn r318 and coreboot v2 svn r3616.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "e8782a63074eb5338d0a5c08e1922563a068e1ee", "tree": "ec0a2068bca067fd94ec316982042174d78ca1fe", "parents": [ "44e1a194678f33b5f660c2d387c4a4be0a50ffd8" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Mon Sep 29 18:48:23 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Mon Sep 29 18:48:23 2008 +0000" }, "message": "Mark the SyncMOS S29C51002T as working\n\nAll operations tested by me on hardware.\n\nCorresponding to flashrom svn r317 and coreboot v2 svn r3615.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "44e1a194678f33b5f660c2d387c4a4be0a50ffd8", "tree": "cd26907682dc2637ded91420e082261e2bd6f373", "parents": [ "3d20d901ec7afa4d39727765a77f292d6142d664" ], "author": { "name": "Mats Erik Andersson", "email": "mats.andersson@gisladisker.se", "time": "Fri Sep 26 13:19:02 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Fri Sep 26 13:19:02 2008 +0000" }, "message": "Activate proper support for EN29F002(A)(N)[BT]\n\nFully tested for Probe/Read/Erase/Write on EN29F002NT.\nJedec subroutines \u0027probe_jedec()\u0027 and \u0027erase_chip_jedec()\u0027\nare still in use, but a tailored \u0027write_en29f002a()\u0027 is\nneeded due to a byte wise writing mechanism for this chip.\n\nCorresponding to flashrom svn r316 and coreboot v2 svn r3602.\n\nSigned-off-by: Mats Erik Andersson \u003cmats.andersson@gisladisker.se\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "3d20d901ec7afa4d39727765a77f292d6142d664", "tree": "5a0dcf3e1822df501ce3c8254c8579de632a9337", "parents": [ "80d667b518c5ff4f42e39f0c5c2b9b7d646fe515" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Sep 10 09:55:10 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Sep 10 09:55:10 2008 +0000" }, "message": "Winbond W49V002A TEST_OK_ PROBE READ ERASE WRITE\n\nPer report from Kevin O\u0027Connor. Thanks Kevin!\n\nCorresponding to flashrom svn r315 and coreboot v2 svn r3570.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "80d667b518c5ff4f42e39f0c5c2b9b7d646fe515", "tree": "f857c102a8c2a296337dbb3553ae75cb9228d0ee", "parents": [ "483b8f0c0d55a4dd13e3624214b18e523c688df7" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Sep 07 03:14:27 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Sep 07 03:14:27 2008 +0000" }, "message": "Debug print actual time base calculated by myusec_calibrate_delay()\n\nCorresponding to flashrom svn r314 and coreboot v2 svn r3569.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "483b8f0c0d55a4dd13e3624214b18e523c688df7", "tree": "6b36d75859e9179323501722c38db049f812fd7a", "parents": [ "8d74c1b05a4865385b5a4c955dca7543cfb9768a" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Sep 03 23:10:05 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Sep 03 23:10:05 2008 +0000" }, "message": "Only find \"unknown .. SPI chip\" if no other chip was found\n\nThis removes the false positive matches we\u0027ve been seeing, and also removes\nthe true positive match in case there is more than one flash chip and the 2nd\nor 3rd are unknown - but I think that case is uncommon enough to warrant the\nimprovement in the common case. Use flashrom -frc forced read if you have the\nuncommon case, and/or please add the flash chip to the flashchips array.\n\nCorresponding to flashrom svn r313 and coreboot v2 svn r3562.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "8d74c1b05a4865385b5a4c955dca7543cfb9768a", "tree": "413444209019ae6ac7f4defcbe4f27eb3cd53412", "parents": [ "e7efd4caf8f7e00f7d32849504a9c95fd7726f1c" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Sep 02 00:26:11 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Sep 02 00:26:11 2008 +0000" }, "message": "SST49LF016C TEST_OK_ PROBE READ ERASE WRITE\n\nPer test report from Bari Ari. Thanks!\n\nCorresponding to flashrom svn r312 and coreboot v2 svn r3557.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "e7efd4caf8f7e00f7d32849504a9c95fd7726f1c", "tree": "5a0005782160d7b68874db05daf44aa738c308f7", "parents": [ "cd2ed475ada1e04968d05d33aa657cbb35f91c22" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Aug 27 21:28:41 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Aug 27 21:28:41 2008 +0000" }, "message": "SST25VF016B TEST_OK_ PROBE READ ERASE WRITE\n\nPer test report from Ward.\n\nCorresponding to flashrom svn r311 and coreboot v2 svn r3541.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "cd2ed475ada1e04968d05d33aa657cbb35f91c22", "tree": "923fe7e1740fd6f0f6c6b3aee55ae068978540ac", "parents": [ "b20953c3b9340cfb6211d64cd6b453478be6bd31" ], "author": { "name": "Ed Swierk", "email": "eswierk@arastra.com", "time": "Wed Aug 20 20:31:41 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Aug 20 20:31:41 2008 +0000" }, "message": "Recognize the Intel EP80579 LPC flash interface\n\nCorresponding to flashrom svn r310 and coreboot v2 svn r3532.\n\nSigned-off-by: Ed Swierk \u003ceswierk@arastra.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "b20953c3b9340cfb6211d64cd6b453478be6bd31", "tree": "38fc8b5e1d1d75fbcff7bfc8d6d4e0ed5ef5d6fb", "parents": [ "0d29b60641438d4383eec5410a31c3acaa9f807a" ], "author": { "name": "Sean Nelson", "email": "snelson@nmt.edu", "time": "Tue Aug 19 21:51:39 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Aug 19 21:51:39 2008 +0000" }, "message": "Add support for MSI KT4V\n\nThe KT4V is autodetected and supports the KT3 Ultra 2 with \"-m msi:kt4v\"\n(but is not autodetected, yet).\n\nCorresponding to flashrom svn r309 and coreboot v2 svn r3528.\n\nSigned-off-by: Sean Nelson \u003csnelson@nmt.edu\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "0d29b60641438d4383eec5410a31c3acaa9f807a", "tree": "35cdb3595d9b3499d5840583db844e9665f12e1b", "parents": [ "bff9bf24c77e5536539ea5bf86cf665bc471e680" ], "author": { "name": "Segher Boessenkool", "email": "segher@kernel.crashing.org", "time": "Tue Aug 12 11:58:00 2008 +0000" }, "committer": { "name": "Segher Boessenkool", "email": "segher@kernel.crashing.org", "time": "Tue Aug 12 11:58:00 2008 +0000" }, "message": "Fix error -EINVAL on mmap()\n\nDon\u0027t calculate \"flash_baseaddr\" until the final value of \"size\"\nis known, otherwise we end up trying to map a page right after\nthe end of memory.\n\nFixes #112.\n\nCorresponding to flashrom svn r308 and coreboot v2 svn r3502.\n\nSigned-off-by: Segher Boessenkool \u003csegher@kernel.crashing.org\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "bff9bf24c77e5536539ea5bf86cf665bc471e680", "tree": "6657b4ea4a84bdfbef9204d89665f3094339d0ef", "parents": [ "566ce1bea01fcb943dd5253141818151629bb8cd" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Aug 08 10:55:57 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Aug 08 10:55:57 2008 +0000" }, "message": "ST M50FW040 TEST_OK PROBE READ ERASE WRITE\n\nPer test report from Marcel Konrad. Thanks!\n\nCorresponding to flashrom svn r307 and coreboot v2 svn r3485.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "566ce1bea01fcb943dd5253141818151629bb8cd", "tree": "c83f2ee8eadfc3dc47451ce723baf9897d3f9bf0", "parents": [ "ec20a75c37b116fb704ef39dde3c6bf0f4b90dc3" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Sat Aug 02 15:13:58 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Sat Aug 02 15:13:58 2008 +0000" }, "message": "Update copyright year\n\nCorresponding to flashrom svn r306 and coreboot v2 svn r3464.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "ec20a75c37b116fb704ef39dde3c6bf0f4b90dc3", "tree": "f6379e378df351f317d7efc83597bc583b4916a8", "parents": [ "cce2682d6e7275d7ae66bb7c1a50a84b834aaecf" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Sat Aug 02 14:58:49 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Sat Aug 02 14:58:49 2008 +0000" }, "message": "Tested another intel chip\n\nCorresponding to flashrom svn r305 and coreboot v2 svn r3462.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "cce2682d6e7275d7ae66bb7c1a50a84b834aaecf", "tree": "bd81dfe7220babdbfaa1f9ef0d88c20d251d628d", "parents": [ "85f8a1725f852104dd5f28179776d7d336f14d7f" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jul 21 17:48:40 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jul 21 17:48:40 2008 +0000" }, "message": "Winbond W39V040C and MSI K8T Neo2-F\n\nW39V040C does standard JEDEC commands except chip erase so add a small driver.\nprobe_w39v040c() prints the block lock pin status when a chip is found.\n\nThe Neo2 board enable matches on 8237-internal IDE and onboard NIC PCI IDs.\n\nMany thanks to Daniel McLellan for testing all of this on hardware!\nBuild tested by Uwe.\n\nCorresponding to flashrom svn r304 and coreboot v2 svn r3431.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "85f8a1725f852104dd5f28179776d7d336f14d7f", "tree": "49bf9660f02fad3a56a1aee7a8948e3b3824da17", "parents": [ "f83221b6db1a35b559830c01fe40cdb4fa3f5fb2" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Jul 11 00:06:38 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Jul 11 00:06:38 2008 +0000" }, "message": "Fix and clean up coreboot image detection heuristic\n\nAdditional compile fix for NetBSD.\n\nCorresponding to flashrom svn r303 and coreboot v2 svn r3420.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "f83221b6db1a35b559830c01fe40cdb4fa3f5fb2", "tree": "83dc53759cd8cca1419c8e1e43dc3e83d15995f2", "parents": [ "6a214163c098f63a2fc3595d69f41b1cab0e64c9" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jul 07 06:38:51 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jul 07 06:38:51 2008 +0000" }, "message": "Trivial SPI cleanups\n\nWhile writing a new SPI driver I fixed some things in the SPI code:\nAll calls to spi_command() had unneccessary #define duplications, and in some\ncases the read count define could theoretically become harmful because NULL was\npassed for the read buffer. Avoid a crash, should someone change the #defines.\n\nI also noticed that the only caller of spi_page_program() was the it87 driver,\nand spi_page_program() could only call back into the it87 driver. Removed the\nfunction for easier-to-follow code and made it8716f_spi_page_program() static.\nThe ichspi driver\u0027s static page functions are already static.\n\nCorresponding to flashrom svn r302 and coreboot v2 svn r3418.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "6a214163c098f63a2fc3595d69f41b1cab0e64c9", "tree": "fb30c50bcfa3015281f8ecca3a6ae92b394063e3", "parents": [ "8b114399d6e183141275b5a72a4c0bbc61abacae" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jul 07 05:14:06 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jul 07 05:14:06 2008 +0000" }, "message": "Trivial indent fix in ichspi.c\n\nCorresponding to flashrom svn r301 and coreboot v2 svn r3417.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "8b114399d6e183141275b5a72a4c0bbc61abacae", "tree": "730dcdb02bc58549f4d47258e0e3212b7ec126af", "parents": [ "e707d6449699c1c67bdd4d5bc8cd4e34bb01b0ef" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Jul 06 23:04:01 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Jul 06 23:04:01 2008 +0000" }, "message": "r3415 removed symbolic constants for device IDs by accident\n\nFlash.h is a database of known IDs, whereas flashchips.c is a database\nof chips for which support has been implemented. Keep it that way.\n\nCorresponding to flashrom svn r300 and coreboot v2 svn r3416.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" } ], "next": "e707d6449699c1c67bdd4d5bc8cd4e34bb01b0ef" }