)]}' { "log": [ { "commit": "b46acba6e0da846f5c29f26ac8ec11733adc19f6", "tree": "92a8d5578a46b441f559ebd626cc3c541d9e0683", "parents": [ "337df1d618327e9e440d21725dd9486f3c179898" ], "author": { "name": "Dominik Geyer", "email": "dominik.geyer@kontron.com", "time": "Fri May 16 12:55:55 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri May 16 12:55:55 2008 +0000" }, "message": "Add support for SPI chips on ICH9\n\nThis is done by using the generic SPI interface.\n\nCorresponding to flashrom svn r239 and coreboot v2 svn r3325.\n\nSigned-off-by: Dominik Geyer \u003cdominik.geyer@kontron.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "337df1d618327e9e440d21725dd9486f3c179898", "tree": "18ba00652c0b471ee9e4d93c2ef132f35ca869cc", "parents": [ "f43e6428dbde77e6610ca891724c8f39ad8ba181" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri May 16 00:19:52 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri May 16 00:19:52 2008 +0000" }, "message": "IT8716F: Enable writes if decoding of any SPI addresses is enabled\n\nCorresponding to flashrom svn r238 and coreboot v2 svn r3324.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "f43e6428dbde77e6610ca891724c8f39ad8ba181", "tree": "b2fbb843c68ddc71269065bf3cb109d43463a765", "parents": [ "0720292bd3e5e790848704625115eb8d6ec5490e" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu May 15 22:32:08 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu May 15 22:32:08 2008 +0000" }, "message": "Print detailed status register information for SST25VF series flash\n\nCorresponding to flashrom svn r237 and coreboot v2 svn r3323.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "0720292bd3e5e790848704625115eb8d6ec5490e", "tree": "256dce0b98e6c5f0c2800d1778ce7d0be8a9d96f", "parents": [ "42c54971801dc1cec7c5724b5619e7731126222d" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu May 15 03:24:43 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu May 15 03:24:43 2008 +0000" }, "message": "Lots of new SST flash chip IDs\n\nOnly a subset has been added to flashchips.c, but the IDs in flash.h\nwill make lookups easier if anybody wants to add support for them.\n\nCorresponding to flashrom svn r236 and coreboot v2 svn r3321.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "42c54971801dc1cec7c5724b5619e7731126222d", "tree": "68c1d560242821885e66578bca46a1e6c68eb36c", "parents": [ "6dc1d3b8dc6bd226bb2530c7af8d109407faa056" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu May 15 03:19:49 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu May 15 03:19:49 2008 +0000" }, "message": "Add support for the JEDEC RES\n\nAdd support for the JEDEC RES (Read Electronic Signature and Resume from\nPowerdown) SPI command to identify older SPI chips which can\u0027t handle\nJEDEC RDID.\n\nSince RES gives a one-byte identifier which is shared among many\ndifferent vendors and even different sizes, we want to match RES as a\nlast resort if RDID returns 0xff 0xff 0xff.\n\nCorresponding to flashrom svn r235 and coreboot v2 svn r3320.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n\nThis is a heavily reworked version of a patch by Fredrik Tolf, which was\nSigned-off-by: Fredrik Tolf \u003cfredrik@dolda2000.com\u003e\n" }, { "commit": "6dc1d3b8dc6bd226bb2530c7af8d109407faa056", "tree": "751c172c116ae171069e55ea0b1fce1236db2b38", "parents": [ "a00e2a0edfcf71573c1d346ccc3f79e1d05f731f" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed May 14 14:51:22 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed May 14 14:51:22 2008 +0000" }, "message": "Add more infrastructure for flashrom ICH9 support\n\nCorresponding to flashrom svn r234 and coreboot v2 svn r3314.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "a00e2a0edfcf71573c1d346ccc3f79e1d05f731f", "tree": "f49014866b882302e5ba5dd3dde183e089dbff4e", "parents": [ "09022e535f8e8974b64a175de91c9cb5a4bed97c" ], "author": { "name": "Claus Gindhart", "email": "claus.gindhart@kontron.com", "time": "Wed May 14 12:22:38 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed May 14 12:22:38 2008 +0000" }, "message": "Add the Intel 6300ESB as known chipset to the chipset struct enables\n\nCorresponding to flashrom svn r233 and coreboot v2 svn r3310.\n\nSigned-off-by: Claus Gindhart \u003cclaus.gindhart@kontron.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "09022e535f8e8974b64a175de91c9cb5a4bed97c", "tree": "d21655d6cc5fed9d6c22671c42354824b1be3062", "parents": [ "a758f5100dd6266af29d63302e745b1a3ad89bed" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed May 14 12:09:31 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed May 14 12:09:31 2008 +0000" }, "message": "Fix crash caused by division by zero for unknown flash chips\n\nCorresponding to flashrom svn r232 and coreboot v2 svn r3309.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "a758f5100dd6266af29d63302e745b1a3ad89bed", "tree": "96e3402473e7630b467b7befe97e0a03ecdc21f4", "parents": [ "4e84dfb7849b1d1de298c4f5212348a3c96b5b2f" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed May 14 12:03:06 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed May 14 12:03:06 2008 +0000" }, "message": "Check the JEDEC vendor ID for correct parity\n\nFlash chips which can be detected by JEDEC probe routines all have\nvendor IDs with correct parity. Use a parity check as additional hint\nwhether a vendor ID makes sense. Note: Device IDs have no parity\nrequirements whatsoever.\n\nCorresponding to flashrom svn r231 and coreboot v2 svn r3308.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "4e84dfb7849b1d1de298c4f5212348a3c96b5b2f", "tree": "8032c730a50e0882a643ed1c0293574c59b23ed3", "parents": [ "bfe5b4ab74f2910c77ee0fe00d1586985115d6d2" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed May 14 04:27:02 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed May 14 04:27:02 2008 +0000" }, "message": "Add lots of ATMEL SPI flash chips to flash.h\n\nAdd a few flashchips already mentioned in flash.h to flashchips.c\n\nCorresponding to flashrom svn r230 and coreboot v2 svn r3306.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "bfe5b4ab74f2910c77ee0fe00d1586985115d6d2", "tree": "53600a9c1ec08e66702f08bdb95c63ad939a48a9", "parents": [ "d6cbf76ee527da983b0405ca41ccd60a14d3d7be" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue May 13 23:03:12 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue May 13 23:03:12 2008 +0000" }, "message": "Move all IT87xx specific SPI routines from spi.c to a separate file it87spi.c\n\nNo behavioural changes, but greatly improved SPI abstraction.\n\nCorresponding to flashrom svn r229 and coreboot v2 svn r3305.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "d6cbf76ee527da983b0405ca41ccd60a14d3d7be", "tree": "3a5c3a6dcbfa80443fcec823826f2ac73b021c4d", "parents": [ "228231ff2c43fbdaaae9e83b658dfeb0f2fe84e9" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue May 13 14:58:23 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue May 13 14:58:23 2008 +0000" }, "message": "Move the SPI #defines from spi.c to spi.h\n\nThis patch has no code changes.\n\nCorresponding to flashrom svn r228 and coreboot v2 svn r3302.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "228231ff2c43fbdaaae9e83b658dfeb0f2fe84e9", "tree": "3569791a2991ef6b9f0fb3eed9a48d5f4220c7a0", "parents": [ "f51c92feb433f232a64889565cbc07d4a52ef6fc" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue May 13 14:01:22 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue May 13 14:01:22 2008 +0000" }, "message": "Change the SPI parts of flashrom to prepare for a merge of ICH9 SPI support\n\nIn theory, this patch has no behaviour changes.\n\nCorresponding to flashrom svn r227 and coreboot v2 svn r3301.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "f51c92feb433f232a64889565cbc07d4a52ef6fc", "tree": "cc12024f7e9999f27a22e6245b335aa44277d0b0", "parents": [ "78c6dfe1f412c8217033c66492c753fa9a4d3dfc" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon May 12 21:19:53 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon May 12 21:19:53 2008 +0000" }, "message": "MX25L3205 and W25x40 have been confirmed to probe/read/erase/write OK by Harald Gutmann\n\nSST39VF040 has been confirmed to probe OK by misi e.\n\nCorresponding to flashrom svn r226 and coreboot v2 svn r3300.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "78c6dfe1f412c8217033c66492c753fa9a4d3dfc", "tree": "9c957144bcd7ad5dccd76c68712b32096be3c42a", "parents": [ "a5b8efd377e75fc89b2a781a8f10fda7efc3e2ff" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon May 12 14:25:31 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon May 12 14:25:31 2008 +0000" }, "message": "Add SST39VF512, SST39VF010, SST39VF040 support\n\nThe SST39LF series has the same IDs. Add short AMIC vendor ID to\nflashrom.\n\nCorresponding to flashrom svn r225 and coreboot v2 svn r3299.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "a5b8efd377e75fc89b2a781a8f10fda7efc3e2ff", "tree": "273bb5054c27bde681917176e05c14f46d4d325b", "parents": [ "fa8c550fb6abd9310c8b6fa6e9c771a42615916c" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat May 10 23:40:51 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat May 10 23:40:51 2008 +0000" }, "message": "Improve flashrom SPI abstraction, second step\n\nThis paves the way to have a fully generic generic_spi_command without\nknowledge about any SPI controller.\n\nThe third step would be calling SPI controller functions via a function\npointer.\n\nCorresponding to flashrom svn r224 and coreboot v2 svn r3296.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "fa8c550fb6abd9310c8b6fa6e9c771a42615916c", "tree": "5ceeca944ad5e052e6e3067cab02a690b58570f1", "parents": [ "2fd11d6a9bcd0e56d2d6733472954f653fe051a6" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat May 10 23:07:52 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat May 10 23:07:52 2008 +0000" }, "message": "Rename generic_spi_*() functions to spi_*()\n\nThis is a very early step toward cleaning up SPI code in flashrom.\n\nCorresponding to flashrom svn r223 and coreboot v2 svn r3295.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "2fd11d6a9bcd0e56d2d6733472954f653fe051a6", "tree": "d81673c0317627a776e74e13c9f3db199819dc49", "parents": [ "1159d5864acbb4721ca5a0b77bb38284420e1194" ], "author": { "name": "Claus Gindhart", "email": "claus.gindhart@kontron.com", "time": "Thu May 08 00:31:44 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Thu May 08 00:31:44 2008 +0000" }, "message": "Probe for up to 3 flash chips\n\nCurrently there is an ongoing technology migration from LPC/FWH to SPI chips.\nFor this reason some boards have multiple chips of different technologies\nonboard. This patch makes flashrom probe for up to 3 chips and if more than\none chip is found flashrom exits, asking the user to specify -c.\n\n[root@localhost src]# ./flashrom\n...\nMultiple flash chips were detected: SST49LF008A M25P16@ICH9\nPlease specify which chip to use with the -c \u003cchipname\u003e option.\n[root@localhost src]# \n\nCorresponding to flashrom svn r222 and coreboot v2 svn r3291.\n\nSigned-off-by: Claus Gindhart \u003cclaus.gindhart@kontron.com\u003e\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Claus Gindhart \u003cclaus.gindhart@kontron.com\u003e\n" }, { "commit": "1159d5864acbb4721ca5a0b77bb38284420e1194", "tree": "66d13a48051efcd6c9cf9fa7755af9a4d05933c8", "parents": [ "9477c4eca5db12ebed4636547d00a237f3ad2b84" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat May 03 04:34:37 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat May 03 04:34:37 2008 +0000" }, "message": "Add a tested bitmap field to the flash chip table\n\nTwo bits indicate OK and BAD for each operation PROBE READ ERASE WRITE.\n8 bits out of 32 are in use now. No bits set means nothing has been tested.\nFor chips with at least one operation that is not tested or not working, the\nuser is asked to email a report to a special email adress so that the table\ncan be updated.\n\nAll chips are TEST_UNTESTED for now.\n\nCorresponding to flashrom svn r221 and coreboot v2 svn r3277.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "9477c4eca5db12ebed4636547d00a237f3ad2b84", "tree": "7a2752872b387f520386d31cea86085650df6f55", "parents": [ "a7b3551bbc25219671706067a9061bf07ee1eebd" ], "author": { "name": "Bari Ari", "email": "bari@onelabs.com", "time": "Tue Apr 29 13:46:38 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Tue Apr 29 13:46:38 2008 +0000" }, "message": "Enable ROM decode range to 1MB for vt8237r\n\nCorresponding to flashrom svn r220 and coreboot v2 svn r3275.\n\nSigned-off-by: Bari Ari \u003cbari@onelabs.com\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "a7b3551bbc25219671706067a9061bf07ee1eebd", "tree": "b8444287f2e3760ebfed678b449f0a803beb89e5", "parents": [ "f31104cf3b63a058b63f8b9aed89c1901d5d9acd" ], "author": { "name": "Claus Gindhart", "email": "claus.gindhart@kontron.com", "time": "Mon Apr 28 17:51:09 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Mon Apr 28 17:51:09 2008 +0000" }, "message": "Separate ST M50FLW support from generic JEDEC code\n\nThe generic jedec.c does not work for the ST M50FLW flash devices,\nbecause they need an unlock command first. For this reason, ST M50FLW\nsupport is moved to a new HW support module, because any change in\njedec.c would bear the risk to cause problems with the already supported\ndevices.\n\nIt\u0027s already tested with ST M50FLW080A; the other chips of this family i\ndont have available, so i couldnt test it.\n\nCorresponding to flashrom svn r219 and coreboot v2 svn r3274.\n\nSigned-off-by: Claus Gindhart \u003cclaus.gindhart@kontron.com\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "f31104cf3b63a058b63f8b9aed89c1901d5d9acd", "tree": "4aad4a51dd58a634205bd40b7dae1ba93d4717b5", "parents": [ "ef300238b649b9a7229bb68c70690faa82b2d18d" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Apr 28 14:47:30 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Apr 28 14:47:30 2008 +0000" }, "message": "Handle NULL probe, erase and write function pointers in the flashchips table\n\nThe read pointer was already checked properly.\n\nCorresponding to flashrom svn r218 and coreboot v2 svn r3273.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "ef300238b649b9a7229bb68c70690faa82b2d18d", "tree": "9f74ae012637bb920c84014f66446d79aaec1e84", "parents": [ "47c94a5d48eb1143c26f9819ee70452860fc834b" ], "author": { "name": "Claus Gindhart", "email": "claus.gindhart@kontron.com", "time": "Thu Apr 24 09:07:57 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Thu Apr 24 09:07:57 2008 +0000" }, "message": "82802ab: touch only blocks that need updating\n\nFlash pages, which where excluded from updating using the exclude or the\nlayout option, as well as areas, whose flash contents already contain\nthe desired data, will be skipped. These ensures absolute data security\nof critical areas (BIOS boot block), e.g. against a sudden power off or\na CPU hangup during flashing. As a nice side effect, it speeds up the\nflash process, if the BIOS to be flashed is very similar to the version\nin flash.\n\nCorresponding to flashrom svn r217 and coreboot v2 svn r3260.\n\nSigned-off-by: Claus Gindhart \u003cclaus.gindhart@kontron.com\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "47c94a5d48eb1143c26f9819ee70452860fc834b", "tree": "4e4d750deb9f20aa676a88ef82f72b8c64a6076a", "parents": [ "b36a071717dd1b53dea0a7198c7f491ad99709da" ], "author": { "name": "Ed Swierk", "email": "eswierk@arastra.com", "time": "Mon Apr 07 22:33:33 2008 +0000" }, "committer": { "name": "Ed Swierk", "email": "eswierk@arastra.com", "time": "Mon Apr 07 22:33:33 2008 +0000" }, "message": "ST M50FW016 and ST M50FW040 support the 82802ab command set, not jedec\n\nCorresponding to flashrom svn r216 and coreboot v2 svn r3221.\n\nSigned-off-by: Ed Swierk \u003ceswierk@arastra.com\u003e\nAcked-by: Joseph Smith \u003cjoe@smittys.pointclark.net\u003e\n" }, { "commit": "b36a071717dd1b53dea0a7198c7f491ad99709da", "tree": "92aba564dddada3596fec26428c5e77f5ffe4027", "parents": [ "c34ce2ecf7410423b0585c93c60da763a24091e8" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Mar 18 00:54:10 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Mar 18 00:54:10 2008 +0000" }, "message": "Add ICH9 detection\n\nStraight from the datasheet, untested.\n\nCorresponding to flashrom svn r215 and coreboot v2 svn r3167.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "c34ce2ecf7410423b0585c93c60da763a24091e8", "tree": "f5ddd1cb950102bdb4523f9dfe6e4015962239f3", "parents": [ "ac378972597a575b3c07e5e8e061ac179359ba9f" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Tue Mar 18 00:36:18 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Tue Mar 18 00:36:18 2008 +0000" }, "message": "Oops\n\nForgot to add the file.\n\nSupport for the Winbond W39V080FA series of chips. Support for flashing\non the Kontron 986LCD-M board.\n\nCorresponding to flashrom svn r214 and coreboot v2 svn r3166.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "ac378972597a575b3c07e5e8e061ac179359ba9f", "tree": "b94feff08c4ae0fc87cfcd28b5b205328e98e604", "parents": [ "b7c83233993bd1ff602c53def439f8cbff0f372a" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Mon Mar 17 22:59:40 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Mon Mar 17 22:59:40 2008 +0000" }, "message": "Support for the Winbond W39V080FA series of chips\n\nSupport for flashing on the Kontron 986LCD-M board.\n\nCorresponding to flashrom svn r213 and coreboot v2 svn r3165.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "b7c83233993bd1ff602c53def439f8cbff0f372a", "tree": "44a8bacbeef826f95eda6b387f5e0e5b9a85e89a", "parents": [ "fc425e81cef5465ff6188468101be1c110f43531" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Sun Mar 16 19:44:13 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Sun Mar 16 19:44:13 2008 +0000" }, "message": "Check whether SST FWH chip was successfully erased on flashchip -E, too\n\nCorresponding to flashrom svn r212 and coreboot v2 svn r3153.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "fc425e81cef5465ff6188468101be1c110f43531", "tree": "26806477339ba88bd94b2a9e39fec4ee774f4ee9", "parents": [ "72123a5b0748bdc4936cfe1cd0ab1aab31eb71f7" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sun Mar 16 02:06:25 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sun Mar 16 02:06:25 2008 +0000" }, "message": "Sort list of flash chips alphabetically, add comment\n\nCorresponding to flashrom svn r211 and coreboot v2 svn r3152.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "72123a5b0748bdc4936cfe1cd0ab1aab31eb71f7", "tree": "7eaf9479823113c9d8636dbb0c2a3f9b15928030", "parents": [ "7615868f0b82fc84677905781e9ff11e46d6ae12" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Sat Mar 15 23:41:19 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Sat Mar 15 23:41:19 2008 +0000" }, "message": "Remove nasty warning that happened due to our vendor detection\n\nCorresponding to flashrom svn r210 and coreboot v2 svn r3151.\n\nmechanism.\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "7615868f0b82fc84677905781e9ff11e46d6ae12", "tree": "c2c6a6239b3a068ad779578cba7580ea25547a21", "parents": [ "1f3e530bea78a442f9441e16aad237a38b346c5d" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Fri Mar 14 23:55:58 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Fri Mar 14 23:55:58 2008 +0000" }, "message": "Re-add code erroneously removed in r3140\n\nCorresponding to flashrom svn r209 and coreboot v2 svn r3146.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "1f3e530bea78a442f9441e16aad237a38b346c5d", "tree": "b57bbc5a2a0b00bae9324a304575d060ca770146", "parents": [ "67f9ea3b7112ee474c9c824b7089aec8a33d05a5" ], "author": { "name": "Joseph Smith", "email": "joe@smittys.pointclark.net", "time": "Fri Mar 14 23:32:03 2008 +0000" }, "committer": { "name": "Joseph Smith", "email": "joe@smittys.pointclark.net", "time": "Fri Mar 14 23:32:03 2008 +0000" }, "message": "Changes M50FW080 to use 82802ab.c instead of jedec.c\n\nThis fixes the problem of not being able to erase the chip.\n\nCorresponding to flashrom svn r208 and coreboot v2 svn r3145.\n\nSigned-off-by: Joseph Smith \u003cjoe@smittys.pointclark.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "67f9ea3b7112ee474c9c824b7089aec8a33d05a5", "tree": "922c9a7d98da08e8d8872584e542f155bc98e46a", "parents": [ "55bf8dfcabec6ecdd5739b966183ebb103c3e2cc" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Mar 14 17:20:59 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Mar 14 17:20:59 2008 +0000" }, "message": "Prepare for ICH7/ICH8 SPI support by adding some debugging for all ICH* chipsets\n\nFunctionality (except printing) should be unchanged.\n\nCorresponding to flashrom svn r207 and coreboot v2 svn r3144.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n\nWard says:\nThis code detects the ICH8 chipset on my laptop, and it appears to use\nSPI.\n\nAcked-by: Ward Vandewege \u003cward@gnu.org\u003e\n" }, { "commit": "55bf8dfcabec6ecdd5739b966183ebb103c3e2cc", "tree": "f69f7c3549da69d63795e02beedf862b87524c85", "parents": [ "e7162b3680a2bd8e979d2fcba082dfa42c230d81" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Fri Mar 14 01:24:39 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Fri Mar 14 01:24:39 2008 +0000" }, "message": "Fix broken flashrom build\n\nCorresponding to flashrom svn r206 and coreboot v2 svn r3142.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "e7162b3680a2bd8e979d2fcba082dfa42c230d81", "tree": "8b0b5088e6e928748ebb0d0250fdd855b8ac154e", "parents": [ "e7bcb19bf564808974d8f944acfbe30818a2bae1" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Mar 14 00:33:42 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Mar 14 00:33:42 2008 +0000" }, "message": "Fix up one forgotten revert in r3140\n\nCorresponding to flashrom svn r205 and coreboot v2 svn r3141.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "e7bcb19bf564808974d8f944acfbe30818a2bae1", "tree": "19c34c5b97df18769e286387fa4660c27c3afc10", "parents": [ "eac10164378a08666ae4a8ce7279a1afc9962026" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Mar 14 00:02:25 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Mar 14 00:02:25 2008 +0000" }, "message": "Revert the delete of 82802ab.c in r3137\n\nCorresponding to flashrom svn r204 and coreboot v2 svn r3140.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "eac10164378a08666ae4a8ce7279a1afc9962026", "tree": "a2b50b921454bec7aeee031051e2b2ad347af715", "parents": [ "23c3d951b71ecd56c500b3f042f0da35c07737fc" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Mar 13 18:52:51 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Mar 13 18:52:51 2008 +0000" }, "message": "Also print the chip vendor name in --list-supported output\n\nCosmetic changes in some files, partly bending the 80-characters-per-line\nrule in this special case, as the 80-character-limited version looks\nequally crappy even in an 80x25 console/xterm, so let\u0027s make it at least\nlook good in a high-resolution xterm.\n\nCorresponding to flashrom svn r203 and coreboot v2 svn r3139.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "23c3d951b71ecd56c500b3f042f0da35c07737fc", "tree": "13c576164e19f02344c5cd8cb1489827870824fd", "parents": [ "fe7e929f49a6f26ae2c35ecd6a40980d2359d87c" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Mar 13 18:41:07 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Mar 13 18:41:07 2008 +0000" }, "message": "Also print the required -m option in --list-supported output\n\nCorresponding to flashrom svn r202 and coreboot v2 svn r3138.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "fe7e929f49a6f26ae2c35ecd6a40980d2359d87c", "tree": "cc8fafacf28c200416efcc35760c0d3d0d3f6530", "parents": [ "7bd2f838c669213adde3d689aaa49857e21d4541" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Mar 13 12:43:31 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Mar 13 12:43:31 2008 +0000" }, "message": "Drop 82802ab.c as it is identical to sharplhf00l04.c\n\nCorresponding to flashrom svn r201 and coreboot v2 svn r3137.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "7bd2f838c669213adde3d689aaa49857e21d4541", "tree": "f0bd7e80d1d9be10ed7010a3988b195cb83a1f4c", "parents": [ "e5ac16445f70486713b6533c2071c80eb66cc174" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Mar 12 12:28:40 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Mar 12 12:28:40 2008 +0000" }, "message": "Drop the useless rom.layout file\n\nIt\u0027s just an example, likely never been used in the last few years, and\nthe contents are available in the README already anyway.\n\nCorresponding to flashrom svn r200 and coreboot v2 svn r3134.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Ward Vandewege \u003cward@gnu.org\u003e\n" }, { "commit": "e5ac16445f70486713b6533c2071c80eb66cc174", "tree": "3e6343a00bfd9a05e644467f9e8e990816c865f5", "parents": [ "75f510768d65acfefb0813873992449f4d186f35" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Mar 12 11:54:51 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Mar 12 11:54:51 2008 +0000" }, "message": "Add --list-supported option which lists the supported ROM chips, chipsets, and mainboards\n\nCorresponding to flashrom svn r199 and coreboot v2 svn r3133.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Ward Vandewege \u003cward@gnu.org\u003e\n" }, { "commit": "75f510768d65acfefb0813873992449f4d186f35", "tree": "58e6c5e7d14928d8f20d7585d4c9caff758931aa", "parents": [ "faa62fb1ffad974df97eee46446c3d0c9d0d061a" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Mar 04 16:29:54 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Mar 04 16:29:54 2008 +0000" }, "message": "Add missing license header to layout.c\n\nThe file was written by Stefan Reinauer for coresystems GmbH in 2005, as\nconfirmed on IRC.\n\nCorresponding to flashrom svn r198 and coreboot v2 svn r3126.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "faa62fb1ffad974df97eee46446c3d0c9d0d061a", "tree": "3ebb2041c64378e363dd50727363f2f532461ade", "parents": [ "02016f742c871f99077f7c1304945ce81f452dd0" ], "author": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Wed Feb 20 11:11:18 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Wed Feb 20 11:11:18 2008 +0000" }, "message": "Add board_enable for Artec Group DBE61 and DBE62\n\nAlso add a comment about NULL subsystem IDs leaving the board entry out\nof auto-detection logic.\n\nCorresponding to flashrom svn r197 and coreboot v2 svn r3110.\n\nSigned-off-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\nAcked-by: Luc Verhaegen \u003clibv@skynet.be\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "02016f742c871f99077f7c1304945ce81f452dd0", "tree": "bb60b45f8d20b064088b67abf8e25e39123380fe", "parents": [ "3697ac75d5445c7ef66913cc3935f0bfe57a8d19" ], "author": { "name": "Clark Rawlins", "email": "clark@bit63.org", "time": "Thu Feb 14 23:22:20 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Feb 14 23:22:20 2008 +0000" }, "message": "Fix compilation with custom CFLAGS\n\nWith this small change it is possible to build flashrom again when\nspecifying custom CFLAGS/LDFLAGS from the make command line like.\n\n make CFLAGS\u003d\"...\" LDFLAGS\u003d\"...\"\n\nI need to do this when building flashrom in a cross compiler environment\nlike buildroot for a foreign target.\n\nCorresponding to flashrom svn r196 and coreboot v2 svn r3102.\n\nSigned-off-by: Clark Rawlins \u003cclark@bit63.org\u003e\nAcked-by: Ronald G. Minnich \u003crminnich@gmail.com\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "3697ac75d5445c7ef66913cc3935f0bfe57a8d19", "tree": "4688ac422b600716a9e6b4ea170772c17b6f4775", "parents": [ "97866087ae2c5bab35d160d9e694ae4009479493" ], "author": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Mon Feb 11 14:32:45 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Mon Feb 11 14:32:45 2008 +0000" }, "message": "Further cleanups to enable_flash_cs5536\n\n - Remove the \"enable write to flash\" message, as the caller appears to\n already report that.\n\n - Move the \u0027modprobe msr\u0027 suggestions to the first lseek64 error handling, as\n we get an error there already.\n\n - Rename a perror string from \"read\" to \"read msr\", as we use the latter\n already in this function for another read.\n\nCorresponding to flashrom svn r195 and coreboot v2 svn r3101.\n\nSigned-off-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "97866087ae2c5bab35d160d9e694ae4009479493", "tree": "a1d7c155992dffc3bd3c428297809cd7b4d3db7b", "parents": [ "e1344da898e3a7bcdfaa4995d37e22c8c5c555d8" ], "author": { "name": "Luc Verhaegen", "email": "libv@skynet.be", "time": "Sat Feb 09 02:03:06 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Feb 09 02:03:06 2008 +0000" }, "message": "Add board enable for VIA EPIA SP\n\nCorresponding to flashrom svn r194 and coreboot v2 svn r3099.\n\nSigned-off-by: Luc Verhaegen \u003clibv@skynet.be\u003e\nAcked-by: Corey Osgood \u003ccorey.osgood@gmail.com\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "e1344da898e3a7bcdfaa4995d37e22c8c5c555d8", "tree": "21e284263dc48ca049042a4eb194049121b3acb8", "parents": [ "0514a5f07aefbfd730721c18ba23a89e5af87e90" ], "author": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Fri Feb 08 10:10:57 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Fri Feb 08 10:10:57 2008 +0000" }, "message": "Improve error handling and make RCONF_DEFAULT_MSR address be a constant\n\nAlso, move a big code comment to the top of enable_flash_cs5536().\n\nCorresponding to flashrom svn r193 and coreboot v2 svn r3098.\n\nSigned-off-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "0514a5f07aefbfd730721c18ba23a89e5af87e90", "tree": "b13bbce8de759c3ba09e42ab69ec03647353a8eb", "parents": [ "1263d2af08990b7c372a744ab970a7f0e279885f" ], "author": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Fri Feb 08 09:59:58 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Fri Feb 08 09:59:58 2008 +0000" }, "message": "Write enable flash chips attached to CS3 of CS5536 chipsets (AMD Geode)\n\nThis implements support for devices using AMD Geode companion chip\nCS5536 that have the Boot ROM on NOR flash that is directly connected to\nFLASH_CS3 (Boot Flash Chip Select). We need to write enable it in the\nNORF_CTL MSR register for flashrom to be able to write to it, including\nJEDEC probe commands.\n\nThis patch allows us to stop using AMD gx_utils.ko for BIOS flashing on\nthe DBE61.\n\nCorresponding to flashrom svn r192 and coreboot v2 svn r3097.\n\nSigned-off-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "1263d2af08990b7c372a744ab970a7f0e279885f", "tree": "881d25a99cb48b0711afaa41d875dbb67b6e949c", "parents": [ "6b53fed02d38d7d7a53afeac540d1c7e8ace4ec3" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Feb 06 22:07:58 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Feb 06 22:07:58 2008 +0000" }, "message": "Handle JEDEC JEP106W continuation codes in SPI RDID\n\nSome vendors like Programmable Micro Corp (PMC) need this. Both the\nserial and parallel flash JEDEC detection routines would benefit from a\nparity/sanity check of the vendor ID. Will do this later.\n\nAdd support for the PMC Pm25LV family of SPI flash chips.\n\nCorresponding to flashrom svn r191 and coreboot v2 svn r3091.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Chris Lingard \u003cchris@stockwith.co.uk\u003e\n" }, { "commit": "6b53fed02d38d7d7a53afeac540d1c7e8ace4ec3", "tree": "f93b1a792eec2ea04d1196a725fa4cbd796a7918", "parents": [ "79fd6d21d2d41c74e03973a6be6851e9086de7eb" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 27 16:21:21 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 27 16:21:21 2008 +0000" }, "message": "Make the vendor name optional in the -m flashrom parameter when there\u0027s only one board name that matches\n\nThe full syntax still works, and is required when two vendors have\nboards with the same names.\n\nCorresponding to flashrom svn r190 and coreboot v2 svn r3082.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "79fd6d21d2d41c74e03973a6be6851e9086de7eb", "tree": "9c7efe1dc8e5817299551dfc8339766c5b80d91b", "parents": [ "3ac76af6f0623779667d3d3d147e35a6be1c8b05" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 27 07:17:14 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jan 27 07:17:14 2008 +0000" }, "message": "Forgot to add Spansion S25FL016A to README, trivial\n\nCorresponding to flashrom svn r189 and coreboot v2 svn r3080.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "3ac76af6f0623779667d3d3d147e35a6be1c8b05", "tree": "2d6a6d69b88e3304c6988e6dbe6a8735ca31668f", "parents": [ "10e091bd30db44c5984be4d8699bef537d90ccc7" ], "author": { "name": "Marc Jones", "email": "marc.jones@amd.com", "time": "Sat Jan 26 07:35:47 2008 +0000" }, "committer": { "name": "Ronald G. Minnich", "email": "rminnich@gmail.com", "time": "Sat Jan 26 07:35:47 2008 +0000" }, "message": "Correctly disable the ROM area Write Protect bit in the Geode LX\n\nCorresponding to flashrom svn r188 and coreboot v2 svn r3078.\n\nSigned-off-by: Marc Jones \u003cmarc.jones@amd.com\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n\nTested on the pcengines alix1c and works fine.\nAcked-by: Ronald G. Minnich \u003crminnich@gmail.com\u003e\n" }, { "commit": "10e091bd30db44c5984be4d8699bef537d90ccc7", "tree": "3e1e3dbaded4423aa4b593f4e73a50c608f67fb8", "parents": [ "e5dd6e6cd5591bbfa52aca05edf5fcff8dbd4f7b" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Jan 25 01:52:45 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Jan 25 01:52:45 2008 +0000" }, "message": "Add ids and chip entry for Spansion S25FL016A, tested, working\n\nCorresponding to flashrom svn r187 and coreboot v2 svn r3074.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "e5dd6e6cd5591bbfa52aca05edf5fcff8dbd4f7b", "tree": "557e93fbe3dc0c5f83be8c9b33e9ae8be35a6799", "parents": [ "d7b5bf3f1234200c8fd19c03e72cd65ba3db13f8" ], "author": { "name": "Harald Gutmann", "email": "harald.gutmann@gmx.net", "time": "Tue Jan 22 16:03:19 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Jan 22 16:03:19 2008 +0000" }, "message": "Here is just a little and simple patch to get the MX25L3205D working\n\nI\u0027ve tested and verified the chip myself, and it seems to work\neverything like supposted, since Carl-Daniel has patched flashrom to\nuse the read funktion on verifying. \n\n\"benchvice flashrom # ./flashrom -m gigabyte:m57sli -v test.4mb\nCalibrating delay loop... OK.\nNo coreboot table found.\nFound chipset \"NVIDIA MCP55\", enabling flash write... OK.\nFound board \"GIGABYTE GA-M57SLI-S4\": enabling flash write... \nSerial flash segment 0xfffe0000-0xffffffff enabled\nSerial flash segment 0x000e0000-0x000fffff enabled\nSerial flash segment 0xffee0000-0xffefffff disabled\nSerial flash segment 0xfff80000-0xfffeffff enabled\nLPC write to serial flash enabled\nserial flash pin 29\nOK.\nMX25L3205 found at physical address 0xffc00000.\nFlash part is MX25L3205 (4096 KB).\nFlash image seems to be a legacy BIOS. Disabling checks.\nVerifying flash... VERIFIED.\nbenchvice flashrom # ls -l test.4mb\n-rw-r--r-- 1 root root 4194304 22. Jan 16:27 test.4mb\n\nCorresponding to flashrom svn r186 and coreboot v2 svn r3072.\n\nSigned-off-by: Harald Gutmann \u003charald.gutmann@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "d7b5bf3f1234200c8fd19c03e72cd65ba3db13f8", "tree": "b8be63a7e75329430d9ed8a60649fa2f3a8e67b2", "parents": [ "d3568adfe118776d8157434f7bec102542959544" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Jan 22 15:19:01 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Jan 22 15:19:01 2008 +0000" }, "message": "Flashrom did not use the read function for verifying, it used direct memory access instead\n\nThat fails if the flash chip is not mapped completely. If the read\nfunction is set in struct flashchip, use it for verification as well.\n\nThis fixes verification of all SPI flash chips \u003e512 kByte behind an\nIT8716F flash translation chip.\n\n\"MX25L8005 found at physical address 0xfff00000. Flash part is MX25L8005\n(1024 KB). Flash image seems to be a legacy BIOS. Disabling checks.\nVerifying flash... VERIFIED.\"\n\nCorresponding to flashrom svn r185 and coreboot v2 svn r3070.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Harald Gutmann \u003charald.gutmann@gmx.net\u003e\n" }, { "commit": "d3568adfe118776d8157434f7bec102542959544", "tree": "6340a53351c8ff9e8480b86db6ea18fe4f9fee94", "parents": [ "d4554c5d73a4f54b441905f01997c4177bbbfd0d" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Jan 22 14:37:31 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Jan 22 14:37:31 2008 +0000" }, "message": "Make sure we delay writing the next byte long enough in SPI byte programming\n\nMinor formatting changes.\n\nCorresponding to flashrom svn r184 and coreboot v2 svn r3069.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Harald Gutmann \u003charald.gutmann@gmx.net\u003e\n" }, { "commit": "d4554c5d73a4f54b441905f01997c4177bbbfd0d", "tree": "d1adbe16247193646ead8a875cf7368f0a9ad75a", "parents": [ "201bde33d0ee8df9038d15e662f345b2051e60be" ], "author": { "name": "Ronald Hoogenboom", "email": "hoogenboom30@zonnet.nl", "time": "Mon Jan 21 23:55:08 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Jan 21 23:55:08 2008 +0000" }, "message": "Omitting the wait for SPI ready when there is no data to be read, e.g\n\nreadcnt\u003d\u003d0 saves 10 seconds with the unconditional 10us delay, reducing\nprogramming time for SST25VF016B to 40-45 secs.\n\nCorresponding to flashrom svn r183 and coreboot v2 svn r3068.\n\nSigned-off-by: Ronald Hoogenboom \u003choogenboom30@zonnet.nl\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "201bde33d0ee8df9038d15e662f345b2051e60be", "tree": "8dd5462e548dade569d43b8eafd88e2aca5e827d", "parents": [ "7ff530b40ef862e4d1bf6b30c34635a279a1b312" ], "author": { "name": "Bernhard Walle", "email": "bernhard.walle@gmx.de", "time": "Mon Jan 21 15:24:22 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Mon Jan 21 15:24:22 2008 +0000" }, "message": "This patch adds version information\n\nBecause \u0027v\u0027 and \u0027V\u0027 are already in use, the patch uses \u0027R\u0027 (for release)\nand, of course, \u0027--version\u0027.\n\nCorresponding to flashrom svn r182 and coreboot v2 svn r3067.\n\nSigned-off-by: Bernhard Walle \u003cbernhard.walle@gmx.de\u003e\nAcked-by: Ulf Jordan \u003cjordan@chalmers.se\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "7ff530b40ef862e4d1bf6b30c34635a279a1b312", "tree": "2f1bd36d392569740f39ed531de721c2eb54661c", "parents": [ "42eb17fc5ed4feb8f6b2f8f2b20626d539861afd" ], "author": { "name": "Ronald Hoogenboom", "email": "hoogenboom30@zonnet.nl", "time": "Sat Jan 19 00:04:46 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jan 19 00:04:46 2008 +0000" }, "message": "Further abstract SPI functions to allow chips bigger than 512 kB behind IT8716Fs\n\nSupport SPI flash chips bigger than 512 kByte sitting behind IT8716F\nSuper I/O performing LPC-to-SPI flash translation.\n\nCorresponding to flashrom svn r181 and coreboot v2 svn r3061.\n\nSigned-off-by: Ronald Hoogenboom \u003choogenboom30@zonnet.nl\u003e\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "42eb17fc5ed4feb8f6b2f8f2b20626d539861afd", "tree": "c033049c1300761bc6f38a8eab7303bf07a82415", "parents": [ "2fbe6247a9c328628d521b14eee90bd5be378685" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Fri Jan 18 17:48:51 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Fri Jan 18 17:48:51 2008 +0000" }, "message": "Minor documentation improvements/fixes in the README and manpage\n\nCorresponding to flashrom svn r180 and coreboot v2 svn r3059.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "2fbe6247a9c328628d521b14eee90bd5be378685", "tree": "e8b539403a956b5d969228891acb173aff2ccf3d", "parents": [ "e3f3e2edb4f45ff5f53df3a3b4012bc5e60f1bb8" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Fri Jan 18 16:17:44 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Fri Jan 18 16:17:44 2008 +0000" }, "message": "Rename linuxbios_* files in utils repository\n\nCorresponding to flashrom svn r179 and coreboot v2 svn r3058.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "e3f3e2edb4f45ff5f53df3a3b4012bc5e60f1bb8", "tree": "f2e011db66093d0ccda872ed7a73f3ff2d1eccb0", "parents": [ "a3f8a6416616588021f21b893e673cc67a71bc3f" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Fri Jan 18 15:33:10 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Fri Jan 18 15:33:10 2008 +0000" }, "message": "Rename LinuxBIOS to coreboot\n\nCorresponding to flashrom svn r178 and coreboot v2 svn r3054.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "a3f8a6416616588021f21b893e673cc67a71bc3f", "tree": "d89cee24a4ac1aa6375e894b9e06c6deb0d6de8e", "parents": [ "9bb1c5d7ee7a10c65f71e1992fa83c5ee6fcea66" ], "author": { "name": "Bernhard Walle", "email": "bernhard.walle@gmx.de", "time": "Fri Jan 11 00:32:07 2008 +0000" }, "committer": { "name": "Torsten Duwe", "email": "duwe@lst.de", "time": "Fri Jan 11 00:32:07 2008 +0000" }, "message": "This patch removes \u0027\\n\u0027 from the help output since this looks a bit strange\n\nAfter the patch [...] The line length is still below 80 characters.\n\nCorresponding to flashrom svn r177 and coreboot v2 svn r3045.\n\nSigned-off-by: Bernhard Walle \u003cbernhard.walle@gmx.de\u003e\nAcked-by: Torsten Duwe \u003cduwe@lst.de\u003e\n" }, { "commit": "9bb1c5d7ee7a10c65f71e1992fa83c5ee6fcea66", "tree": "119833ff90b31ff5a501d438d7610b61e5859b15", "parents": [ "f9aa3a89506f294f5ca51889b038a098da228410" ], "author": { "name": "Harald Gutmann", "email": "harald.gutmann@gmx.net", "time": "Thu Jan 10 13:27:22 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jan 10 13:27:22 2008 +0000" }, "message": "Enable MX25L8005 support\n\nThe #defines were already there.\n\nCorresponding to flashrom svn r176 and coreboot v2 svn r3042.\n\nSigned-off-by: Harald Gutmann \u003charald.gutmann@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "f9aa3a89506f294f5ca51889b038a098da228410", "tree": "3b96a695ac595189be5bf7e9b73b28573f6cafc5", "parents": [ "8484d5a0a38b2b1c60b50c7bd938457ea2c314c5" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Jan 07 13:48:51 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Jan 07 13:48:51 2008 +0000" }, "message": "Add support for the SST25VF040B 4 Mbit SPI flash chip\n\nStraight from the data sheet, not tested.\n\nCorresponding to flashrom svn r175 and coreboot v2 svn r3036.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "8484d5a0a38b2b1c60b50c7bd938457ea2c314c5", "tree": "d82d014c25b7fc3b06104799417eb0627a325494", "parents": [ "e973b05710de68556dd5b7f336816b03d2b0e691" ], "author": { "name": "Ronald G. Minnich", "email": "rminnich@gmail.com", "time": "Fri Jan 04 17:22:44 2008 +0000" }, "committer": { "name": "Ronald G. Minnich", "email": "rminnich@gmail.com", "time": "Fri Jan 04 17:22:44 2008 +0000" }, "message": "Add board enable for the gigabyte ga_2761gxdk board\n\nCorresponding to flashrom svn r174 and coreboot v2 svn r3033.\n\nSigned-off-by: Ronald G. Minnich \u003crminnich@gmail.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "e973b05710de68556dd5b7f336816b03d2b0e691", "tree": "0bd46b9d23079b543465fa2249887f6b6dc86590", "parents": [ "2736e328320cbf524b3e5e93847cb4167062de7c" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Jan 04 16:22:09 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Jan 04 16:22:09 2008 +0000" }, "message": "Print at least the vendor for SPI flash chips if the exact chip ID is unknown\n\nCorresponding to flashrom svn r173 and coreboot v2 svn r3032.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Ronald G. Minnich \u003crminnich@gmail.com\u003e\n" }, { "commit": "2736e328320cbf524b3e5e93847cb4167062de7c", "tree": "dc2cbcc5170e101dcd519cca1393482144a29111", "parents": [ "ae8afa9ddb709985bfd5bce38c30610cc3e47abe" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 31 14:05:08 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 31 14:05:08 2007 +0000" }, "message": "Unfortunately, EN29F002T, EN29F002AT, EN29F002ANT, EN29F002NT all have exactly the same ID\n\nImprove model number printing.\n\nAdd EN29F002(A)(N)B support while I\u0027m at it.\n\nCorresponding to flashrom svn r172 and coreboot v2 svn r3031.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Markus Boas \u003cbios@ryven.de\u003e\n" }, { "commit": "ae8afa9ddb709985bfd5bce38c30610cc3e47abe", "tree": "6d4c9d27ad37db63a247647d01ec92d20a663033", "parents": [ "c2a18452b14481adffcbc894c1342404f8e737a5" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 31 01:49:00 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 31 01:49:00 2007 +0000" }, "message": "Add continuation ID support to jedec.c\n\nThe continuation ID code does not go further than checking for IDs of\nthe type 0x7fXX, but does this for vendor and product ID. The current\npublished JEDEC spec has a list where the largest vendor ID is 7 bytes\nlong, but all leading bytes are 0x7f. The list will grow in the future,\nand using a 64bit variable will not be enough anymore.\nBesides that, it seems that the location of the ID byte after the first\ncontinuation ID byte is very vendor specific, so we may have to revisit\nthat code some time in the future.\n\n(Suggestion for a new encoding:\nUse a two-byte data type for the ID, the lower byte contains the only\nnon-0x7f byte, the upper byte contains the number of 0x7f bytes used as\nprefix, which is the bank number minus 1 the vendor ID appears in.)\n\nAdd support for EON EN29F002AT.\n\nCorresponding to flashrom svn r171 and coreboot v2 svn r3030.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Corey Osgood \u003ccorey.osgood@gmail.com\u003e\n" }, { "commit": "c2a18452b14481adffcbc894c1342404f8e737a5", "tree": "129f793f8888219532ae41340a5b6938b301603c", "parents": [ "a3c977ab638b72c011adce8d2ebaa1753fe7c9bb" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 31 01:18:26 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 31 01:18:26 2007 +0000" }, "message": "Refine various vendor ID annotations\n\nThis fixes a few vendor IDs to conform with JEDEC publication 106W\n(JEP106W), adds some device IDs and provides information about\nnon-conforming IDs. The EON change is left to the patch adding EON\nchips.\n\nThis patch should have no effect on code generation.\n\nCorresponding to flashrom svn r170 and coreboot v2 svn r3029.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Corey Osgood \u003ccorey.osgood@gmail.com\u003e\n" }, { "commit": "a3c977ab638b72c011adce8d2ebaa1753fe7c9bb", "tree": "b7d3f94090a4c3c86c3544e3b5176f96315acb31", "parents": [ "9a3ec82063a95c9f7a7750e98fafed359aa74d44" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Dec 29 11:05:59 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Dec 29 11:05:59 2007 +0000" }, "message": "All SPI chips mentioned in flashchips.c had their sector size listed as page size\n\nFix that. Page size is uniform 256 bytes for SPI.\n\nA sector/block size field in struct flashchip would be nice, though.\n\nCorresponding to flashrom svn r169 and coreboot v2 svn r3027.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Corey Osgood \u003ccorey.osgood@gmail.com\u003e\n" }, { "commit": "9a3ec82063a95c9f7a7750e98fafed359aa74d44", "tree": "58f5bcd014cf8f7d97621bda262e3a7aedfff2f0", "parents": [ "e431827cf7048474a1078240e19673ef39034b50" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Dec 29 10:15:58 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Dec 29 10:15:58 2007 +0000" }, "message": "Print the chip status register for all SPI chips on probe if verbose output is specified\n\nPretty-print the chip status register (including block lock information)\nfor ST M25P family and Macronix MX25L family chips.\n\nCorresponding to flashrom svn r168 and coreboot v2 svn r3026.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Corey Osgood \u003ccorey.osgood@gmail.com\u003e\n" }, { "commit": "e431827cf7048474a1078240e19673ef39034b50", "tree": "e7b8fd06d29ff85ea95f568bbfa5c0d422c5d8ec", "parents": [ "d8cc58c85efe877d9f0dbc6ab9f60348741af356" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Dec 29 10:14:38 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Dec 29 10:14:38 2007 +0000" }, "message": "Add 25VF016B support\n\nUntested, but verified against the data sheet.\n\nCorresponding to flashrom svn r167 and coreboot v2 svn r3025.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Corey Osgood \u003ccorey.osgood@gmail.com\u003e\n" }, { "commit": "d8cc58c85efe877d9f0dbc6ab9f60348741af356", "tree": "f5f8efb286c1fc2dd6b790022a692c6c5d58299e", "parents": [ "21c7890701dd30977e46091bc101678bc729a746" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 17 22:22:40 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 17 22:22:40 2007 +0000" }, "message": "Add support for various ST M25P* chips\n\nAdd support for ST M25P05-A, M25P10-A, M25P20, M25P40, M25P16, M25P32,\nM25P64, M25P128.\n\nST M25P80 support is already there. Not tested, but conforming to data\nsheets and double checked.\n\nCorresponding to flashrom svn r166 and coreboot v2 svn r3012.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "21c7890701dd30977e46091bc101678bc729a746", "tree": "6895418c105a8159edb5b35440b77ad76aeed9bd", "parents": [ "f5df46f6c697b7b79faec25c5b2919b328f67fc0" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 17 14:33:32 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 17 14:33:32 2007 +0000" }, "message": "Rename SPI erase functions to include opcode\n\nTo make it easier to add new SPI chips to flashchips.c, rename functions\nwith multiple possible opcodes from linear numbering at the end (_1, _2)\nto include the opcode at the end (_60, _c7).\n\nThat way, you only have to take a short look at the data sheet and\nchoose the right function by appending the opcode listed in the data\nsheet. No functional changes.\n\nCorresponding to flashrom svn r165 and coreboot v2 svn r3009.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Ward Vandewege \u003cward@gnu.org\u003e\n" }, { "commit": "f5df46f6c697b7b79faec25c5b2919b328f67fc0", "tree": "4d59e9d65c99f3ebdffa0aea47487716421dd459", "parents": [ "4bcf1751908fa3177de87b43c5b0837074e3bb8e" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Dec 16 21:15:27 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Dec 16 21:15:27 2007 +0000" }, "message": "Add support for ST M25P80 chips\n\nDetection was tested. Print status register before erase to help\ndebugging block locks.\n\nCorresponding to flashrom svn r164 and coreboot v2 svn r3008.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Corey Osgood \u003ccorey.osgood@gmail.com\u003e\n" }, { "commit": "4bcf1751908fa3177de87b43c5b0837074e3bb8e", "tree": "2e9097a5f368d06cda3745174832c7b20a726bdd", "parents": [ "372eeb5710bccae7dfe3ab2819fed08623c4b24c" ], "author": { "name": "Frederico Silva", "email": "frederico.silva@gmail.com", "time": "Mon Dec 10 16:57:59 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Dec 10 16:57:59 2007 +0000" }, "message": "Add support for more atmel chips\n\nAT49F002\nAT49F002N\nAT49F002T\nAT49F002NT\n\nOnly tested the read function on AT49F002T.\ndatasheet @ http://www.atmel.com/atmel/acrobat/doc1017.pdf\n\nCorresponding to flashrom svn r163 and coreboot v2 svn r3003.\n\nSigned-off-by: Frederico Silva \u003cfrederico.silva@gmail.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "372eeb5710bccae7dfe3ab2819fed08623c4b24c", "tree": "49af580b696187ad940354f450dd9d62cc6cb024", "parents": [ "c778556271be41c1e0f368befaa07597da2d050b" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Dec 04 21:49:06 2007 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Dec 04 21:49:06 2007 +0000" }, "message": "Various coding style fixes, constification, fixed typos\n\nAlso, s/0xFF80/0xFFC0/ in the Acorp 6A815EPD board-enable, as per\nhttp://www.linuxbios.org/pipermail/linuxbios/2007-December/027750.html\n\nCorresponding to flashrom svn r162 and coreboot v2 svn r2997.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "c778556271be41c1e0f368befaa07597da2d050b", "tree": "369036f5615ac15b16b11a1f9ae4d454b13fd22f", "parents": [ "d54958a3c4724746feb3f721002d056afccd83aa" ], "author": { "name": "Jonathan A. Kollasch", "email": "jakllsch@kollasch.net", "time": "Sun Dec 02 19:03:23 2007 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sun Dec 02 19:03:23 2007 +0000" }, "message": "Add board-enable for Acorp 6A815EPD\n\nCorresponding to flashrom svn r161 and coreboot v2 svn r2995.\n\nSigned-off-by: Jonathan A. Kollasch \u003cjakllsch@kollasch.net\u003e\nAcked-by: Ronald G. Minnich \u003crminnich@gmail.com\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "d54958a3c4724746feb3f721002d056afccd83aa", "tree": "48cb9c89b19d9d4dc85f04d096aa028094362954", "parents": [ "03d2826d21015f3f874e2ddaf834920b8fd80b3d" ], "author": { "name": "Lane Brooks", "email": "lbrooks@mit.edu", "time": "Tue Nov 13 16:45:22 2007 +0000" }, "committer": { "name": "Jordan Crouse", "email": "jordan.crouse@amd.com", "time": "Tue Nov 13 16:45:22 2007 +0000" }, "message": "Flashrom support for AMD Geode CS5536\n\nAttached is a patch that enables AMD Geode CS5536 chipset support. I\nhave tested it successfully on a MSM800 board from digital logic.\n\nCorresponding to flashrom svn r160 and coreboot v2 svn r2967.\n\nSigned-off-by: Lane Brooks \u003clbrooks@mit.edu\u003e\nAcked-by: Jordan Crouse \u003cjordan.crouse@amd.com\u003e\n" }, { "commit": "03d2826d21015f3f874e2ddaf834920b8fd80b3d", "tree": "3e2d2d79adbc8d57e41123594d70201cad9da90e", "parents": [ "97a647014dfe966ab2cd4966e487b18a5c807530" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 13 14:56:54 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 13 14:56:54 2007 +0000" }, "message": "Fix ATMEL 29C020 detection with flashrom\n\nThe JEDEC probe routine had a delay of 10 us after entering ID mode\nand this was insufficient for the 29C020. The data sheet claims we\nhave to wait 10 ms, but tests have shown that 20 us suffice. Allow for\nvariations in chip delays with a factor of 2 safety margin.\n\nCorresponding to flashrom svn r159 and coreboot v2 svn r2962.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "97a647014dfe966ab2cd4966e487b18a5c807530", "tree": "c476c3315be0f78d0c17cc99b3589f0cb1f9f291", "parents": [ "220e26be9cb3026f054137a4d74a9734023646b2" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 30 00:56:50 2007 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 30 00:56:50 2007 +0000" }, "message": "Add support for Intel 440MX and Fujitsu MBM29F400TC\n\nDetection and reading works, writing is not tested.\n\nCorresponding to flashrom svn r158 and coreboot v2 svn r2903.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "220e26be9cb3026f054137a4d74a9734023646b2", "tree": "2968ce1defe26af2d5a619f741ab6843a655ea9e", "parents": [ "539478d7fe0bd8e8c0ebfd409d9b9e1e0766f794" ], "author": { "name": "Peter Lemenkov", "email": "lemenkov@gmail.com", "time": "Thu Oct 25 04:11:11 2007 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Thu Oct 25 04:11:11 2007 +0000" }, "message": "Add Am29LV040B\n\nLooking through the sources of Uniflash utility I found that this chip\nis no more no less than low-voltage variant of Am29F040B but with\ndifferent ID.\n\nSo I created a very quick patch (attached).\n\nCorresponding to flashrom svn r157 and coreboot v2 svn r2897.\n\nSigned-off-by: Peter Lemenkov \u003clemenkov@gmail.com\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "539478d7fe0bd8e8c0ebfd409d9b9e1e0766f794", "tree": "c66543a64ffda3ea869f677f834f95eb084c6dc4", "parents": [ "5b1c6ed8ded7157ea23d20d16bc0e37a947665fe" ], "author": { "name": "Peter Lemenkov", "email": "lemenkov@gmail.com", "time": "Mon Oct 22 20:36:16 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Oct 22 20:36:16 2007 +0000" }, "message": "Add more Vendor IDs and ensure correct sorting in flash.h\n\nCorresponding to flashrom svn r156 and coreboot v2 svn r2884.\n\nSigned-off-by: Peter Lemenkov \u003clemenkov@gmail.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "5b1c6ed8ded7157ea23d20d16bc0e37a947665fe", "tree": "0411d58e3e8519098e5e3cf33a8f4ea411267d4f", "parents": [ "145acec2a345a229afc33bc6ab80cf7d82eb7f95" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Oct 22 16:15:28 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Oct 22 16:15:28 2007 +0000" }, "message": "Introduce block and sector erase routines, but do not use them yet\n\nCorresponding to flashrom svn r155 and coreboot v2 svn r2881.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "145acec2a345a229afc33bc6ab80cf7d82eb7f95", "tree": "bb7b8be5e2fc7ac08411963e830c360a8a299355", "parents": [ "67808fe9ca2ea2300838333e7090eed2e24a2e4f" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Oct 18 17:56:42 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Oct 18 17:56:42 2007 +0000" }, "message": "Remove hardcoded wait from SPI write/erase routines and check the chip status register instead\n\nThis has been tested by Harald Gutmann \u003charald.gutmann@gmx.net\u003e with a\nMX25L4005 chip.\n\nCorresponding to flashrom svn r154 and coreboot v2 svn r2876.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "67808fe9ca2ea2300838333e7090eed2e24a2e4f", "tree": "b61a197e60bd43a3f4718dc4faec582ecaafaf80", "parents": [ "6b44496c562b4c4be1ea32c7122904095210b33f" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Oct 18 00:29:05 2007 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Oct 18 00:29:05 2007 +0000" }, "message": "Documentation fixes and updates\n\nCorresponding to flashrom svn r153 and coreboot v2 svn r2875.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "6b44496c562b4c4be1ea32c7122904095210b33f", "tree": "56258d0ba9fba8ea65739f8493936b7ec5782beb", "parents": [ "a502dcea3df45326898b99dc9f5f3744a776339d" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Oct 18 00:24:07 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Oct 18 00:24:07 2007 +0000" }, "message": "Add generic SPI flash erase and write support\n\nThe first chip the code was tested and verified with is the Macronix\nMX25L4005, but other chips should work as well. Timeouts are still\nhardcoded to data sheet maxima, but the status register checking code is\nalready there. Thanks to Harald Gutmann for the initial code on which\nthis is loosely based.\n\nCorresponding to flashrom svn r152 and coreboot v2 svn r2874.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "a502dcea3df45326898b99dc9f5f3744a776339d", "tree": "9746755cc3c75130ac3a05755ebbbcaff8fd81f3", "parents": [ "dca0ab18840775e1d423faff55045066344ccb87" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Oct 17 23:55:15 2007 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Oct 17 23:55:15 2007 +0000" }, "message": "Some cosmetic cleanups in the flashrom code and output\n\nCorresponding to flashrom svn r151 and coreboot v2 svn r2873.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "dca0ab18840775e1d423faff55045066344ccb87", "tree": "385324a93cb191cc05b707102fea705e0377ac69", "parents": [ "2c5d4c69fa1533c14aa5ce9e4c0b5545bc64f436" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Oct 17 22:30:07 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Oct 17 22:30:07 2007 +0000" }, "message": "Fix wrong values/typos in chipset_enable.c\n\nThis has been confirmed by Ed Swierk in\nhttp://www.mail-archive.com/linuxbios@linuxbios.org/msg09788.html .\n\nCorresponding to flashrom svn r150 and coreboot v2 svn r2868.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "2c5d4c69fa1533c14aa5ce9e4c0b5545bc64f436", "tree": "75347af87e6143dbd957c8c81b692a4e58c2698f", "parents": [ "3385cb806930698f61898e2622c3e75057c05c4b" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 16 23:36:34 2007 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 16 23:36:34 2007 +0000" }, "message": "Multiple flashrom fixes\n\n - Install binary in /usr/sbin (not /usr/bin), as it\u0027s a root-only tool.\n\n - Rename manpage from flashrom.1 to flashrom.8, as section 8 contains\n \"System administration commands (usually only for root)\".\n\n - Actually install the manpage upon \u0027make install\u0027.\n\nCorresponding to flashrom svn r149 and coreboot v2 svn r2866.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "3385cb806930698f61898e2622c3e75057c05c4b", "tree": "246da0c797e61cfad28117ee3d21a01d34b41794", "parents": [ "3d94a0e00e4d3fdb5f799861d3b354d13a1fcd95" ], "author": { "name": "Michael van der Kolff", "email": "mvanderkolff@gmail.com", "time": "Tue Oct 16 21:18:43 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Oct 16 21:18:43 2007 +0000" }, "message": "Add Gigabyte M61P-S3 SPI flash support to board_enable.c\n\nCorresponding to flashrom svn r148 and coreboot v2 svn r2864.\n\nSigned-off-by: Michael van der Kolff \u003cmvanderkolff@gmail.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "3d94a0e00e4d3fdb5f799861d3b354d13a1fcd95", "tree": "99411d8ca9990c7d7c5120067e54501782f68584", "parents": [ "70539260f5108c9550bde7fa2fb0b9c6653bd78b" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Oct 16 21:09:06 2007 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Oct 16 21:09:06 2007 +0000" }, "message": "Convert the existing it8716f_* functions to generic_spi_* functions\n\nCorresponding to flashrom svn r147 and coreboot v2 svn r2863.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "70539260f5108c9550bde7fa2fb0b9c6653bd78b", "tree": "3577e0dad3917c1fa453acacee17765d264070fd", "parents": [ "00f911e0a82b5789fd0ffb9feb939c05afef3236" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Oct 15 21:45:29 2007 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Mon Oct 15 21:45:29 2007 +0000" }, "message": "Add spi.c forgotten in r145\n\nCorresponding to flashrom svn r146 and coreboot v2 svn r2858.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "00f911e0a82b5789fd0ffb9feb939c05afef3236", "tree": "5952b42e26c6379b00935446a324727b830479eb", "parents": [ "fa496928690b691e085ed97634c45a3b917afc7b" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Oct 15 21:44:47 2007 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Mon Oct 15 21:44:47 2007 +0000" }, "message": "Move SPI code out of board_enable.c where it started its life\n\nThe SPI chip finding and SPI chip accessor code is moved as well. This\ncan be split later if we feel like it.\n\nThe non-use of svn cp is intentional because the only history we\u0027d\nhave to preserve are a few commits which were early prototypes of chip\nidentification code. For those who intend to look at that history, they\ncan look at board_enable.c revision 2853.\n\nCorresponding to flashrom svn r145 and coreboot v2 svn r2857.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "fa496928690b691e085ed97634c45a3b917afc7b", "tree": "b4ce65a3a243f9d420b2e39e02ba412d29ed9d85", "parents": [ "ac30934194fde85d50d46506cfe356c77cc47cc8" ], "author": { "name": "Ronald G. Minnich", "email": "rminnich@gmail.com", "time": "Fri Oct 12 21:22:40 2007 +0000" }, "committer": { "name": "Ronald G. Minnich", "email": "rminnich@gmail.com", "time": "Fri Oct 12 21:22:40 2007 +0000" }, "message": "Changes to support the K8N-NEO3, first tested at Google on GSOC day :-)\n\nAlso minor changes to remove tab-space combinations where possible. \n\nCorresponding to flashrom svn r144 and coreboot v2 svn r2850.\n\nSigned-off-by: Ronald G. Minnich \u003crminnich@gmail.com\u003e\nSigned-off-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "ac30934194fde85d50d46506cfe356c77cc47cc8", "tree": "42f96e75d5a630600ee793947d7e9aed32da771d", "parents": [ "17d00abf0a1977fc4b10f64296671af7f903c6bc" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Oct 10 17:42:20 2007 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Oct 10 17:42:20 2007 +0000" }, "message": "Revert my last cleanup patch\n\nCorresponding to flashrom svn r143 and coreboot v2 svn r2847.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "17d00abf0a1977fc4b10f64296671af7f903c6bc", "tree": "cd8fa2c2d1225ed2221e26f50f10300a00f9e212", "parents": [ "144ede66ca3fcea7f891b31642181fbc6ebec643" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Oct 10 16:31:30 2007 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Oct 10 16:31:30 2007 +0000" }, "message": "Cosmetic changes to make the flashrom output more consistent\n\nCorresponding to flashrom svn r142 and coreboot v2 svn r2846.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "144ede66ca3fcea7f891b31642181fbc6ebec643", "tree": "42f96e75d5a630600ee793947d7e9aed32da771d", "parents": [ "e151499fd25fb8b46463cc6562e88016bcda3932" ], "author": { "name": "Jordan Crouse", "email": "jordan.crouse@amd.com", "time": "Thu Oct 04 06:26:41 2007 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Thu Oct 04 06:26:41 2007 +0000" }, "message": "Fix the help, and print a message when nothing happens\n\nThe help implied that writes happen by default, which they don\u0027t. Fix\nthe text, and say something when we dont specify any commands.\n\nCorresponding to flashrom svn r141 and coreboot v2 svn r2820.\n\nSigned-off-by: Jordan Crouse \u003cjordan.crouse@amd.com\u003e \nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "e151499fd25fb8b46463cc6562e88016bcda3932", "tree": "61a0bd17a96cd4238e4f3b438a9122ee48c5c40c", "parents": [ "92242628382764c1ad8ea57a7263569bc8300b45" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Oct 02 15:49:25 2007 +0000" }, "committer": { "name": "Ward Vandewege", "email": "ward@gnu.org", "time": "Tue Oct 02 15:49:25 2007 +0000" }, "message": "This patch aims to restructure SPI flash support in a more reasonable way\n\nIt introduces a generic SPI host driver for the IT8716F Super I/O\nwhich will enable easy SPI programming without having to care for the\npeculiarities of the SPI host.\n\nTo activate probing for the IT8716F, you have to use the gigabyte:m57sli\nmainboard override. SPI support will then use the gathered SPI host data\nto access the SPI flash.\n\nThis has been tested sucessfully by Ward Vandewege \u003cward@gnu.org\u003e on the\nGA-M57SLI v2.0, which has a MX25L4005 SPI flash part.\n\nCorresponding to flashrom svn r140 and coreboot v2 svn r2817.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Ward Vandewege \u003cward@gnu.org\u003e\n" } ], "next": "92242628382764c1ad8ea57a7263569bc8300b45" }