)]}' { "log": [ { "commit": "92a54ca0300dd6e0f9773a4313ab489df79020c7", "tree": "873b9b570fd7b47fd5ff1aefea826c55e422ac71", "parents": [ "ebaffb6e51fcda2f3a337e86cbce5f5598c19367" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Nov 27 22:48:48 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Nov 27 22:48:48 2008 +0000" }, "message": "Try RES even if RDID fails\n\nThe existing check in probe_spi_res() was right for SPI controllers\nwhich support all commands, but may not exist. For controllers which\nsupport only a subset of commands, it will fail in unexpected ways. Even\nif a command is supported by the controller, it may be unavailable if\nthe controller is locked down.\n\nThe new logic checks if RDID could be issued and its return values\nmade sense (not 0xff 0xff 0xff). In that case, RES probing is not\nperformed. Otherwise, we try RES. There is one drawback: If RDID\nreturned unexpected values, we don\u0027t issue a RES probe. However, in that\ncase we should try to match RDID anyway.\n\nCorresponding to flashrom svn r348 and coreboot v2 svn r3774.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: FENG yu ning \u003cfengyuning1984@gmail.com\u003e\n" }, { "commit": "ebaffb6e51fcda2f3a337e86cbce5f5598c19367", "tree": "6203684081e810621e56cbc839a3210be0f7bb78", "parents": [ "738fdffe4079f72e2ebd10d7d8d94f526bd86e1f" ], "author": { "name": "Tero O Peippola", "email": "xeropp@gmail.com", "time": "Mon Nov 24 20:23:23 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Nov 24 20:23:23 2008 +0000" }, "message": "Add support for 32Mbit SPI flash SST25VF032B\n\nTested on gigabyte m57sli.\n\nFile util/flashrom/flash.h already had correct ID for that part.\n\nCorresponding to flashrom svn r347 and coreboot v2 svn r3769.\n\nSigned-off-by: Tero O Peippola \u003cxeropp@gmail.com\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "738fdffe4079f72e2ebd10d7d8d94f526bd86e1f", "tree": "2b702013808150a8829f47becd5e61e4a569400b", "parents": [ "598ec58e045715e75f43b8f13732caf8cd5193e3" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 18 00:43:14 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 18 00:43:14 2008 +0000" }, "message": "ichspi: use spi_nbyte_read() instead of running the opcode directly\n\nCurrently flashrom assumes every vendor BIOS shares our view about which\nSPI opcodes should be placed in which location.\n\nMove to a less optimistic implementation and actually use the generic\nSPI read functions. They\u0027re useful for abstracting exactly this stuff\nand that makes them the preferred choice.\n\nCorresponding to flashrom svn r346 and coreboot v2 svn r3758.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "598ec58e045715e75f43b8f13732caf8cd5193e3", "tree": "d749b21ab64b5d12af4f22f5e0fb214d890111e8", "parents": [ "76c2887154d00fc3350bd27ca9f14c5f38ce0fca" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 18 00:41:02 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 18 00:41:02 2008 +0000" }, "message": "Check for failed SPI command execution\n\nAlthough SPI itself does not have a mechanism to signal command failure,\nthe SPI host may be unable to send a given command over the wire due\nto security or hardware limitations. The current code ignores these\nmechanisms completely and simply assumes almost every command succeeds.\nComplain if SPI command execution fails.\n\nSince locked down Intel chipsets (like the one we had problems with\nearlier) only allow a small subset of commands, find the common subset\nof commands between the chipset and the ROM in the chip erase case. That\nis accomplished by the new spi_chip_erase_60_c7() which can be used for\nchips supporting both 0x60 and 0xc7 chip erase commands.\n\nBoth parts of the patch address problems seen in the real world. The\nincreased verbosity for the error case will help us diagnose and address\nproblems better.\n\nCorresponding to flashrom svn r345 and coreboot v2 svn r3757.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nOtherwise: Acked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "76c2887154d00fc3350bd27ca9f14c5f38ce0fca", "tree": "7be12c95925a8338526b94daf74993b93975330d", "parents": [ "986cae6790b6b9ce078fed49da10f67866e4a502" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 18 00:36:26 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 18 00:36:26 2008 +0000" }, "message": "Implement read support for the following Atmel chips\n\nAT25DF021\nAT25DF041A\nAT25DF081\nAT25DF161\nAT25DF321A\nAT25DF641\nAT25F512B\nAT25FS010\nAT25FS040\nAT26DF041\nAT26DF081A\nAT26DF161\nAT26DF161A\nAT26DF321\nAT26F004\n\nI double-checked the data sheets and am confident this will work.\n\nCorresponding to flashrom svn r344 and coreboot v2 svn r3756.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "986cae6790b6b9ce078fed49da10f67866e4a502", "tree": "c40c49c3dfabb543d4401a8fe3e1f9062e75116a", "parents": [ "d54ef6e789712b41cb4190021448f4fcaa729c56" ], "author": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Mon Nov 17 15:31:56 2008 +0000" }, "committer": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Mon Nov 17 15:31:56 2008 +0000" }, "message": "SST39VF020 TEST_OK_ PROBE READ ERASE WRITE\n\nTested fully on a ThinCan DBE61A\n\nCorresponding to flashrom svn r343 and coreboot v2 svn r3755.\n\nSigned-off-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\nAcked-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\n" }, { "commit": "d54ef6e789712b41cb4190021448f4fcaa729c56", "tree": "0fe9eee0b40661b65917d220454c932166d38cfd", "parents": [ "fc4a369669d9a113ae312b0a74874660f8eb5107" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Nov 15 13:55:43 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Nov 15 13:55:43 2008 +0000" }, "message": "The AT25 and AT26 series SPI chips from Atmel are plain EEPROMs\n\nThe AT45 series SPI chips are DataFlash EEPROMs which means they have\nodd (non-power-of-two) sector sizes, but some of the DataFlash chips can\nbe configured or ordered with power-of-two sector sizes.\n\nAdd probe support for the following Atmel SPI chips:\nAT25DF021\nAT25DF041A\nAT25DF081\nAT25DF161\nAT25DF321A\nAT25DF641\nAT25F512B\nAT25FS010\nAT25FS040\nAT26DF041\nAT26DF081A\nAT26DF161\nAT26DF161A\nAT26DF321\nAT26F004\nAT45CS1282\nAT45DB011D\nAT45DB021D\nAT45DB041D\nAT45DB081D\nAT45DB161D\nAT45DB321C\nAT45DB321D\nAT45DB642D\n\nAdd an explanation why the following chips can\u0027t be probed:\nAT45BR3214B\nAT45D011\nAT45D021A\nAT45D041A\nAT45D081A\nAT45D161\nAT45DB011\nAT45DB011B\nAT45DB021A\nAT45DB021B\nAT45DB041A\nAT45DB081A\nAT45DB161\nAT45DB161B\nAT45DB321\nAT45DB321B\nAT45DB642\n\nAdd the ID, but no probing function for this chip:\nAT25F512A\n\nCorresponding to flashrom svn r342 and coreboot v2 svn r3754.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nTested-by: Jesse Brandeburg \u003cjesse.brandeburg@intel.com\u003e\nTested-by: Andriy Gapon \u003cavg@icyb.net.ua\u003e\nAcked-by: Myles Watson \u003cmylesgw@gmail.com\u003e\n" }, { "commit": "fc4a369669d9a113ae312b0a74874660f8eb5107", "tree": "1d4dfd00c21f409a4278f9215d6124ebb8695a3e", "parents": [ "16d9c5be7fde1dbcb82a78333aaf6a03d454b434" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Nov 08 01:39:12 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Nov 08 01:39:12 2008 +0000" }, "message": "SST39SF040 TEST_OK_ PROBE READ ERASE WRITE\n\nPer report from Mario Rogen. Thanks!\n\nCorresponding to flashrom svn r341 and coreboot v2 svn r3736.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "16d9c5be7fde1dbcb82a78333aaf6a03d454b434", "tree": "490fa24de715d51e5f2019c6c649ba0e3f25e540", "parents": [ "1c2ec28ce499e532e2502b40364a1ce171b95b5c" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Nov 05 22:54:36 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Nov 05 22:54:36 2008 +0000" }, "message": "Mark ST M25P16 as fully tested\n\nThis has been confirmed by Stéphan Guilloux.\n\nCorresponding to flashrom svn r340 and coreboot v2 svn r3731.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "1c2ec28ce499e532e2502b40364a1ce171b95b5c", "tree": "5958d8798ad595203e59d0d7f0eecb089e0225a5", "parents": [ "d3b0e39f4cdee227afbbbe5ea6969f7151be471a" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 04 12:11:12 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 04 12:11:12 2008 +0000" }, "message": "Add support for 8 new chips and fix up 2 existing chips as well\n\nReplace age-old TODO comments with real explanations.\n\nFixed chips:\nFujitsu MBM29F400TC (ID definition)\nMacronix MX29F002T (chip name)\n\nNew chips:\nFujitsu MBM29F004BC\nFujitsu MBM29F004TC\nFujitsu MBM29F400BC\nMacronix MX25L512\nMacronix MX25L1005\nMacronix MX25L2005\nMacronix MX25L6405\nMacronix MX29F002B\n\nStraight from the data sheets, compile tested only.\n\nCorresponding to flashrom svn r339 and coreboot v2 svn r3730.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "d3b0e39f4cdee227afbbbe5ea6969f7151be471a", "tree": "ba19936d752c92482a9e2d507518725c594da8d7", "parents": [ "6afb613fefbd4b484babafa9680b9570aadb255d" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Nov 03 00:20:22 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Nov 03 00:20:22 2008 +0000" }, "message": "Dump ICH8/ICH9/ICH10 SPI registers\n\nThis helps a lot if we have to track down configuration weirdnesses.\n\nCorresponding to flashrom svn r338 and coreboot v2 svn r3723.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "6afb613fefbd4b484babafa9680b9570aadb255d", "tree": "582cf605e44d2d9c92de406d11cf850dd83b9fff", "parents": [ "4311956a807be357848216d5fdf665053b7ca524" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Nov 03 00:02:11 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Nov 03 00:02:11 2008 +0000" }, "message": "Add additional SPI sector erase and chip erase command functions\n\nNot all chips support all commands, so allow the implementer to select\nthe matching function. Fix a layering violation in ICH SPI code to be\nless bad. Still not perfect, but the new code is shorter, more generic\nand architecturally more sound.\n\nTODO (in a separate patch): - move the generic sector erase code to\nspi.c - decide which erase command to use based on info about the chip -\ncreate a generic spi_erase_all_sectors function which calls the generic\nsector erase function\n\nThanks to Stefan for reviewing and commenting.\n\nCorresponding to flashrom svn r337 and coreboot v2 svn r3722.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "4311956a807be357848216d5fdf665053b7ca524", "tree": "5b85af0b55a42b8bd9915d96241f6e12cfc2c8e9", "parents": [ "96e1b5507993eb62aebc4bd5bc5e3ecefae69a7e" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Sun Nov 02 19:51:50 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Sun Nov 02 19:51:50 2008 +0000" }, "message": "Drop nr/opcode_index parameter from run_opcode and search the opmenu for the opcode instead\n\nThis is slightly slower (ha, ha), but works on boards with a locked\nopmenu. Tested on ICH7 and works.\n\nCorresponding to flashrom svn r336 and coreboot v2 svn r3721.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "96e1b5507993eb62aebc4bd5bc5e3ecefae69a7e", "tree": "4af8e52788e4decd8a96c9b5217bd59bf8e02bf3", "parents": [ "81f730f792b304c713015609580969051e116d3f" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Nov 02 14:25:11 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Nov 02 14:25:11 2008 +0000" }, "message": "Add support for the ST M50FW002 chip\n\nIdentification only, erase/write are not implemented.\n\nCorresponding to flashrom svn r335 and coreboot v2 svn r3717.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n\ntested and\nAcked-by: Elia Yehuda \u003cz4ziggy@gmail.com\u003e\n" }, { "commit": "81f730f792b304c713015609580969051e116d3f", "tree": "ebcbf01445d1fdcf5fdbe8094964cf759005a61a", "parents": [ "424ed22ee975e80a61e2c3222dda757c39ebdf24" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Oct 30 03:10:17 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Oct 30 03:10:17 2008 +0000" }, "message": "Mark two more chips as fully tested\n\n - SST SST39SF010A\n - Winbond W29C011\n\nTested by me on actual hardware, all operations.\n\nCorresponding to flashrom svn r334 and coreboot v2 svn r3708.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "424ed22ee975e80a61e2c3222dda757c39ebdf24", "tree": "604ec97701af76c957c5b8eef17adab3bc95a02f", "parents": [ "b759db2cb510c3dc0a33bfdf8d9f757de500c664" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Wed Oct 29 22:13:20 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Wed Oct 29 22:13:20 2008 +0000" }, "message": "Flashrom support for some Numonyx parts (M25PE)\n\nUsing block erase d8 as discussed with Peter Stuge\n\nCorresponding to flashrom svn r333 and coreboot v2 svn r3707.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "b759db2cb510c3dc0a33bfdf8d9f757de500c664", "tree": "e21d91b2aff114a28b59fa57ae2e74495ae3f645", "parents": [ "2bc9f377597bde4c612db4a3ac97cd552c346ad0" ], "author": { "name": "Ed Swierk", "email": "eswierk@aristanetworks.com", "time": "Wed Oct 29 14:54:36 2008 +0000" }, "committer": { "name": "Ed Swierk", "email": "eswierk@arastra.com", "time": "Wed Oct 29 14:54:36 2008 +0000" }, "message": "Enable SPI boot flash support on EP80579, which has the ICH7 register set\n\nCorresponding to flashrom svn r332 and coreboot v2 svn r3706.\n\nSigned-off-by: Ed Swierk \u003ceswierk@aristanetworks.com\u003e\nAcked-by: Ed Swierk \u003ceswierk@aristanetworks.com\u003e\n" }, { "commit": "2bc9f377597bde4c612db4a3ac97cd552c346ad0", "tree": "a325429f59f4e1db4d989f67193966c3794ab444", "parents": [ "c556d320000949a9b82a367d9ad9d6312fe91d2a" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 28 12:00:59 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 28 12:00:59 2008 +0000" }, "message": "Mark Winbond W39V040FA (512 KB) as fully supported\n\nTested by Martin Stecklum \u003cstecky@gmx.net\u003e (both write and erase).\nThe tests were done on an MSI MS-7065 board, so that\u0027s supported now too.\n\nCorresponding to flashrom svn r331 and coreboot v2 svn r3697.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "c556d320000949a9b82a367d9ad9d6312fe91d2a", "tree": "f4ea2c7a5699353df5d7312636c88b4270a9bae2", "parents": [ "8720345d0737f943f7002a477337e42d01a6647a" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 28 11:50:05 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 28 11:50:05 2008 +0000" }, "message": "Add support for the Intel 82371MX (MPIIX) southbridge\n\nUntested, but should work just as well as the other *PIIX* southbridges\naccording to the datasheets.\n\nCorresponding to flashrom svn r330 and coreboot v2 svn r3696.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "8720345d0737f943f7002a477337e42d01a6647a", "tree": "4e9b6d02384c809db650cc2d07246b2a3d486e26", "parents": [ "190f8497d7f3bd354841ffc040e6d5115fda3b12" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sun Oct 26 18:40:42 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sun Oct 26 18:40:42 2008 +0000" }, "message": "Add support for the Intel 82371FB PIIX and 82371SB (PIIX3) southbridges\n\nTested on PIIX3 hardware.\n\nCorresponding to flashrom svn r329 and coreboot v2 svn r3694.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Corey Osgood \u003ccorey.osgood@gmail.com\u003e\n" }, { "commit": "190f8497d7f3bd354841ffc040e6d5115fda3b12", "tree": "0737dc79a6e2d338655d33e3aeffbb8f9daee937", "parents": [ "1b0f61f80b38aa3057468e1d040e28334dafb6ce" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sat Oct 25 18:03:50 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sat Oct 25 18:03:50 2008 +0000" }, "message": "Add support for the VIA VT82C586A/B chipset, improve documentation\n\nCorresponding to flashrom svn r328 and coreboot v2 svn r3693.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "1b0f61f80b38aa3057468e1d040e28334dafb6ce", "tree": "443c194a4296d838ab9fda3b3ec7748172d8d704", "parents": [ "394131ef1447aa9019f9b03797955fb4fdda74bd" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 21 22:09:02 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 21 22:09:02 2008 +0000" }, "message": "Reduce serial output, otherwise flashing will fail very often\n\nThis has been tested on hardware by me.\n\nCorresponding to flashrom svn r327 and coreboot v2 svn r3682.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "394131ef1447aa9019f9b03797955fb4fdda74bd", "tree": "8be1ee454d786c1aae0ea45be068e22b2a7c70a5", "parents": [ "a88daa731de1612641a9a8df2a63f5529ac7a6b1" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sat Oct 18 21:14:13 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sat Oct 18 21:14:13 2008 +0000" }, "message": "Coding-style fixes for flashrom, partly indent-aided\n\nCorresponding to flashrom svn r326 and coreboot v2 svn r3669.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "a88daa731de1612641a9a8df2a63f5529ac7a6b1", "tree": "0c806490d4be0f07f3468f55ed2e49104024251e", "parents": [ "3af487d419f87fef25a976055a0656c446212e0e" ], "author": { "name": "Urja Rannikko", "email": "urjaman@gmail.com", "time": "Sat Oct 18 13:54:30 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Oct 18 13:54:30 2008 +0000" }, "message": "Allow the SiS 620 chipset to detect and read at least 256kb chips\n\nBased on the 5595 datasheet and uniflash 1.40 sources, only looking for info\nabout SiS620.\n\nCorresponding to flashrom svn r325 and coreboot v2 svn r3668.\n\nSigned-off-by: Urja Rannikko \u003curjaman@gmail.com\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "3af487d419f87fef25a976055a0656c446212e0e", "tree": "ced984deeba81546b9218b645dd738275fa68539", "parents": [ "28ec74b22959d90d7587b09809dba5db010b39b5" ], "author": { "name": "Marc Jones", "email": "marcj.jones@amd.com", "time": "Wed Oct 15 17:50:29 2008 +0000" }, "committer": { "name": "Marc Jones", "email": "marcj.jones@amd.com", "time": "Wed Oct 15 17:50:29 2008 +0000" }, "message": "SB600 has four write once LPC ROM protect areas\n\nIt is not possible to write enable that area once the register is set so\nprint a warning.\n\nCorresponding to flashrom svn r324 and coreboot v2 svn r3659.\n\nSigned-off-by: Marc Jones \u003cmarcj.jones@amd.com\u003e\nAcked-by: Ronald G. Minnich \u003crminnich@gmail.com\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "28ec74b22959d90d7587b09809dba5db010b39b5", "tree": "497ac0588a29224d79c97dce000804e42d30b6dc", "parents": [ "23dc1df565e66bd31813c4063e75df015d630e75" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Oct 10 20:54:41 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Oct 10 20:54:41 2008 +0000" }, "message": "Add ICH10 support\n\nThe ICH9 and ICH10 data sheets are identical regarding FWH/SPI flash\ninterfaces, so this just adds the required PCI IDs.\n\nCorresponding to flashrom svn r323 and coreboot v2 svn r3648.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "23dc1df565e66bd31813c4063e75df015d630e75", "tree": "b0fbf43fd103eae5fe2bb35e505952e6ab21cce6", "parents": [ "cbfed288803019bba1901cf2fbeac2d9222bd761" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Oct 10 20:43:17 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Oct 10 20:43:17 2008 +0000" }, "message": "Check that a filename was specified also when using force read\n\nCorresponding to flashrom svn r322 and coreboot v2 svn r3647.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "cbfed288803019bba1901cf2fbeac2d9222bd761", "tree": "57fe9da2ac59ef2f5530f68f8df2db445c7b9ec1", "parents": [ "205633e12fc13676529fdf5a341b652740a3ee97" ], "author": { "name": "Mats Erik Andersson", "email": "mats.andersson@gisladisker.se", "time": "Tue Oct 07 12:21:12 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Oct 07 12:21:12 2008 +0000" }, "message": "Support for AM29F002(N)B[BT]\n\nFully tested on AM29F002NBT.\n\nProbing, reading, and erasing use the Jedec-routines, whereas writing\nresort to the recent write_en29f002a(), since also these chips use a\nbyte wise algorithm.\n\nCorresponding to flashrom svn r321 and coreboot v2 svn r3639.\n\nSigned-off-by: Mats Erik Andersson \u003cmats.andersson@gisladisker.se\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "205633e12fc13676529fdf5a341b652740a3ee97", "tree": "8bf3687e34a91ff56e8d7648a22873309aceda3f", "parents": [ "9a362c583bb007ee91c75b7b8af4368e5587f958" ], "author": { "name": "Tim ter Laak", "email": "timl@scintilla.utwente.nl", "time": "Tue Sep 30 04:13:32 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Sep 30 04:13:32 2008 +0000" }, "message": "This patch fixes support for the AT49F002N(T) chip in the flashrom tool\n\nIt replaces the write function to one based on write_byte_program_jedec()\ninstead of write_page_write_jedec(), as this part does not support page\nprogramming.\nI have verified the NT variant to fully work now, and adjusted the test\nstatus accordingly. The N variant *should* also work with this patch, but\nremains untested.\n\nCorresponding to flashrom svn r320 and coreboot v2 svn r3619.\n\nSigned-off-by: Tim ter Laak \u003ctiml@scintilla.utwente.nl\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "9a362c583bb007ee91c75b7b8af4368e5587f958", "tree": "f3297dea10af18f062d23487adf2ef92eb100996", "parents": [ "c010e0b14ffde8618af3b2f37e7f4005448cb9c1" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Sep 30 04:00:23 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Sep 30 04:00:23 2008 +0000" }, "message": "ST M29F040B status TEST_OK_ PROBE READ ERASE WRITE\n\nPer report from Daniel Lindenaar. Thanks!\n\nCorresponding to flashrom svn r319 and coreboot v2 svn r3618.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "c010e0b14ffde8618af3b2f37e7f4005448cb9c1", "tree": "c51d616b3c893a698c86fe41f83cc5616801343d", "parents": [ "e8782a63074eb5338d0a5c08e1922563a068e1ee" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Sep 29 21:21:36 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Sep 29 21:21:36 2008 +0000" }, "message": "Fix typo in r3615 (TEST_PREW -\u003e TEST_OK_PREW)\n\nCorresponding to flashrom svn r318 and coreboot v2 svn r3616.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "e8782a63074eb5338d0a5c08e1922563a068e1ee", "tree": "ec0a2068bca067fd94ec316982042174d78ca1fe", "parents": [ "44e1a194678f33b5f660c2d387c4a4be0a50ffd8" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Mon Sep 29 18:48:23 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Mon Sep 29 18:48:23 2008 +0000" }, "message": "Mark the SyncMOS S29C51002T as working\n\nAll operations tested by me on hardware.\n\nCorresponding to flashrom svn r317 and coreboot v2 svn r3615.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "44e1a194678f33b5f660c2d387c4a4be0a50ffd8", "tree": "cd26907682dc2637ded91420e082261e2bd6f373", "parents": [ "3d20d901ec7afa4d39727765a77f292d6142d664" ], "author": { "name": "Mats Erik Andersson", "email": "mats.andersson@gisladisker.se", "time": "Fri Sep 26 13:19:02 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Fri Sep 26 13:19:02 2008 +0000" }, "message": "Activate proper support for EN29F002(A)(N)[BT]\n\nFully tested for Probe/Read/Erase/Write on EN29F002NT.\nJedec subroutines \u0027probe_jedec()\u0027 and \u0027erase_chip_jedec()\u0027\nare still in use, but a tailored \u0027write_en29f002a()\u0027 is\nneeded due to a byte wise writing mechanism for this chip.\n\nCorresponding to flashrom svn r316 and coreboot v2 svn r3602.\n\nSigned-off-by: Mats Erik Andersson \u003cmats.andersson@gisladisker.se\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "3d20d901ec7afa4d39727765a77f292d6142d664", "tree": "5a0dcf3e1822df501ce3c8254c8579de632a9337", "parents": [ "80d667b518c5ff4f42e39f0c5c2b9b7d646fe515" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Sep 10 09:55:10 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Sep 10 09:55:10 2008 +0000" }, "message": "Winbond W49V002A TEST_OK_ PROBE READ ERASE WRITE\n\nPer report from Kevin O\u0027Connor. Thanks Kevin!\n\nCorresponding to flashrom svn r315 and coreboot v2 svn r3570.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "80d667b518c5ff4f42e39f0c5c2b9b7d646fe515", "tree": "f857c102a8c2a296337dbb3553ae75cb9228d0ee", "parents": [ "483b8f0c0d55a4dd13e3624214b18e523c688df7" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Sep 07 03:14:27 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Sep 07 03:14:27 2008 +0000" }, "message": "Debug print actual time base calculated by myusec_calibrate_delay()\n\nCorresponding to flashrom svn r314 and coreboot v2 svn r3569.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "483b8f0c0d55a4dd13e3624214b18e523c688df7", "tree": "6b36d75859e9179323501722c38db049f812fd7a", "parents": [ "8d74c1b05a4865385b5a4c955dca7543cfb9768a" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Sep 03 23:10:05 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Sep 03 23:10:05 2008 +0000" }, "message": "Only find \"unknown .. SPI chip\" if no other chip was found\n\nThis removes the false positive matches we\u0027ve been seeing, and also removes\nthe true positive match in case there is more than one flash chip and the 2nd\nor 3rd are unknown - but I think that case is uncommon enough to warrant the\nimprovement in the common case. Use flashrom -frc forced read if you have the\nuncommon case, and/or please add the flash chip to the flashchips array.\n\nCorresponding to flashrom svn r313 and coreboot v2 svn r3562.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "8d74c1b05a4865385b5a4c955dca7543cfb9768a", "tree": "413444209019ae6ac7f4defcbe4f27eb3cd53412", "parents": [ "e7efd4caf8f7e00f7d32849504a9c95fd7726f1c" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Sep 02 00:26:11 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Sep 02 00:26:11 2008 +0000" }, "message": "SST49LF016C TEST_OK_ PROBE READ ERASE WRITE\n\nPer test report from Bari Ari. Thanks!\n\nCorresponding to flashrom svn r312 and coreboot v2 svn r3557.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "e7efd4caf8f7e00f7d32849504a9c95fd7726f1c", "tree": "5a0005782160d7b68874db05daf44aa738c308f7", "parents": [ "cd2ed475ada1e04968d05d33aa657cbb35f91c22" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Aug 27 21:28:41 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Aug 27 21:28:41 2008 +0000" }, "message": "SST25VF016B TEST_OK_ PROBE READ ERASE WRITE\n\nPer test report from Ward.\n\nCorresponding to flashrom svn r311 and coreboot v2 svn r3541.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "cd2ed475ada1e04968d05d33aa657cbb35f91c22", "tree": "923fe7e1740fd6f0f6c6b3aee55ae068978540ac", "parents": [ "b20953c3b9340cfb6211d64cd6b453478be6bd31" ], "author": { "name": "Ed Swierk", "email": "eswierk@arastra.com", "time": "Wed Aug 20 20:31:41 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Aug 20 20:31:41 2008 +0000" }, "message": "Recognize the Intel EP80579 LPC flash interface\n\nCorresponding to flashrom svn r310 and coreboot v2 svn r3532.\n\nSigned-off-by: Ed Swierk \u003ceswierk@arastra.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "b20953c3b9340cfb6211d64cd6b453478be6bd31", "tree": "38fc8b5e1d1d75fbcff7bfc8d6d4e0ed5ef5d6fb", "parents": [ "0d29b60641438d4383eec5410a31c3acaa9f807a" ], "author": { "name": "Sean Nelson", "email": "snelson@nmt.edu", "time": "Tue Aug 19 21:51:39 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Tue Aug 19 21:51:39 2008 +0000" }, "message": "Add support for MSI KT4V\n\nThe KT4V is autodetected and supports the KT3 Ultra 2 with \"-m msi:kt4v\"\n(but is not autodetected, yet).\n\nCorresponding to flashrom svn r309 and coreboot v2 svn r3528.\n\nSigned-off-by: Sean Nelson \u003csnelson@nmt.edu\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "0d29b60641438d4383eec5410a31c3acaa9f807a", "tree": "35cdb3595d9b3499d5840583db844e9665f12e1b", "parents": [ "bff9bf24c77e5536539ea5bf86cf665bc471e680" ], "author": { "name": "Segher Boessenkool", "email": "segher@kernel.crashing.org", "time": "Tue Aug 12 11:58:00 2008 +0000" }, "committer": { "name": "Segher Boessenkool", "email": "segher@kernel.crashing.org", "time": "Tue Aug 12 11:58:00 2008 +0000" }, "message": "Fix error -EINVAL on mmap()\n\nDon\u0027t calculate \"flash_baseaddr\" until the final value of \"size\"\nis known, otherwise we end up trying to map a page right after\nthe end of memory.\n\nFixes #112.\n\nCorresponding to flashrom svn r308 and coreboot v2 svn r3502.\n\nSigned-off-by: Segher Boessenkool \u003csegher@kernel.crashing.org\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "bff9bf24c77e5536539ea5bf86cf665bc471e680", "tree": "6657b4ea4a84bdfbef9204d89665f3094339d0ef", "parents": [ "566ce1bea01fcb943dd5253141818151629bb8cd" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Aug 08 10:55:57 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Aug 08 10:55:57 2008 +0000" }, "message": "ST M50FW040 TEST_OK PROBE READ ERASE WRITE\n\nPer test report from Marcel Konrad. Thanks!\n\nCorresponding to flashrom svn r307 and coreboot v2 svn r3485.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "566ce1bea01fcb943dd5253141818151629bb8cd", "tree": "c83f2ee8eadfc3dc47451ce723baf9897d3f9bf0", "parents": [ "ec20a75c37b116fb704ef39dde3c6bf0f4b90dc3" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Sat Aug 02 15:13:58 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Sat Aug 02 15:13:58 2008 +0000" }, "message": "Update copyright year\n\nCorresponding to flashrom svn r306 and coreboot v2 svn r3464.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "ec20a75c37b116fb704ef39dde3c6bf0f4b90dc3", "tree": "f6379e378df351f317d7efc83597bc583b4916a8", "parents": [ "cce2682d6e7275d7ae66bb7c1a50a84b834aaecf" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Sat Aug 02 14:58:49 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Sat Aug 02 14:58:49 2008 +0000" }, "message": "Tested another intel chip\n\nCorresponding to flashrom svn r305 and coreboot v2 svn r3462.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "cce2682d6e7275d7ae66bb7c1a50a84b834aaecf", "tree": "bd81dfe7220babdbfaa1f9ef0d88c20d251d628d", "parents": [ "85f8a1725f852104dd5f28179776d7d336f14d7f" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jul 21 17:48:40 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jul 21 17:48:40 2008 +0000" }, "message": "Winbond W39V040C and MSI K8T Neo2-F\n\nW39V040C does standard JEDEC commands except chip erase so add a small driver.\nprobe_w39v040c() prints the block lock pin status when a chip is found.\n\nThe Neo2 board enable matches on 8237-internal IDE and onboard NIC PCI IDs.\n\nMany thanks to Daniel McLellan for testing all of this on hardware!\nBuild tested by Uwe.\n\nCorresponding to flashrom svn r304 and coreboot v2 svn r3431.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "85f8a1725f852104dd5f28179776d7d336f14d7f", "tree": "49bf9660f02fad3a56a1aee7a8948e3b3824da17", "parents": [ "f83221b6db1a35b559830c01fe40cdb4fa3f5fb2" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Jul 11 00:06:38 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Jul 11 00:06:38 2008 +0000" }, "message": "Fix and clean up coreboot image detection heuristic\n\nAdditional compile fix for NetBSD.\n\nCorresponding to flashrom svn r303 and coreboot v2 svn r3420.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "f83221b6db1a35b559830c01fe40cdb4fa3f5fb2", "tree": "83dc53759cd8cca1419c8e1e43dc3e83d15995f2", "parents": [ "6a214163c098f63a2fc3595d69f41b1cab0e64c9" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jul 07 06:38:51 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jul 07 06:38:51 2008 +0000" }, "message": "Trivial SPI cleanups\n\nWhile writing a new SPI driver I fixed some things in the SPI code:\nAll calls to spi_command() had unneccessary #define duplications, and in some\ncases the read count define could theoretically become harmful because NULL was\npassed for the read buffer. Avoid a crash, should someone change the #defines.\n\nI also noticed that the only caller of spi_page_program() was the it87 driver,\nand spi_page_program() could only call back into the it87 driver. Removed the\nfunction for easier-to-follow code and made it8716f_spi_page_program() static.\nThe ichspi driver\u0027s static page functions are already static.\n\nCorresponding to flashrom svn r302 and coreboot v2 svn r3418.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "6a214163c098f63a2fc3595d69f41b1cab0e64c9", "tree": "fb30c50bcfa3015281f8ecca3a6ae92b394063e3", "parents": [ "8b114399d6e183141275b5a72a4c0bbc61abacae" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jul 07 05:14:06 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Mon Jul 07 05:14:06 2008 +0000" }, "message": "Trivial indent fix in ichspi.c\n\nCorresponding to flashrom svn r301 and coreboot v2 svn r3417.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "8b114399d6e183141275b5a72a4c0bbc61abacae", "tree": "730dcdb02bc58549f4d47258e0e3212b7ec126af", "parents": [ "e707d6449699c1c67bdd4d5bc8cd4e34bb01b0ef" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Jul 06 23:04:01 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Jul 06 23:04:01 2008 +0000" }, "message": "r3415 removed symbolic constants for device IDs by accident\n\nFlash.h is a database of known IDs, whereas flashchips.c is a database\nof chips for which support has been implemented. Keep it that way.\n\nCorresponding to flashrom svn r300 and coreboot v2 svn r3416.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "e707d6449699c1c67bdd4d5bc8cd4e34bb01b0ef", "tree": "21357aac24eee6c74831fbab48646e4e3b614123", "parents": [ "7f27464c8a39c07ba5fcff07b120db9a06efa053" ], "author": { "name": "Andreas Thienemann", "email": "andreas@bawue.net", "time": "Sun Jul 06 17:35:30 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jul 06 17:35:30 2008 +0000" }, "message": "Add AMIC A29002\n\nThis patch adds support to the AMIC A29002 chip in its top and bottom\nconfiguration to flashrom. Additionally, the alphabetic order of the\nAMIC chips was fixed.\n\nThe datasheet is at \u003chttp://www.amictechnology.com/pdf/A29002.pdf\u003e.\n\nA29002T PREW functionality was tested and works.\n\nThis flash chip has asymmetric sector layout so it is important to use the\nmx29f002 driver, which does chip erase before writing, rather than am29f040b,\nwhich uses sector erase.\n\nCorresponding to flashrom svn r299 and coreboot v2 svn r3415.\n\nSigned-off-by: Andreas Thienemann \u003candreas@bawue.net\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "7f27464c8a39c07ba5fcff07b120db9a06efa053", "tree": "cb59153f9e78feb632cbd92d53d7c3fe4136b1f1", "parents": [ "57890c1e0671f34ef2973d6952da84e68c2f1c48" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Sat Jul 05 09:48:30 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Sat Jul 05 09:48:30 2008 +0000" }, "message": "Adding support for flashing system with Nvidia MCP67\n\nCorresponding to flashrom svn r298 and coreboot v2 svn r3414.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "57890c1e0671f34ef2973d6952da84e68c2f1c48", "tree": "8aaa540bc10b69ead5559e354b401ab5b8ec1b8b", "parents": [ "6c8866cd845e2cab5af144a81898b521768e830a" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jul 05 04:12:37 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jul 05 04:12:37 2008 +0000" }, "message": "Add PCI IDs for EPIA-CN\n\nUses the 0.0 Host bridge CN700/VN800/P4M800CE/Pro and 11.0 ISA bridge devices\nwith their 1106:aa08 subsystem id:s for autodetection.\n\nCorresponding to flashrom svn r297 and coreboot v2 svn r3413.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "6c8866cd845e2cab5af144a81898b521768e830a", "tree": "064924e9d0d2ad3b90e31ff5ffd869bf941ae72f", "parents": [ "84dcc8b38ab3dc0d5b20b62ca043fd7c438e38a2" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Jul 03 19:26:44 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Jul 03 19:26:44 2008 +0000" }, "message": "Minor cosmetics, e.g\n\nMake stuff fit in 80 chars/line etc.\n\nCorresponding to flashrom svn r296 and coreboot v2 svn r3412.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "84dcc8b38ab3dc0d5b20b62ca043fd7c438e38a2", "tree": "595f4f4b937ec166d28a8facefa882a13b83dfdd", "parents": [ "83af9fb77c5c1dd2bc5473d4f13bcf4f1e56028b" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jul 03 19:08:52 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jul 03 19:08:52 2008 +0000" }, "message": "Mark SST49LF040B as tested\n\nThanks to Paul Seidler and Ward Vandewege for testing.\n\nCorresponding to flashrom svn r295 and coreboot v2 svn r3411.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "83af9fb77c5c1dd2bc5473d4f13bcf4f1e56028b", "tree": "bce9bd63abd5c785ed3213bc315d02abc2fa207d", "parents": [ "e02c0bbe9d0b966681b81665184d0fa37ea7bb46" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Jul 03 18:58:58 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Jul 03 18:58:58 2008 +0000" }, "message": "Mark the SST SST49LF040 as OK (tested by me), all operations\n\nCorresponding to flashrom svn r294 and coreboot v2 svn r3410.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "e02c0bbe9d0b966681b81665184d0fa37ea7bb46", "tree": "71a24b8f5288379a2dce53da521348ae3bb2f02d", "parents": [ "ecab4fce51016418c3caae75f9f17b187cc3e0e8" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Thu Jul 03 16:54:05 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Thu Jul 03 16:54:05 2008 +0000" }, "message": "Winbond W25x80 TEST_OK PROBE READ ERASE WRITE\n\nPer test report from Björn Gerhart. Thanks!\n\nCorresponding to flashrom svn r293 and coreboot v2 svn r3409.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "ecab4fce51016418c3caae75f9f17b187cc3e0e8", "tree": "953aa9a35f8ae39071d0443382bd5b5eb9f83d64", "parents": [ "27c3e2dc23b2df8586eafbe6629ee01a4ad6784b" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jul 03 14:40:06 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jul 03 14:40:06 2008 +0000" }, "message": "Improve coreboot image detection heuristic\n\nIt\u0027s not absolutely perfect, but the likelihood of this check to fail is\n0.000000000000000000000000013 (1.3*10^-26) which is good enough for me.\n\nCorresponding to flashrom svn r292 and coreboot v2 svn r3408.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e \n" }, { "commit": "27c3e2dc23b2df8586eafbe6629ee01a4ad6784b", "tree": "9f39951428756ac3f830d5510c1bf0591261a1d1", "parents": [ "4c390c8943ae5d13265d9875e43fbda15583b364" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jul 02 17:15:47 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jul 02 17:15:47 2008 +0000" }, "message": "Probe_flash() cleanup for better code readability\n\nCorresponding to flashrom svn r291 and coreboot v2 svn r3407.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "4c390c8943ae5d13265d9875e43fbda15583b364", "tree": "cc15f86cb9f9bb9b16ac1686f1b1ca2f24ffc31f", "parents": [ "5b1488562d3056173bf490e891acf6bb2278a13b" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Wed Jul 02 13:33:09 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Wed Jul 02 13:33:09 2008 +0000" }, "message": "Set w39v080fa to fully supported\n\nI\u0027m am flashing this chip several times a day. Also enable unlocking\nwhich is only needed when running coreboot, that slipped in the original\ncommit and through the original review ;-) So it must be trivial enough.\n\nCorresponding to flashrom svn r290 and coreboot v2 svn r3406.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "5b1488562d3056173bf490e891acf6bb2278a13b", "tree": "e091510980fb5e2c7a3c702837a0db9752fe3217", "parents": [ "11103091b4ae1b578d34aa13d1b9b7ed54d7bad5" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jul 02 03:07:46 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jul 02 03:07:46 2008 +0000" }, "message": "Update to TEST_OK for Winbond W39V040FA PROBE READ\n\nThanks to Jake for the test report!\n\nCorresponding to flashrom svn r289 and coreboot v2 svn r3405.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "11103091b4ae1b578d34aa13d1b9b7ed54d7bad5", "tree": "a72d21b85e8a5636afe6774efd4000413131aa77", "parents": [ "00019d959a51808ad0801021013331dd070bb116" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jul 02 03:03:58 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jul 02 03:03:58 2008 +0000" }, "message": "Don\u0027t rm *~ in make clean, who knows what files that could be\n\nCorresponding to flashrom svn r288 and coreboot v2 svn r3404.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "00019d959a51808ad0801021013331dd070bb116", "tree": "5b90fb724b037372abd55225d471380e8206ea71", "parents": [ "0b9c5f3d89b3daee39159526da52bbff05bcb934" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jul 02 00:59:29 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jul 02 00:59:29 2008 +0000" }, "message": "Unknown vendor:board message can be triggered by -m too\n\nThanks to Stefan for pointing this one out.\n\nCorresponding to flashrom svn r287 and coreboot v2 svn r3403.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "0b9c5f3d89b3daee39159526da52bbff05bcb934", "tree": "53e1ee03fed8880cc9076c0f7c19ad088332e98f", "parents": [ "2cb94e183be9c69afcf426f70a9b4cb2bbd8bded" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jul 02 00:47:30 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jul 02 00:47:30 2008 +0000" }, "message": "Case insensitive matching of vendor:board strings in coreboot table\n\nNeeded at least for GIGABYTE:m57sli in coreboot to match gigabyte:m57sli in\nflashrom.\n\nCorresponding to flashrom svn r286 and coreboot v2 svn r3402.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "2cb94e183be9c69afcf426f70a9b4cb2bbd8bded", "tree": "151967e33263eafe4b36b556765e565532349af0", "parents": [ "e3eb9c1d69fcd878b8f6c153dbc1e15fd8b3d08d" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Mon Jun 30 23:45:22 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Mon Jun 30 23:45:22 2008 +0000" }, "message": "First attempt to clean up SPI probing and create a common construct: the flash bus\n\nAt some point the flash bus will be part of struct flashchip.\n\nPardon me for pushing this in, but I think it is important to beware of further\ndecay and it will improve things for other developers in the short run.\n\nCarl-Daniel, I will consider your suggestions in another patch. I want to keep\nthings from getting too much for now. The patch includes Rudolf\u0027s VIA SPI\nchanges though.\n\nCorresponding to flashrom svn r285 and coreboot v2 svn r3401.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "e3eb9c1d69fcd878b8f6c153dbc1e15fd8b3d08d", "tree": "01dbd2c150abe683885e2349c0be533828040dbd", "parents": [ "48a85e497ec18c9ec733fcac57d8107a5b9eaabd" ], "author": { "name": "Rudolf Marek", "email": "r.marek@assembler.cz", "time": "Mon Jun 30 21:48:54 2008 +0000" }, "committer": { "name": "Rudolf Marek", "email": "r.marek@assembler.cz", "time": "Mon Jun 30 21:48:54 2008 +0000" }, "message": "Mine AMIC flash chip needs 4 bytes RDID\n\nThis enables to use the new probing code.\n\nCorresponding to flashrom svn r284 and coreboot v2 svn r3400.\n\nSigned-off-by: Rudolf Marek \u003cr.marek@assembler.cz\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "48a85e497ec18c9ec733fcac57d8107a5b9eaabd", "tree": "6cfa6baf4bad98de5207cf7ed437331337207ec3", "parents": [ "3fdbccf697e35e3061d7a78bed10061c71b60425" ], "author": { "name": "Rudolf Marek", "email": "r.marek@assembler.cz", "time": "Mon Jun 30 21:45:17 2008 +0000" }, "committer": { "name": "Rudolf Marek", "email": "r.marek@assembler.cz", "time": "Mon Jun 30 21:45:17 2008 +0000" }, "message": "Mine AMIC flash chip needs 4 bytes RDID\n\nFollowing patch adds support for that.\n\nCorresponding to flashrom svn r283 and coreboot v2 svn r3399.\n\nSigned-off-by: Rudolf Marek \u003cr.marek@assembler.cz\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "3fdbccf697e35e3061d7a78bed10061c71b60425", "tree": "271d5f182058cf38b21a81525bee9a4b049ed8da", "parents": [ "10693353eef0cddcfb844c318363da787f69e023" ], "author": { "name": "Rudolf Marek", "email": "r.marek@assembler.cz", "time": "Mon Jun 30 21:38:30 2008 +0000" }, "committer": { "name": "Rudolf Marek", "email": "r.marek@assembler.cz", "time": "Mon Jun 30 21:38:30 2008 +0000" }, "message": "This patch adds support for VIA SPI controller on VT8237S\n\nIt is similar with few documented exceptions to ICH7 SPI controller.\n\nCorresponding to flashrom svn r282 and coreboot v2 svn r3398.\n\nSigned-off-by: Rudolf Marek \u003cr.marek@assembler.cz\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "10693353eef0cddcfb844c318363da787f69e023", "tree": "cce5da83fc71703c0eae833f9a992437d13e3a55", "parents": [ "7e2c079367fb2b9eb298b51a102ab40a70e79332" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Jun 29 10:57:13 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Jun 29 10:57:13 2008 +0000" }, "message": "Add a debug marker after ICH SPI opcode programming\n\nCorresponding to flashrom svn r281 and coreboot v2 svn r3397.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "7e2c079367fb2b9eb298b51a102ab40a70e79332", "tree": "f7110ea3a195ce2a65ec88944798b3ae6ed6a882", "parents": [ "a0a791963b963b96b8017f52c8956878ea0e3f16" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jun 29 01:30:41 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jun 29 01:30:41 2008 +0000" }, "message": "Fix ICH7 non-SPI that broke in r3393\n\nr3393 assumed that ICH7 always used SPI. This patch resets ich7_detected back\nto 0 when BOOT BIOS Straps indicate something else than SPI.\n\nAlso fixes a build error in ichspi.c with gcc 4.2.2.\n\nCorresponding to flashrom svn r280 and coreboot v2 svn r3395.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "a0a791963b963b96b8017f52c8956878ea0e3f16", "tree": "70aef5f7c0944ff4b61dfee827f8c65a5082ab1f", "parents": [ "a9424d597de410b07e34c47d7c0613f0595d5d9a" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jun 28 23:02:22 2008 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jun 28 23:02:22 2008 +0000" }, "message": "Use symbolic constants for PCI subsystem probing\n\nCorresponding to flashrom svn r279 and coreboot v2 svn r3394.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "a9424d597de410b07e34c47d7c0613f0595d5d9a", "tree": "16fc9db04f7ed29f19e454d979e9cc79216addc3", "parents": [ "325b5d47d81fb4434e722abac9600396da394218" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Fri Jun 27 16:28:34 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Fri Jun 27 16:28:34 2008 +0000" }, "message": "Multiple unrelated changes\n\n* ICH7 SPI support\n* fix some variable names in ichspi.c (Offset -\u003e offset)\n* Dump ICH7 SPI bar with -V\n* Improve error message in case IOPL goes wrong. (It might not even be an IOPL)\n\nCorresponding to flashrom svn r278 and coreboot v2 svn r3393.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "325b5d47d81fb4434e722abac9600396da394218", "tree": "e99f035a1a73b44c125faf832da63270734196a7", "parents": [ "43b2281f512892230773468e62d4ab8194c55e54" ], "author": { "name": "Stefan Reinauer", "email": "stepan@coresystems.de", "time": "Fri Jun 27 15:18:20 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Fri Jun 27 15:18:20 2008 +0000" }, "message": "Indent according to development guidelines\n\nCorresponding to flashrom svn r277 and coreboot v2 svn r3392.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "43b2281f512892230773468e62d4ab8194c55e54", "tree": "c322bd23b64576149a7ae31773b3c2c1590f6dcb", "parents": [ "e9117f7b050e55dbeea0dfc01c07646017fd9a52" ], "author": { "name": "Jens Kühnel", "email": "coreboot@jens.kuehnel.org", "time": "Thu Jun 26 11:57:27 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu Jun 26 11:57:27 2008 +0000" }, "message": "Winbond W39V080FA: Probe and Read are OK\n\nCorresponding to flashrom svn r276 and coreboot v2 svn r3390.\n\nSigned-off-by: Jens Kühnel \u003ccoreboot@jens.kuehnel.org\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "e9117f7b050e55dbeea0dfc01c07646017fd9a52", "tree": "f48f41b52400f687bc5cc13d2f02a0d08aaeac23", "parents": [ "e27fc84234172136933972df312da61096c3d5a2" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Jun 24 08:18:13 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Jun 24 08:18:13 2008 +0000" }, "message": "Test status OK for ST M50FW040 PROBE READ\n\nPer test report from Alex Perez. Thanks Alex!\n\nCorresponding to flashrom svn r275 and coreboot v2 svn r3389.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "e27fc84234172136933972df312da61096c3d5a2", "tree": "6ecbc61234601727d1e0c4f3337ff4b53f08c5aa", "parents": [ "8653b004619eb3428035698f738417521ad3f026" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Jun 24 04:17:14 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Jun 24 04:17:14 2008 +0000" }, "message": "Test status OK for Macronix MX25L8005 PROBE READ ERASE WRITE\n\nPer test report from Andrew Paprocki. Thanks Andrew!\n\nCorresponding to flashrom svn r274 and coreboot v2 svn r3388.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "8653b004619eb3428035698f738417521ad3f026", "tree": "0acff75a01fd7cf4cf1c16675163080a6e1eb205", "parents": [ "da4e5f3623b7d76d23d6271007c2be61941909ba" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Jun 24 02:09:09 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Jun 24 02:09:09 2008 +0000" }, "message": "Increase delay in probe_jedec() after Product ID Entry to 10ms\n\nWe should follow data sheet timing, even if chips have been tested to answer\nfaster in the field.\n\nCorresponding to flashrom svn r273 and coreboot v2 svn r3387.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "da4e5f3623b7d76d23d6271007c2be61941909ba", "tree": "b7ac3974f6709bcdfe61cd26aada58388274913f", "parents": [ "f8a49fee02cdc88fb1950c6768a16747917b5d5a" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Jun 24 01:22:03 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Jun 24 01:22:03 2008 +0000" }, "message": "Slight restructure of SPI probe_ functions\n\nPreparation for a probe optimization patch. This patch does not change any\nfunctionality. spi_probe_rdid was tested to still work on my M57SLI rev 2.\n\nThe idea is to have error checks return error immediately when something\nfails, rather than having code inside an if block where the condition\ntests for success.\n\nThis means: Less indentation, more clear what the code is checking.\n\nCorresponding to flashrom svn r272 and coreboot v2 svn r3386.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Ward Vandewege \u003cward@gnu.org\u003e\n" }, { "commit": "f8a49fee02cdc88fb1950c6768a16747917b5d5a", "tree": "52578084ecb859c3e7efb5b5a188e7bc7016a183", "parents": [ "87d51fb0b7584c1994304167d21077ef901824e2" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sun Jun 22 18:50:25 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Sun Jun 22 18:50:25 2008 +0000" }, "message": "Some flashrom documentation fixes, and removal of duplicated info\n\nCorresponding to flashrom svn r271 and coreboot v2 svn r3385.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "87d51fb0b7584c1994304167d21077ef901824e2", "tree": "67b646797b2f0b2b57bbc8e034a76e995bf1f781", "parents": [ "db52c58e06e250e2b44dfecf18b3646eb00c7f6a" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jun 22 17:54:03 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jun 22 17:54:03 2008 +0000" }, "message": "A few changes were committed before the DoC remove, update README\n\nCorresponding to flashrom svn r270 and coreboot v2 svn r3384.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "db52c58e06e250e2b44dfecf18b3646eb00c7f6a", "tree": "1e2ffc47f73943201415adb8242967cd94ce8ea5", "parents": [ "f1614e8d1c66d4787d9510a54db0dbe2644fe134" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jun 22 17:06:41 2008 +0000" }, "committer": { "name": "Stefan Reinauer", "email": "stefan.reinauer@coreboot.org", "time": "Sun Jun 22 17:06:41 2008 +0000" }, "message": "Remove dead M-Systems Disk on Chip code\n\nDOC support has been disabled by default for many years. The write function\ndoes nothing but print text. It has a call to write_page_md2802() commented\nout, but that function does not exist. This is dead code with ugly #ifdefs.\n\nUpdates README to reflect that there was a time when there was code, but it\ndidn\u0027t work. Removes M-Systems #defines and also includes svn rm msys_doc.*\n\nCorresponding to flashrom svn r269 and coreboot v2 svn r3382.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "f1614e8d1c66d4787d9510a54db0dbe2644fe134", "tree": "725a81a5f24bd4962623dae663b697802cea1be2", "parents": [ "681b19084276c7142a7061f95913bcef94767716" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jun 22 02:04:49 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jun 22 02:04:49 2008 +0000" }, "message": "Update test status to TEST_OK_PREW for ST M50FLW080A and SST49LF008A\n\nMany thanks to Julio Cesar Costa for the test report!\n\nCorresponding to flashrom svn r268 and coreboot v2 svn r3379.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "681b19084276c7142a7061f95913bcef94767716", "tree": "1c67938b3256e1f8985e9034af7822ac3670d184", "parents": [ "08c2b02273fd564e9d272036967b99b0628f61c1" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jun 22 02:00:39 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Jun 22 02:00:39 2008 +0000" }, "message": "Some Makefile cleaning\n\nCorresponding to flashrom svn r267 and coreboot v2 svn r3378.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "08c2b02273fd564e9d272036967b99b0628f61c1", "tree": "ac388b55b5ffaeff82ca2ff2fd8b38f622a87730", "parents": [ "cd35f779b25d21b9e50648a00b7ca84fae2036ba" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jun 21 04:39:17 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jun 21 04:39:17 2008 +0000" }, "message": "Fix OBJS in Makefile to compile stm50flw0x0x.c like the others\n\nCorresponding to flashrom svn r266 and coreboot v2 svn r3377.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "cd35f779b25d21b9e50648a00b7ca84fae2036ba", "tree": "b2aab797033860c1f87b335ef808a138368e9614", "parents": [ "bc0d85722869c54f52cde7ceb773d29ea939dca1" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jun 21 04:23:10 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jun 21 04:23:10 2008 +0000" }, "message": "Uppercase AMIC since that\u0027s what they write in datasheets\n\nCorresponding to flashrom svn r265 and coreboot v2 svn r3376.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "bc0d85722869c54f52cde7ceb773d29ea939dca1", "tree": "fe54ca9fb6aa7eaa1c42c6722373473130018122", "parents": [ "0a0a7951314ed402615e6995702c17edb07fe359" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jun 21 01:02:20 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jun 21 01:02:20 2008 +0000" }, "message": "Update comment to match delay change in probe_jedec() r3373\n\nCorresponding to flashrom svn r264 and coreboot v2 svn r3375.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "0a0a7951314ed402615e6995702c17edb07fe359", "tree": "3c19678d76bb3c737acd1b7960a79d5e35309014", "parents": [ "6a9fd1dc8c1115affe39fb39a04dc6e051eb34cc" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jun 21 00:21:22 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jun 21 00:21:22 2008 +0000" }, "message": "Update test status for Atmel AT29C020 and SST29EE010\n\nThanks to Urja Rannikko for reporting test results with these flash chips.\n\nCorresponding to flashrom svn r263 and coreboot v2 svn r3374.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "6a9fd1dc8c1115affe39fb39a04dc6e051eb34cc", "tree": "016ec42c4f7887077ba440d02c4f7f5d891edb4d", "parents": [ "cb5c211a480a4f38cce38b536220f7079ea5256d" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jun 21 00:19:52 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sat Jun 21 00:19:52 2008 +0000" }, "message": "Increase delay in probe_jedec() to 2ms to reliably detect AT29C020\n\nRun time is increased a few 100ms but this is needed for reliability.\nI consider this trivial.\n\nCorresponding to flashrom svn r262 and coreboot v2 svn r3373.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "cb5c211a480a4f38cce38b536220f7079ea5256d", "tree": "f1c851936f06b8926520843746efc839ae99fae9", "parents": [ "b9f617448d532f6b7c1946e722d2d17e5de978b8" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Jun 20 02:58:42 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Jun 20 02:58:42 2008 +0000" }, "message": "Show expected and read byte on verify failure\n\nCorresponding to flashrom svn r261 and coreboot v2 svn r3372.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "b9f617448d532f6b7c1946e722d2d17e5de978b8", "tree": "7c608125c09acbc42651b87b32f22749206c8345", "parents": [ "7ffbc6f94d50cdc584913c4f02709ae660664a75" ], "author": { "name": "Jens Kuehnel", "email": "coreboot@jens.kuehnel.org", "time": "Wed Jun 18 13:36:34 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jun 18 13:36:34 2008 +0000" }, "message": "Add support for AMIC Technology A49LF040A and do not probe W29EE011 anymore\n\nJens sent the first patch that added A49LF040A to flash.h and flashchips.c\nusing _jedec and _49lf040 functions.\n\nAn issue was found with probe_w29ee011() for the Winbond W29EE011, which\ncaused the A49LF040A to no longer respond to any commands.\n\nWard made a patch to disable probing by default for the W29EE011 following\nsome discussion. Using -c W29EE011 will make flashrom probe for the chip.\n\nPeter did some more datasheet diving and found that the Pm49FL00x functions\nsuited this chip quite well because of the block locking registers in\nA49LF040A, and finally tested PROBE READ ERASE WRITE to work on ALIX.3c3.\n\nWard confirmed that this works on alix.2c3 too.\n\nCorresponding to flashrom svn r260 and coreboot v2 svn r3368.\n\nSigned-off-by: Jens Kuehnel \u003ccoreboot@jens.kuehnel.org\u003e\nSigned-off-by: Ward Vandewege \u003cward@gnu.org\u003e\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Ward Vandewege \u003cward@gnu.org\u003e\n" }, { "commit": "7ffbc6f94d50cdc584913c4f02709ae660664a75", "tree": "449704116d9462c2f6a23d0551f1b2dab02e0d42", "parents": [ "663f17197c861126da1a2c16dba48a2ed8900f49" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jun 18 02:08:40 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jun 18 02:08:40 2008 +0000" }, "message": "Force read unknown flash chips\n\nWhen flash chip detection fails, it is still useful and possible to read the\nflash chip contents. If no flash chip is found in normal probes and the\n-f -r -c CHIPNAME options are given, a successful probe for the specified\nchip is forced, and then flashrom reads the flash chip using either the read\nfunction for the specified chip, or if there is none, a simple memcpy().\n\nThe patch also moves the global variable int force in flashrom.c into main()\nand passes it as a parameter to layout.c:show_id(), which was the only other\nfunction that used the variable. This is needed to avoid confusion with the\nnew parameter int force which is added to flashrom.c:probe_flash() and used\nto force probe success for the chip named in char *chip_to_probe.\n\nCorresponding to flashrom svn r259 and coreboot v2 svn r3367.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Ward Vandewege \u003cward@gnu.org\u003e\n" }, { "commit": "663f17197c861126da1a2c16dba48a2ed8900f49", "tree": "0d2e69670af30204c9ddf20ffc32720fe4b6e445", "parents": [ "f42b4e213469465226009caa775da5406b64fa6e" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Jun 13 01:39:45 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Fri Jun 13 01:39:45 2008 +0000" }, "message": "Board enable and autodetection for GIGABYTE GA-7VT600\n\nUses the VT8237 ISA bridge with mainboard subsystem ID and Realtek 8139 with\nmainboard subsystem ID for board detection.\n\nCorresponding to flashrom svn r258 and coreboot v2 svn r3366.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Lyos Gemini Norezel \u003clyos.gemininorezel@gmail.com\u003e\n" }, { "commit": "f42b4e213469465226009caa775da5406b64fa6e", "tree": "ce02567e6218664b01d1b270b61651fa4117e8c8", "parents": [ "4aa7156f07ea5f0d3fa19ad1dea7bd83a189a587" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jun 11 02:24:15 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jun 11 02:24:15 2008 +0000" }, "message": "Add support for Amic Technology A29040B flash chip\n\nPROBE READ tested by Lyos Gemini Norezel on BioStar P4M80-M4.\n\nCorresponding to flashrom svn r257 and coreboot v2 svn r3365.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Lyos Gemini Norezel \u003clyos.gemininorezel@gmail.com\u003e\n" }, { "commit": "4aa7156f07ea5f0d3fa19ad1dea7bd83a189a587", "tree": "9ed98a10ce9773c8833b94a9960964d8f7cef009", "parents": [ "1dbb9af151ed275c4b70a54a22494015128ee8ca" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jun 11 02:22:42 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Wed Jun 11 02:22:42 2008 +0000" }, "message": "Board enable and autodetection for BioStar P4M80-M4\n\nThanks to Reinder for clean room reverse engineering and data sheet diving!\n\nThis board is autodetected because there are some good BioStar subsystem IDs.\nMatching uses onboard VT6420 SATA RAID with subsystem BioStar 3206 and\nonboard UniChrome Pro IGP graphics with subsystem BioStar 1202.\n\nCorresponding to flashrom svn r256 and coreboot v2 svn r3364.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Lyos Gemini Norezel \u003clyos.gemininorezel@gmail.com\u003e\n" }, { "commit": "1dbb9af151ed275c4b70a54a22494015128ee8ca", "tree": "f7459124eb741cd6a353ace70a956ef83497a5e7", "parents": [ "1d3b0639175462267ed7685a90676d160c7bfd21" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Jun 03 00:22:00 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue Jun 03 00:22:00 2008 +0000" }, "message": "Mark SST SST49LF160C as fully supported.:\n\nSST SST49LF160C is confirmed to work for PROBE READ ERASE WRITE, at least on\n2 MCP55-based boards (gigabyte m57sli v1 and supermicro h8dmr).\n\nOn the m57sli board, it only works \u003e 512K when booted into coreboot; the\nproprietary bios seems to do something weird where it locks rom access down\nto the first 512K of the chip.\n\nCorresponding to flashrom svn r255 and coreboot v2 svn r3360.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "1d3b0639175462267ed7685a90676d160c7bfd21", "tree": "0eb900a1abe91569685c9e22320c61bdc20ffca7", "parents": [ "22e4d303337e602366a42ebb74a1ea9d4f8c50bc" ], "author": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Tue May 27 23:51:55 2008 +0000" }, "committer": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Tue May 27 23:51:55 2008 +0000" }, "message": "Revert r3357 and fix it as intended to (forgotten header commit instead of typo)\n\nCorresponding to flashrom svn r254 and coreboot v2 svn r3358.\n\nSigned-off-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\nAcked-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\n" }, { "commit": "22e4d303337e602366a42ebb74a1ea9d4f8c50bc", "tree": "03584e1990dbf7f6350aeb602637e7ce7ba2db16", "parents": [ "9c4fa0ebdd8a697bd654002d890055048c5067ed" ], "author": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Tue May 27 22:20:30 2008 +0000" }, "committer": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Tue May 27 22:20:30 2008 +0000" }, "message": "Fix typo introduced in r3356 that breaks build\n\nCorresponding to flashrom svn r253 and coreboot v2 svn r3357.\n\nSigned-off-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\nAcked-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\n" }, { "commit": "9c4fa0ebdd8a697bd654002d890055048c5067ed", "tree": "57b91667af48d14818be3a403402b5f0733cb1dd", "parents": [ "9c0dbcc007f4ce4dfe9067b4acf16ebbd187a983" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue May 27 20:54:09 2008 +0000" }, "committer": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Tue May 27 20:54:09 2008 +0000" }, "message": "MX25L4005, S25FL016A, W39V040B, W39V080A, SST49LF008A tests\n\nI have tested MX25L4005, S25FL016A and W39V080A myself.\n\nThanks also to the following testers:\nSST49LF008A Bernhard M. Wiedemann\nW39V040B Dan Lenski\n\nCorresponding to flashrom svn r252 and coreboot v2 svn r3356.\n\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n" }, { "commit": "9c0dbcc007f4ce4dfe9067b4acf16ebbd187a983", "tree": "032e2367fc0cff718b13d2deb1bb9ed2a6a056fb", "parents": [ "e4f1a4266fb930da72436aa87c6c3b8c30325078" ], "author": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Tue May 27 09:10:52 2008 +0000" }, "committer": { "name": "Mart Raudsepp", "email": "mart.raudsepp@artecdesign.ee", "time": "Tue May 27 09:10:52 2008 +0000" }, "message": "Mark SST49LF004A/B as tested\n\nTested by me on actual hardware (all operations) - Artec Group DBE62\nwith SST 49LF004B\n\nCorresponding to flashrom svn r251 and coreboot v2 svn r3350.\n\nSigned-off-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\nAcked-by: Mart Raudsepp \u003cmart.raudsepp@artecdesign.ee\u003e\n" }, { "commit": "e4f1a4266fb930da72436aa87c6c3b8c30325078", "tree": "742a64872bafdcdd20297dacdd6ad090a0ba5c9c", "parents": [ "793bdcd71e367a5fc3cf39109fddde7ed240ebb1" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Mon May 26 23:12:25 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Mon May 26 23:12:25 2008 +0000" }, "message": "Mark the following chips as tested\n\n - AMD Am29F040B\n - SST SST39SF020A\n - Winbond W29C020C\n - Winbond W29EE011\n - Winbond W49F002U\n\nAll of them tested by me on actual hardware (all operations).\n\nCorresponding to flashrom svn r250 and coreboot v2 svn r3349.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "793bdcd71e367a5fc3cf39109fddde7ed240ebb1", "tree": "1cb2f07828fbe4135886adda381285042e0be2bd", "parents": [ "bf579488a4cda98a3478692d87d2332e5dfeea9f" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu May 22 22:47:04 2008 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Thu May 22 22:47:04 2008 +0000" }, "message": "A bunch of cosmetic improvements\n\n - Fix typos and inconsistencies.\n - Drop duplicate line which tells us the chip name twice.\n - Also print the chip vendor, not only the name.\n\nCorresponding to flashrom svn r249 and coreboot v2 svn r3348.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" } ], "next": "bf579488a4cda98a3478692d87d2332e5dfeea9f" }