)]}'
{
  "log": [
    {
      "commit": "842d678f07439e133e69fc775a848dcd66369446",
      "tree": "c01716fbc4220c1211749772d6a566e6d70701d7",
      "parents": [
        "aa714dd3dd7090e1fa7175f3a32a252b04817261"
      ],
      "author": {
        "name": "Richard Hughes",
        "email": "richard@hughsie.com",
        "time": "Fri Jan 15 09:48:12 2021 +0000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Wed Mar 27 08:32:15 2024 +0000"
      },
      "message": "libflashrom: Return progress state to the library user\n\nProjects using libflashrom like fwupd expect the user to wait for the\noperation to complete. To avoid the user thinking the process has\n\"hung\" or \"got stuck\" report back the progress complete of the erase,\nwrite and read operations.\n\nAdd a new --progress flag to the CLI to report progress of operations.\n\nInclude a test for the dummy spi25 device.\n\nTested: ./test_build.sh; ./flashrom -p lspcon_i2c_spi:bus\u003d7 -r /dev/null --progress\n\nflashrom-stable:\n* Closer to original libflashrom API.\n* Split update_progress() into progress_start/_set/_add/_finish:\n  Simplifies progress calls scattered through the code base. We let\n  the core code in `flashprog.c` handle the total progress. Only API\n  is flashprog_progress_add().  Erase progress is completely handled\n  in `flashprog.c`. Fine grained read/write progress can be reported\n  at the chip/programmer level.\n* Add calls to all chip read/write paths and opaque programmers\n  except for read_memmapped() (which is handled in follow ups).\n* At least one wrinkle left: Erasing unaligned regions will slightly\n  overshoot total progress.\n\nChange-Id: I7197572bb7f19e3bdb2bde855d70a0f50fd3854c\nSigned-off-by: Richard Hughes \u003crichard@hughsie.com\u003e\nSigned-off-by: Daniel Campello \u003ccampello@chromium.org\u003e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/49643\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/74731\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "9a11cbf21a5078bcdb8db7584c44a9ee17020db4",
      "tree": "e67a9eadfdb7a71f81df36c7e97180474a8c59df",
      "parents": [
        "aabb3e0ff54e87c0136c91f105e506ed19184cc6"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Jan 13 01:19:07 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:40:04 2024 +0000"
      },
      "message": "Let the flash context directly point to the used master\n\nWe used to have a pointer to a full `registered_master` struct in\nour flash context. Beside the used master, this contained a bit\nmask of supported buses. Oddly convenient, this bit mask invited\nto bypass the chip driver and break the abstraction. It allowed\nto place bus-specific details virtually anywhere in flashprog,\nmaking it harder to find a good place for them.\n\nSo, get rid of the `buses_supported` bit mask by pointing directly\nto the master. Only the chip driver will implicitly know which type\nof master is used.\n\nChange-Id: I9ce13d8df0e7ccc67519d888dd9cb2e2ff8d6682\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72533\n"
    },
    {
      "commit": "aabb3e0ff54e87c0136c91f105e506ed19184cc6",
      "tree": "d53c2df274e9550b1f251a94b80add2d7285c5c4",
      "parents": [
        "89569d60e3aeeec651496b2e7a2e6064d782ab3b"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Jan 13 00:22:30 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "writeprotect: Hook wp functions into the chip driver\n\nChange-Id: I17a06210ec329aba337cf459d581463827182108\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72532\n"
    },
    {
      "commit": "89569d60e3aeeec651496b2e7a2e6064d782ab3b",
      "tree": "bf0c3951886de60086d32ff6e1a850adad926da6",
      "parents": [
        "929d2e1b17a448d3352dbecb6a620ee0c1e65a58"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 12 23:31:40 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "memory_mapped: Reduce `decode_sizes` to a single `max_rom_decode`\n\nWe used to store the maximum decode size, i.e. the maximum memory-mapped\nrange of the flash chip, per bus type (Parallel, LPC, FWH, SPI). There\nwas no programmer in the tree that really made use of it, though:\n* The chipset drivers usually focus on a single bus type. And even if\n  they advertise the whole default set (PAR, LPC, FWH), they only pro-\n  vide a maximum decode size for one of them. The latter is probably\n  wrong, should really more than one bus type be supported.\n* PCI and external programmers all support only a single bus type, with\n  the exception of `serprog` which doesn\u0027t set a maximum decode size.\n\nWhat made the distinction even less useful is that for some chips that\nsupport multiple bus types, i.e. LPC+FWH, we can\u0027t even detect which\ntype it is. The existing code around this also only tried to provide\nthe best possible warning message at the expense of breaking the pro-\ngrammer abstraction.\n\nHence, unify the set of sizes into a single `max_rom_decode` property.\nWe store it inside the `registered_master` struct right away, to avoid\nany more use of globals.\n\nChange-Id: I2aaea18d5b4255eb843a625b016ee74bb145ed85\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72531\n"
    },
    {
      "commit": "929d2e1b17a448d3352dbecb6a620ee0c1e65a58",
      "tree": "dcbad4698ce5741a1080fc7ba89d4bd5c5804417",
      "parents": [
        "7c717c36c533f56ddc7fbac2ff944870fa0249f8"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 12 00:47:05 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "internal: Pass programmer context down into chipset enables\n\nChipset enables potentially need access to programmer data, e.g.\nto process parameters, register masters etc.\n\nChange-Id: Iad211ff97e92d1973f981156bfa3154d1ba71d45\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72528\n"
    },
    {
      "commit": "7c717c36c533f56ddc7fbac2ff944870fa0249f8",
      "tree": "b91afaf1498cde1de33e7222632ec05999bf0b73",
      "parents": [
        "e3a26888e14d16592c2c79d1516828d3d32961a4"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 12 00:28:15 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "internal: Pass programmer context down into board enables\n\nBoard enables potentially need access to programmer data, e.g. to\nprocess parameters, register masters etc.\n\nChange-Id: I1531a6e1be9866adc5dce74c6f62bbbeae1bd274\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72527\n"
    },
    {
      "commit": "e3a26888e14d16592c2c79d1516828d3d32961a4",
      "tree": "02d401e60defd27fe7bee194978bac782284cb39",
      "parents": [
        "2b66ad9c4465432e6f2aff2e95f1e7a556bfc3f0"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Wed Jan 11 21:45:51 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "Pass programmer context to programmer-\u003einit()\n\nChange-Id: I064eb4e25c3d382e4e5bde802306698fafe5e1d0\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72526\n"
    },
    {
      "commit": "2b66ad9c4465432e6f2aff2e95f1e7a556bfc3f0",
      "tree": "187edbfe8e16593df21b2c4cb9c392e1011fd339",
      "parents": [
        "4517e9242e8d871db5159ff8afd215f015832c7d"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Wed Jan 11 20:15:15 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "Start implementing struct flashprog_programmer\n\nOur libflashprog API was already prepared for a programmer level context\nstored in an opaque `struct flashprog_programmer`. We start filling this\nstruct with a pointer to the programmer driver (entry in the programmer\ntable) and a mutable copy of the parameter string.\n\nChange-Id: If9a795627b1e50ea6006569e723f400ff337be20\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72525\n"
    },
    {
      "commit": "b197402042a065554234700b69057e9b6eedc39a",
      "tree": "62e4b15dff887d157ad18dd09b3d47dd2d7f8c1a",
      "parents": [
        "0e76d99a7c0eda11515923c5457f0b5a4af9893f"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 12 13:13:12 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "memory_bus: Split register mapping into own function\n\nNow that we have a hook for the memory mapping, we don\u0027t need\nFEATURE_REGISTERMAP anymore and can clean up around it.\n\nChange-Id: If11ece9ce81ddf214b75764007a1006d271dc8af\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72523\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "0e76d99a7c0eda11515923c5457f0b5a4af9893f",
      "tree": "c914d5266909dad441bece2705593131f032c19c",
      "parents": [
        "9eec40780207a110f3ba7ea70d11c042c6d86abf"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 12 20:22:55 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "memory_bus: Move (un)map_flash_region into par master\n\nNow that the map/unmap_flash functions are only called from memory-\nmapped chip drivers, we can safely move the hooks into the parallel\nmasters.\n\nThis also allows us to move the code away from the globals in\n`flashprog.c` into a new `memory_bus.c`.\n\nChange-Id: Ic476cf4d96200232900537b997e1d07bb4e8b809\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72522\nReviewed-by: Riku Viitanen \u003criku.viitanen@protonmail.com\u003e\n"
    },
    {
      "commit": "9eec40780207a110f3ba7ea70d11c042c6d86abf",
      "tree": "f48e0860e967bd720901e9cf12faaa82363bf2c8",
      "parents": [
        "56b53dd4c892c6f400f6b05797eb6ed4b96179db"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 12 01:17:30 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "Perform default mapping only for respective chips\n\nThe default memory mapping for the whole flash chip only makes sense\nfor chips that are directly connected to a bus serving memory cycles,\ni.e. parallel, LPC and FWH chips. Use the new `.prepare_access` and\n`.finish_access` hooks to map/unmap respective chips.\n\nGoing through the chip driver for this allows us to free the core\nflashprog code from this peculiarity.\n\nChange-Id: I54d1554b44b7e21fc18ef066103a9a26a2783b36\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72521\n"
    },
    {
      "commit": "46449b4d17c549a68d0b8ce287f20e4b46f13333",
      "tree": "14b936a26e05bd97eb60223dd1f9c1bec94b4899",
      "parents": [
        "ab6b18f0e0d4f4b2b8348306576b701b63372bd2"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 12 23:58:19 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "spi25: Drop stale `bus \u003d\u003d SPI` guards\n\nThese guards were necessary workarounds because we used to call\nthe functions from core flashprog code. Now that the related code\nis contained in the chip driver, we can drop them.\n\nChange-Id: Ib06044a716e2d1c295d902877d0342deb2d78908\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72518\n"
    },
    {
      "commit": "ab6b18f0e0d4f4b2b8348306576b701b63372bd2",
      "tree": "f9adeb7ab53e6fed6d940f852979b5da86dd7de1",
      "parents": [
        "901fb957742edef9307948c397bdd28c8b5ebfac"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Wed Jan 11 23:38:20 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "spi25: Move 4BA preparations into spi_prepare_4ba() hook\n\nThese preparations are specific to 4BA SPI chips and don\u0027t have to\nclutter `flashprog.c`.\n\nChange-Id: I842244c57e575f93b9c505e16f1f20c7afd23733\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72517\n"
    },
    {
      "commit": "901fb957742edef9307948c397bdd28c8b5ebfac",
      "tree": "c69fc13d64764e08ce22df9a08772cb4eb9cde20",
      "parents": [
        "a96aaa3c716e13c62e1a7d93b5e6580e817cd2f5"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Wed Jan 11 23:24:23 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "Add prepare/finish_access() hooks for chip drivers\n\nSome of the arrangements we perform in prepare_flash_access()\nare actually specific to the flash chip. Allow to clean that\nup by adding respective hooks into `struct flashchip`.\n\nChange-Id: Iff79ba3d190dba04ecf58c5c53faa428bf592bdf\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72516\n"
    },
    {
      "commit": "1338936efbd5301880063461b74eaf883db6e363",
      "tree": "ec0fd82dbaafd435bd3784d13378b1c4334f9e93",
      "parents": [
        "8d36db619b5bca0d5a1ddf05c26926b460605e31"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Tue Mar 05 18:35:30 2024 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Mar 08 18:09:43 2024 +0000"
      },
      "message": "Consider 4BA support when filtering erase functions\n\nWhen we decide which erase functions to use, we need to know exactly\nwhich functions are supported by the used programmer. We missed that\nsome programmers can\u0027t send 4-byte adddresses.  As we already have a\nfeature flag for this, check it right away for all 4BA erase opcodes.\n\nThis affects mostly rare combinations of external programmers with\nmodern 4BA flash chips. For instance early versions of the Dediprog\nSF100.\n\nTests confirmed that this fixes the combination of a first protocol\ngeneration SF100 with a Winbond W25Q256JV.\n\nChange-Id: I51da2832a6a703058da57cdc0335b214653453ed\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/99\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "5455786bfb4b09af11f4354a6bb4842d37d78419",
      "tree": "4444295adb9d0e6f9e13e08a16bc5c88a0b14352",
      "parents": [
        "c3b02dce51aad2766512d1939a1b7447c2d526b8"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Mon May 15 12:01:04 2023 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 08 19:56:50 2023 +0000"
      },
      "message": "spi95: Avoid automatic probing\n\nIt turned out that the read ID command for the ST/M95 family (0x83)\nis a write command for AT45DB chips. We\u0027ll tag respective chips as\nusing a SPI95 command set, like we did for EDI, to avoid automatic\nprobing.\n\nChange-Id: Ibdf364424ac9cd8a734507a05fe769f008f8178e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/75218\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "c3b02dce51aad2766512d1939a1b7447c2d526b8",
      "tree": "58069f464bb8a777ef06e93767813a4c5a042cb0",
      "parents": [
        "a02df33fbf1c196395a61049e60895d4ae0e0a5b"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Aug 12 01:13:45 2023 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Mon Sep 18 19:24:39 2023 +0000"
      },
      "message": "Rebrand to flashprog and update URLs\n\nMostly automated `sed` work. As of now, URLs to the old wiki are broken\neither way, so changing them shouldn\u0027t hurt. Other URLs (e.g. to mailing\nlist archives) were hopefully filtered correctly.\n\nChange-Id: I9d43bfd0e675eff2fcbad05f304b9ce9f5006b08\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashrom-stable/+/21\n"
    },
    {
      "commit": "3ac761c3c47a6476b8b0f9ce613b32914b163c46",
      "tree": "146db2e06439bf76f4c66fd48facb10ec3c0bf79",
      "parents": [
        "b77607f048e5cdfbf8fb1e9ad3b110c9a67e80e0"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Mon Jan 16 02:43:17 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Apr 04 10:12:02 2023 +0000"
      },
      "message": "layout: Verify that regions to be written are granularity aligned\n\nThis will be important with the new erase/write strategy when we don\u0027t\nwrite per erase block anymore.\n\nChange-Id: Ie3c74ff4313c9d72ac92d3226804e0407088c17d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72546\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "2f75379fa20f5415c70b837001473ff8ba070ab7",
      "tree": "0f549c33c16f70f1c619926d91ce217e95eccd6a",
      "parents": [
        "b1d4b1d6b8a7876496af6b8af422d1c8058d5f4e"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Mar 28 00:46:50 2023 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Apr 04 09:59:35 2023 +0000"
      },
      "message": "internal: Don\u0027t try linux_mtd on x86\n\nWe assume that the first MTD device found represents the \"internal\"\nfirmware flash. This is true on many architectures, and assumed to\nbe working. On x86, however, there is traditionally no MTD device.\nOne exception is the `spi-intel` driver, but this one is tagged\n\"DANGEROUS\" and often makes trouble if a Linux distribution enabled\nit nevertheless.\n\nSo, let\u0027s disable the internal/MTD automatism on x86. Flashrom has\nbetter drivers, and if somebody runs into a situation where the MTD\ndriver would work but the internal one doesn\u0027t, they can still use\n`linux_mtd` explicitly.\n\nChange-Id: I813980786a09fe64f541906e1963b0abd8b93cb5\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73987\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Matt DeVillier \u003cmatt.devillier@gmail.com\u003e\n"
    },
    {
      "commit": "b078ec67e6fbfe21bf1b3700c3351bc30c1b4626",
      "tree": "1a64c7842a131c05b6df1b514d28dd4408d91af1",
      "parents": [
        "272b07327250e88385fd34ba10c7ece342153d06"
      ],
      "author": {
        "name": "Peter Stuge",
        "email": "peter@stuge.se",
        "time": "Sun Dec 11 04:02:10 2022 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Mon Mar 06 23:36:26 2023 +0000"
      },
      "message": "serial: Call set_custom_baudrate() thrice\n\nCall the function before tcsetattr() settings are known, then again\nwith settings prepared but not yet applied and finally a third time\nafter tcsetattr().\n\nDarwin support needs this change; there custom_baud code must be\ncalled to modify the settings passed to tcsetattr() and then again\nafter tcsetattr() returns.\n\nThe change should be non-functional on all currently supported systems;\ncurrent code calls set_custom_baudrate() before any tcsetattr()\nsettings are prepared, so we have three stages in total.\n\nThis change originates from discussion of the macOS patch proposed by\nDenis Ahrens in https://review.coreboot.org/c/flashrom/+/67822\n\nChange-Id: I40cc443cfb7bf6b212b31826d437b898cc13c427\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70569\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73479\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "618994707d5ba556704ad9555191379cf46df6ae",
      "tree": "ad771fb01ca88cbf4ed3e93da0576f4a831a3929",
      "parents": [
        "28790a23f71d942f7ec9aa03c5ec90fb90503d0f"
      ],
      "author": {
        "name": "Steve Markgraf",
        "email": "steve@steve-m.de",
        "time": "Mon Jan 09 23:06:52 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 04 12:33:03 2023 +0000"
      },
      "message": "programmer: Add bitbanging programmer driver for Linux libgpiod\n\nWith this driver, any single board computer, old smartphone, etc. with\na few spare GPIOs can be used for flashrom.\n\nTested by reading of a 2048 kB flash chip on a Qualcomm MSM8916 SoC\n@800 MHz, ran the following command:\n\ntime flashrom -p linux_gpiod:gpiochip\u003d0,cs\u003d18,sck\u003d19,mosi\u003d13,miso\u003d56 -r test.bin\n\nThis command uses /dev/gpiochip0 with the specified GPIO numbers for the\nSPI lines. All arguments are mandatory.\n\nOutput:\n[...]\nFound GigaDevice flash chip \"GD25LQ16\" (2048 kB, SPI) on linux_gpiod.\n[...]\nreal    1m 33.96s\n\nChange-Id: Icad3eb7764f28feaea51bda3a7893da724c86d06\nSigned-off-by: Steve Markgraf \u003csteve@steve-m.de\u003e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73290\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "0e78818c2c818aa860a976524cfdf552792cfeba",
      "tree": "0bd2c0ba9086639ba4c49259bfef7777ce95a82a",
      "parents": [
        "a447c12ecf71954f40a2b07817b3933b7bd3e495"
      ],
      "author": {
        "name": "Anastasia Klimchuk",
        "email": "aklm@chromium.org",
        "time": "Wed May 26 09:54:08 2021 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 04 12:33:03 2023 +0000"
      },
      "message": "bitbang: Extend bitbang_spi_master functions to accept spi data\n\nThis way every bitbang spi master has access to its own spi data,\nand can use this data in all its functions.\n\nThis patch only changes the signatures of functions.\n\nflashrom-stable: Adapted new function signatures in `nicintel_spi`.\n\nChange-Id: Id5722a43ce20feeed62630ad80e14df7744f9c02\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54991\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73268\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "a447c12ecf71954f40a2b07817b3933b7bd3e495",
      "tree": "073037c43b3dc9b5f6c0204cc5ea8ef0161b7271",
      "parents": [
        "cbc5ba049f7d6ce4744eae836221b0fb35a9ac69"
      ],
      "author": {
        "name": "Anastasia Klimchuk",
        "email": "aklm@chromium.org",
        "time": "Mon May 31 11:20:01 2021 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 04 12:33:03 2023 +0000"
      },
      "message": "bitbang: Extend register_spi_bitbang_master() API with spi data\n\nThis allows the users of register_spi_bitbang_master() API to pass\ntheir spi data into the API, and then the data can go further, into\nregister_spi_master() API.\n\nflashrom-stable: Removed unnecessary if.\n\nChange-Id: I13e83ae74dbc3a3e79c84d1463683d360ff47bc0\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54990\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73267\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "4d51e07242459f86d00eaf522786695e46ec2511",
      "tree": "a513666f34cc601d6a9e9bf4f506383dbf69bcb2",
      "parents": [
        "e3c305dfd234503faa23c5491962db8f52d0134c"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 17:56:29 2023 +0000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Feb 28 23:42:48 2023 +0000"
      },
      "message": "amd_imc/sb600spi: Move handle_imc() into amd_imc.c\n\nMove handle_imc() to make it easier to share it with other drivers.\n\nChange-Id: I72dff5feda199e1d258c067e230abdf33c451249\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72575\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "e3c305dfd234503faa23c5491962db8f52d0134c",
      "tree": "b86a019224a05586e18b98eae8ff0c9b51a1c701",
      "parents": [
        "070587892b4af723bf8f1f423d0b26e12e061084"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 21:45:56 2023 +0000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Feb 28 23:42:48 2023 +0000"
      },
      "message": "amd_spi100: Implement memory-mapped reads\n\nQuery the RomRange2 register for the memory range (usually top below 4G)\nand try to map that. Reads outside this range will still be served via\nthe command engine.\n\nChange-Id: I21aa67d550ccda0f55a9cf3ff14545a881624d11\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72583\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "d81637c3d7c2bf25f1709b6f28a423e074d906f3",
      "tree": "d1a34eaafa5030d10b787d51c84421cb02fa1943",
      "parents": [
        "735b186eeffb997a957075d7e610b9700b53cbe1"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 19:45:44 2023 +0000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Feb 28 23:42:48 2023 +0000"
      },
      "message": "physmap: Implement source-aligned version of mmio_readn()\n\nImplement readn() with explicit alignment of the source pointer.\n\nChange-Id: Ic754c552c826ec06ea209a039c3035265ca61c9a\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72581\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "735b186eeffb997a957075d7e610b9700b53cbe1",
      "tree": "1e27f0dc7f2cae492459530df208859221a1d3ca",
      "parents": [
        "197b7c7b03bc2bbfa6a706812fa69897a3eb7cdb"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 18:28:45 2023 +0000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Feb 28 23:42:48 2023 +0000"
      },
      "message": "amd_spi100: Add new driver for AMD SPI100 controllers\n\nStart with a very simple PIO driver. Reads are slow this way, but\nwe can optimize that later. A factor of 2 is possible simply by\naligning the FIFO reads, and another factor of 3 (at least) with\nmemory-mapped reads.\n\nWe override the SPI speed but choose a conservative value to be\non the safe side. Flashrom only supports normal read commands,\nhence we won\u0027t go over 33MHz. Also, if the firmware set a lower\nspeed for normal reads, we use that. We can\u0027t use dual/quad I/O\nwith the SPI command engine, and tests have shown that increasing\nthe SPI speed lifts the read speed only marginally. It seems to\nbe limited by the FIFO reads.\n\nChange-Id: I403d5f103b3ae72f3a91829d562984c54c2e2d00\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72577\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "197b7c7b03bc2bbfa6a706812fa69897a3eb7cdb",
      "tree": "bf6b57efe06c818f4dbec5d54466930930fa52c0",
      "parents": [
        "dafd51e22b30b7e13e79567c065e55d30c788fa2"
      ],
      "author": {
        "name": "Nicholas Chin",
        "email": "nic.c3.14@gmail.com",
        "time": "Sun Oct 23 13:10:31 2022 -0600"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Feb 25 00:42:12 2023 +0000"
      },
      "message": "ch347_spi: Add initial support for the WCH CH347\n\nAdd support for the WCH CH347, a high-speed USB to bus converter\nsupporting multiple protocols interfaces including SPI. Currently only\nmode 1 (vendor defined communication interface) is supported, mode 2\n(USB HID communication interface) support will be added later. The code\nis currently hard coded to use CS1 and a SPI clock of 15 MHz, though\nthere are 2 CS lines and 6 other GPIO lines available, as well as a\nconfigurable clock divisor for up to 60MHz operation. Support for these\nwill be exposed through programmer parameters in later commits.\n\nThis currently uses the synchronous libusb API. Performance seems to be\nalright so far, if it becomes an issue I may switch to the asynchronous\nAPI.\n\nTested with a MX25L1606E flash chip\n\nSigned-off-by: Nicholas Chin \u003cnic.c3.14@gmail.com\u003e\nChange-Id: I31b86c41076cc45d4a416a73fa1131350fb745ba\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73106\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "019810f3fd083df5f6f61d19dda2d252709d02fe",
      "tree": "d9f2f1e6f8e10b6bb1d4b7f56f431f9073942fbc",
      "parents": [
        "6d98aece44f6f3458c79160adf4dddc7f8500378"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 17:11:24 2023 +0000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Feb 21 22:52:42 2023 +0000"
      },
      "message": "chipset_enable: Optionally check PCI revision field\n\nWe used to match compatible chipset devices by vendor and device ID\nonly. On some chipsets, e.g. AMD southbridges / SoCs, this is not\nenough, though, as the device IDs are rarely updated.\n\nIn the case of AMD chipsets, we can identify the chipset with the\nrevision ID of the SMBus device. So we add that field to the chipset\nenable list.\n\nChange-Id: I4021cf8e83c605fde4360c274b39481b1e0ff070\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72573\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "e7a41e3cec25165b6564b62b6aa64f90bd2dab71",
      "tree": "a635e566992d379fa1acca5de7fd7517e5c13580",
      "parents": [
        "b0be3200954bebf2431c4d7bd441096f157f621e"
      ],
      "author": {
        "name": "Nikolai Artemiev",
        "email": "nartemiev@google.com",
        "time": "Mon Nov 28 17:40:56 2022 +1100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Feb 19 13:50:18 2023 +0000"
      },
      "message": "tree/: Make probe_opcode() flashctx argument const\n\nProbing an opcode generally shouldn\u0027t involve mutating the flashctx\nstate and currently no probe_opcode functions do that.\n\nMake the flashctx arg const so that call sites don\u0027t need to have a\nnon-const pointer.\n\nTested: ninja test\n\nChange-Id: I19e98be50d682de2d2715417f8b7b8c62b871617\nSigned-off-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70030\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72543\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "b0be3200954bebf2431c4d7bd441096f157f621e",
      "tree": "f77f849073a8e0a8d0f6105c55ef06b969d3c982",
      "parents": [
        "3561451faed250ced4a55e15d1abe5e3d94abfc4"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.com",
        "time": "Tue Sep 20 00:07:23 2022 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Feb 19 13:50:18 2023 +0000"
      },
      "message": "spi.c: Add AT45 erasefn opcode mapping\n\nflashrom-stable: Dropped spurious/wrong function description.\n\nChange-Id: I798a91f1e20b63662715c68e6d43d03fc6005d51\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67717\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72542\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "3561451faed250ced4a55e15d1abe5e3d94abfc4",
      "tree": "dd5c68bd13dee2adfb609540c64bac463848b941",
      "parents": [
        "e2ff4e90125680a48623a2a908bff38d5b91e44e"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.com",
        "time": "Mon Sep 19 23:46:58 2022 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Feb 19 13:50:18 2023 +0000"
      },
      "message": "spi25.c: Rename spi_get_erasefn_from_opcode to spi25_get_erasefn_from_opcode\n\nThis function works only with spi25 chips\n\nChange-Id: Ie054160b0fdd34bcb128285c6a047e3a3fa8be0c\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67716\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72541\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "0cea753aff33b78051febadf8786df83144b5ee7",
      "tree": "8972ea6cf44e249659ddad7ea3d9aa2dedffc0b6",
      "parents": [
        "ab9f25893f1fa87cbbaf656869e346391eccdb31"
      ],
      "author": {
        "name": "Aarya Chaumal",
        "email": "aarya.chaumal@gmail.com",
        "time": "Mon Jul 04 18:21:50 2022 +0530"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Feb 19 13:50:18 2023 +0000"
      },
      "message": "spi: Add function to probe erase command opcode for all spi_master\n\nAdd a field, probe_opcode, to struct spi_master which points to a\nfunction returning a bool by checking if a given command is supported by\nthe programmer in use. This is used for getting a whitelist of commands\nsupported by the programmer, as some programmers like ichspi don\u0027t\nsupport all opcodes.\n\nMost programmers use the default function, which just returns true.\nICHSPI and dummyflasher use their specialized function.\n\nflashrom-stable: Added `.probe_opcode` for `dirtyjtag_spi`, `ich7`.\n\nChange-Id: I6852ef92788221f471a859c879f8aff42558d36d\nSigned-off-by: Aarya Chaumal \u003caarya.chaumal@gmail.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/65183\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72539\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "ab9f25893f1fa87cbbaf656869e346391eccdb31",
      "tree": "f21fc6e6e4541cd6905a17bcf3ace937a6e9b5ac",
      "parents": [
        "b725c0cd0e1c3fb56807c197b965620ac37b996b"
      ],
      "author": {
        "name": "Aarya Chaumal",
        "email": "aarya.chaumal@gmail.com",
        "time": "Thu Jun 23 16:21:23 2022 +0530"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Feb 19 13:50:18 2023 +0000"
      },
      "message": "spi25.c: Add function to return opcode of passed erase fucntion pointer\n\nThere is a function, spi_get_erasefn_from_opcode, which returns the\nerase function for given opcode. Add a function which does the opposite\ni.e. returns the opcode for given erase function.\n\nChange-Id: Ia3aefc9b9465efdd16b1678bb2ada9a23f00d316\nSigned-off-by: Aarya Chaumal \u003caarya.chaumal@gmail.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/65355\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72538\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "aba3658513da245a61ba59cfab9dba5facdb1054",
      "tree": "5924d8009154e6b59aa2e10a2f66a263fcf2d358",
      "parents": [
        "00ea3898669aa35bb3f208c1d17f34e3a5c50795"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Mon Sep 05 11:09:28 2022 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "flashrom.c: Move count_max_decode_exceeding() to cli\n\nThe count_max_decode_exceeding() function is only ever called\nwithin the cli_classic logic so move it there and make it\nstatic. This further cleans up the flashrom.c symbol namespace.\n\nChange-Id: If050eab7db8560676c03d5005a2b391313a0d642\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/68438\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72362\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "b8db74a9b2bc91bb43942f7487c151bd598483b1",
      "tree": "8e2fdcf8c3bb95124ae1870bd7830fab6f415ee1",
      "parents": [
        "f2a1e073434485d54172e95fc88845a2bd917636"
      ],
      "author": {
        "name": "Felix Singer",
        "email": "felixsinger@posteo.net",
        "time": "Fri Aug 19 00:19:26 2022 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "internal.c: Retype appropriate variables with bool\n\nUse the bool type instead of an integer for the variables\n`force_laptop`, `not_a_laptop`, `force_boardenable` and\n`force_boardmismatch` since this represents their purpose much better.\n\nSigned-off-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nChange-Id: I159d789112d7a778744b59b45133df3928b8445e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66870\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72353\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "3b64d8107b56dc437cde606e17abaae435d7ba35",
      "tree": "3971e382111e87d2dc6d00e38e4198d78ec46eb7",
      "parents": [
        "23b2b864777a09b4d9a9024675670a7d694c1e06"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Fri Aug 12 13:07:51 2022 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "flashrom.c: Move print logic to print.c\n\nThis free\u0027s up flashrom.c from namespace pollution.\n\nChange-Id: I2724f7910fa3e01bcf49b8093260a4f1643df777\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66652\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72351\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "63f6a37984cf361229b433343ea9146c57a87f18",
      "tree": "0ebdaca6bbf8168b6bbb93da3b3be9dcc0336fe3",
      "parents": [
        "ee3fbd7c7c05efbdea2ded8484bcfe96238f0124"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Fri Aug 12 12:56:43 2022 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "parallel.c: Consoldiate parallel master registration logic\n\nThis is analogous to spi.c and opaque.c however parallel\nlogic was previously never consoldiated.\n\nThis free\u0027s up flashrom.c from namespace pollution.\n\nTested: builds with both make and meson.\n\nChange-Id: Ie08e2e6c51ccef5281386bf7e3df439b91573974\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66651\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72349\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "dd9d0c58d601a003ebc1918c53edc16aab607080",
      "tree": "2daac025bb07ce348b414cb9c6e7957419ca3102",
      "parents": [
        "4bd966c8099b64ebb665b6f40786bb21d59a9363"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Sat Jun 04 20:23:57 2022 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "tree: Consolidate BIT() macro\n\nChange-Id: I7e61f7671b70ca5ed751d99405714436bcd18d5a\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/64962\nOriginal-Reviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nOriginal-Reviewed-by: Elyes Haouas \u003cehaouas@noos.fr\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72338\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "2d17041c5e170b42785e99d2aaedb98abb9bf040",
      "tree": "b60bbb992860f4c8d5bca7ff2c67ebcba2f26647",
      "parents": [
        "f6a273b353355fd3817a00135019fd71e3543683"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Mon Nov 15 15:47:15 2021 +1100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "flashrom: Drop read_flash_to_file() usage\n\nAspire towards a goal of making cli_classic more of just\na user of libflashrom than having quasi-parallel paths in\nflashrom.c\n\nThis converts remaining read_flash_to_file() usage to the\ndo_read() provider wrapper around libflashrom.\n\nTested: `\nsudo ./flashrom -p ft2232_spi:type\u003d232H,divisor\u003d1000 -f -r out -c W25X05\nFlashrom output:\n\nNo EEPROM/flash device found.\nForce read (-f -r -c) requested, pretending the chip is there:\nAssuming Winbond flash chip \"W25X05\" (64 kB, SPI) on ft2232_spi.\nPlease note that forced reads most likely contain garbage.\nBlock protection could not be disabled!\nReading flash... done.\nData read:\n\nxxd out-1khz\n00000000: 0000 07ff ffff e000 0000 7fff fffe 0000  ................\n00000010: 0007 ffff ffe0 0000 007f ffff fe00 0000  ................\n00000020: 07ff ffff e000 0000 7fff fffe 0000 0007  ................\n00000030: ffff ffe0 0000 007f ffff fe00 0000 0fff  ................\nxxd out-100khz\n00000000: b6db 6db6 db6d b6db 6db6 db6d b6db 6db6  ..m..m..m..m..m.\n00000010: db6d b6db 6db6 db6d b6db 6db6 db6d b6db  .m..m..m..m..m..\n00000020: 6db6 db6d b6db 6db6 db24 9249 2492 4924  m..m..m..$.I$.I$\n00000030: 9249 2492 4924 9249 2492 4924 9249 2492  .I$.I$.I$.I$.I$.\n`\n\nChange-Id: I4b690b688acf9d5deb46e8642a252a2132ea8c73\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Tested-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/59291\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72336\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "d2174c5a1b5412ae9080b08050a3049b8bba92ce",
      "tree": "010e2f29498f8e4ed18aa236e18a27b5a39779ac",
      "parents": [
        "758dc86db46fae9caf83ba3170ba8743d04770fa"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.com",
        "time": "Thu Apr 21 13:29:33 2022 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "platform/swap: move swap inline functions \u0026 macros into an own header\n\nThese inline functions and macros are only used in\nplatform/endian_(big|little).c and do not need to be compiled into every\nobject which includes `platform.h`.\n\nChange-Id: Ib2326e6a4eb5e000a0eace857d040372e2e9e561\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/63825\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72328\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "58015c25eb05fa77966d1c53261a83b56a3cf6b3",
      "tree": "a1df11881a074c8c66de756f846be9030ce0443a",
      "parents": [
        "e276765eca031c6900d37b22b89e686283f39c91"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.com",
        "time": "Thu Apr 14 13:50:55 2022 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "Introduce an `include` directory for header files\n\nMove all header files to the new `include` directory.\nAdapt include directives and build systems to the new directory.\n\nChange-Id: Iaddd6bbfa0624b166d422f665877f096983bf4cf\nSigned-off-by: Felix Singer \u003cfelix.singer@secunet.com\u003e\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/58622\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72322\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\n"
    }
  ]
}