Gitiles
Code Review Sign In
review.sourcearcade.org / flashprog / 618d8972019e12e6c7eadd5a330774900e1c2f0f / chipset_enable.c
  1. 2a9e245 Use the maximum decode size infrastructure by Carl-Daniel Hailfinger · 15 years ago
  2. 66ef4e5 Internal (onboard) programming was the only feature which could not be disabled by Carl-Daniel Hailfinger · 15 years ago
  3. 9892ca6 Chipset: remove sis630 chipset enable for sis540 by Luc Verhaegen · 15 years ago
  4. a661e15 Intel PIIX* chipsets only support parallel flash (no LPC/FWH/SPI) by Maciej Pijanka · 15 years ago
  5. 797a834 Add support for Intel 3400 series / 5 series chipset by Carl-Daniel Hailfinger · 15 years ago
  6. 6a0269e Mark Elitegroup K7S5A as supported by Carl-Daniel Hailfinger · 15 years ago
  7. 9f46cfc Add support for every single SiS chipset out there by Carl-Daniel Hailfinger · 15 years ago
  8. 115d390 Add infrastructure to check the maximum supported flash size of chipsets and mainboards by Carl-Daniel Hailfinger · 15 years ago
  9. aad7e67 Mark NVIDIA Nforce4/MCP04 as tested by Luc Verhaegen · 15 years ago
  10. cd00e88 Chipset support for the nVidia nForce 4 by Luc Verhaegen · 15 years ago
  11. 3e0774d Add chipset support for VIA VT82C596 by adding a PCI ID by Uwe Hermann · 15 years ago
  12. e715c7b Enable flashrom on Wyse Winterm S50 by Nils Jacobs · 15 years ago
  13. 174962d Use correct name for SB700/SB710/SB750 instead of calling them SB700 by Carl-Daniel Hailfinger · 15 years ago
  14. 95baaad Add support for ICH9 engineering sample by Carl-Daniel Hailfinger · 15 years ago
  15. 4449868 Allow the user to override FWH IDSEL on ICH6 and later by Carl-Daniel Hailfinger · 15 years ago
  16. 8fa6481 Fix up MSR handling to support more OSes than Linux. by Stefan Reinauer · 15 years ago
  17. 630c79d Make debug messages printf_debug(). by Stefan Reinauer · 15 years ago
  18. 4c7ea38 Add ICH6,ICH7,ICH8,ICH9,ICH10 FWH IDSEL settings and flash decode settings to the debug output by Carl-Daniel Hailfinger · 15 years ago
  19. be72681 Remove unnecessary #include files by Carl-Daniel Hailfinger · 15 years ago
  20. f8555e2 This is a workaround for a bug in SB600 and SB700 by Carl-Daniel Hailfinger · 15 years ago
  21. 1432a60 Random minor flashrom fixes by Uwe Hermann · 15 years ago
  22. 9899cad Print the bus type(s) of both chipset and chip in the flashrom output by Uwe Hermann · 15 years ago
  23. e6abef0 Chipset enable for VIA VT8233 by Mateusz Murawski · 15 years ago
  24. ba290d1 Move all printing code to print.c by Uwe Hermann · 15 years ago
  25. 4e58790 List the size (in KB) and type of supported flash chips in 'flashrom -L' by Uwe Hermann · 15 years ago
  26. 8dfea83 The VIA VX800 chipset works with the VT8237S code after adding an entry for the VX800 PCI ID by Arjan Koers · 15 years ago
  27. e9d04d4 Mark 3COM "3C905B: Cyclone 10/100/BNC" as fully tested by Uwe Hermann · 15 years ago
  28. b22918c Only probe for chips with compatible bus protocols by Carl-Daniel Hailfinger · 15 years ago
  29. 1dfe0ff Add bus type annotation to struct flashchips by Carl-Daniel Hailfinger · 15 years ago
  30. 90e8e61 Add NForce2 chipset enable by Luc Verhaegen · 15 years ago
  31. e8ba538 A bunch of output beautifications and improvements, as well as doc fixes by Uwe Hermann · 15 years ago
  32. 78185dc Use accessor functions for MMIO by Carl-Daniel Hailfinger · 16 years ago
  33. 05fab75 List all boards which are by Uwe Hermann · 16 years ago
  34. 2cac686 Drop unused/duplicated #includes and some dead code by Uwe Hermann · 16 years ago
  35. 9862251 Uwe tested the recent SB600 SPI commit and notified me of one unexpected problem by Carl-Daniel Hailfinger · 16 years ago
  36. dbfa029 Create a SB600 SPI detection heuristic by Carl-Daniel Hailfinger · 16 years ago
  37. 4179d29 Make chipset list alphabetically ordered as the other lists by Uwe Hermann · 16 years ago
  38. b003991 Store and display chipset test status (not only chip status) by Uwe Hermann · 16 years ago
  39. 19997ae Clarify error message in enable_flash_sb600() a little by Peter Stuge · 16 years ago
  40. 9bb88ac Revert r466 because of inverted logic by Carl-Daniel Hailfinger · 16 years ago
  41. a66ceba Cleanup redundant condition and clarify message a little by Peter Stuge · 16 years ago
  42. 7725fa8 Touch up some error messages in enable_flash_cs5536() by Peter Stuge · 16 years ago
  43. f6e3efb Clean up the SB400 chipset enable code by Carl-Daniel Hailfinger · 16 years ago
  44. 41d6bd9 Rewrite the SB600 chipset enable function by Carl-Daniel Hailfinger · 16 years ago
  45. b452a91 Here is a fix for chipset_enable.c when there is not /dev/cpu by Bertrand Jacquin · 16 years ago
  46. 284a600 Force enabling SPI mode for SB600 is a bad idea and leads to hangs by Zheng Bao · 16 years ago
  47. 7b2969b Some coding style and consistency fixes by Uwe Hermann · 16 years ago
  48. 0c2029f Following patch fixes VIA SPI (VT8237S) by Rudolf Marek · 16 years ago
  49. 20ed5d1 Add VT8237A PCI ID by Peter Stuge · 16 years ago
  50. 0593f21 Abstract mmap() in physmap.c and only open /dev/mem on the first physmap() call by Stefan Reinauer · 16 years ago
  51. ccf8c6c Check all mmap() calls and print helpful Linux error message by Peter Stuge · 16 years ago
  52. 37179b8 Fix ICH9 locking register address and add important debug output by FENG yu ning · 16 years ago
  53. b5d677b Add AMD-768 chipset support by Sven Schnelle · 16 years ago
  54. ed2352b Add i631x LPC support by Sven Schnelle · 16 years ago
  55. e8a3e4c Initialize ICH SPI opcodes also for ICH9 and later by Peter Stuge · 16 years ago
  56. f041e9b Various ichspi.c refinements by FENG yu ning · 16 years ago
  57. c05a295 Generates OPCODES struct from the ICH7/ICH9/VIA chipset if its SPI configuration is locked down by FENG yu ning · 16 years ago
  58. f63c0dc Add AMD SB700 flash enable by Niels Ole Salscheider · 16 years ago
  59. 9a6d176 Replace #ifdefs for sc520 systems by run time probing by Stefan Reinauer · 16 years ago
  60. a3f04be Add support for the AMD/ATI SB600 southbridge SPI functionality by Jason Wang · 16 years ago
  61. d3b0e39 Dump ICH8/ICH9/ICH10 SPI registers by Carl-Daniel Hailfinger · 16 years ago
  62. b759db2 Enable SPI boot flash support on EP80579, which has the ICH7 register set by Ed Swierk · 16 years ago
  63. c556d32 Add support for the Intel 82371MX (MPIIX) southbridge by Uwe Hermann · 16 years ago
  64. 8720345 Add support for the Intel 82371FB PIIX and 82371SB (PIIX3) southbridges by Uwe Hermann · 16 years ago
  65. 190f849 Add support for the VIA VT82C586A/B chipset, improve documentation by Uwe Hermann · 16 years ago
  66. 394131e Coding-style fixes for flashrom, partly indent-aided by Uwe Hermann · 16 years ago
  67. a88daa7 Allow the SiS 620 chipset to detect and read at least 256kb chips by Urja Rannikko · 16 years ago
  68. 3af487d SB600 has four write once LPC ROM protect areas by Marc Jones · 16 years ago
  69. 28ec74b Add ICH10 support by Carl-Daniel Hailfinger · 16 years ago
  70. cd2ed47 Recognize the Intel EP80579 LPC flash interface by Ed Swierk · 16 years ago
  71. 7f27464 Adding support for flashing system with Nvidia MCP67 by Stefan Reinauer · 16 years ago
  72. 2cb94e1 First attempt to clean up SPI probing and create a common construct: the flash bus by Stefan Reinauer · 16 years ago
  73. 3fdbccf This patch adds support for VIA SPI controller on VT8237S by Rudolf Marek · 16 years ago
  74. 7e2c079 Fix ICH7 non-SPI that broke in r3393 by Peter Stuge · 16 years ago
  75. a9424d5 Multiple unrelated changes by Stefan Reinauer · 16 years ago
  76. 793bdcd A bunch of cosmetic improvements by Uwe Hermann · 16 years ago
  77. 65c1b86 Changes to make flashrom compile (and work) on FreeBSD by Andriy Gapon · 16 years ago
  78. 1b18b3c ICH8 and ICH9 have an almost identical SPI interface, only the location of the SPIBAR differs by Carl-Daniel Hailfinger · 17 years ago
  79. b46acba Add support for SPI chips on ICH9 by Dominik Geyer · 17 years ago
  80. 6dc1d3b Add more infrastructure for flashrom ICH9 support by Carl-Daniel Hailfinger · 17 years ago
  81. a00e2a0 Add the Intel 6300ESB as known chipset to the chipset struct enables by Claus Gindhart · 17 years ago
  82. 9477c4e Enable ROM decode range to 1MB for vt8237r by Bari Ari · 17 years ago
  83. b36a071 Add ICH9 detection by Carl-Daniel Hailfinger · 17 years ago
  84. 67f9ea3 Prepare for ICH7/ICH8 SPI support by adding some debugging for all ICH* chipsets by Carl-Daniel Hailfinger · 17 years ago
  85. eac1016 Also print the chip vendor name in --list-supported output by Uwe Hermann · 17 years ago
  86. e5ac164 Add --list-supported option which lists the supported ROM chips, chipsets, and mainboards by Uwe Hermann · 17 years ago
  87. 3697ac7 Further cleanups to enable_flash_cs5536 by Mart Raudsepp · 17 years ago
  88. e1344da Improve error handling and make RCONF_DEFAULT_MSR address be a constant by Mart Raudsepp · 17 years ago
  89. 0514a5f Write enable flash chips attached to CS3 of CS5536 chipsets (AMD Geode) by Mart Raudsepp · 17 years ago
  90. 3ac76af Correctly disable the ROM area Write Protect bit in the Geode LX by Marc Jones · 17 years ago
  91. 372eeb5 Various coding style fixes, constification, fixed typos by Uwe Hermann · 17 years ago
  92. d54958a Flashrom support for AMD Geode CS5536 by Lane Brooks · 17 years ago
  93. 97a6470 Add support for Intel 440MX and Fujitsu MBM29F400TC by Uwe Hermann · 17 years ago
  94. a502dce Some cosmetic cleanups in the flashrom code and output by Uwe Hermann · 17 years ago
  95. dca0ab1 Fix wrong values/typos in chipset_enable.c by Carl-Daniel Hailfinger · 17 years ago
  96. ac30934 Revert my last cleanup patch by Uwe Hermann · 17 years ago
  97. 17d00ab Cosmetic changes to make the flashrom output more consistent by Uwe Hermann · 17 years ago
  98. c9fb5d9 Change out/in combinations to pci_read/write_byte in sis630 chipset enable by Alex Beregszaszi · 17 years ago
  99. d110764 Change all flashrom license headers to use our standard format by Uwe Hermann · 17 years ago
  100. ffec5f3 Cosmetic fixes by Uwe Hermann · 17 years ago