Gitiles
Code Review Sign In
review.sourcearcade.org / flashprog / 5c5b525652c1624d485e6c19e433f25f36ff04d5 / chipset_enable.c
  1. b5d677b Add AMD-768 chipset support by Sven Schnelle · 16 years ago
  2. ed2352b Add i631x LPC support by Sven Schnelle · 16 years ago
  3. e8a3e4c Initialize ICH SPI opcodes also for ICH9 and later by Peter Stuge · 16 years ago
  4. f041e9b Various ichspi.c refinements by FENG yu ning · 16 years ago
  5. c05a295 Generates OPCODES struct from the ICH7/ICH9/VIA chipset if its SPI configuration is locked down by FENG yu ning · 16 years ago
  6. f63c0dc Add AMD SB700 flash enable by Niels Ole Salscheider · 16 years ago
  7. 9a6d176 Replace #ifdefs for sc520 systems by run time probing by Stefan Reinauer · 16 years ago
  8. a3f04be Add support for the AMD/ATI SB600 southbridge SPI functionality by Jason Wang · 16 years ago
  9. d3b0e39 Dump ICH8/ICH9/ICH10 SPI registers by Carl-Daniel Hailfinger · 16 years ago
  10. b759db2 Enable SPI boot flash support on EP80579, which has the ICH7 register set by Ed Swierk · 16 years ago
  11. c556d32 Add support for the Intel 82371MX (MPIIX) southbridge by Uwe Hermann · 16 years ago
  12. 8720345 Add support for the Intel 82371FB PIIX and 82371SB (PIIX3) southbridges by Uwe Hermann · 16 years ago
  13. 190f849 Add support for the VIA VT82C586A/B chipset, improve documentation by Uwe Hermann · 16 years ago
  14. 394131e Coding-style fixes for flashrom, partly indent-aided by Uwe Hermann · 16 years ago
  15. a88daa7 Allow the SiS 620 chipset to detect and read at least 256kb chips by Urja Rannikko · 16 years ago
  16. 3af487d SB600 has four write once LPC ROM protect areas by Marc Jones · 16 years ago
  17. 28ec74b Add ICH10 support by Carl-Daniel Hailfinger · 16 years ago
  18. cd2ed47 Recognize the Intel EP80579 LPC flash interface by Ed Swierk · 16 years ago
  19. 7f27464 Adding support for flashing system with Nvidia MCP67 by Stefan Reinauer · 16 years ago
  20. 2cb94e1 First attempt to clean up SPI probing and create a common construct: the flash bus by Stefan Reinauer · 16 years ago
  21. 3fdbccf This patch adds support for VIA SPI controller on VT8237S by Rudolf Marek · 16 years ago
  22. 7e2c079 Fix ICH7 non-SPI that broke in r3393 by Peter Stuge · 16 years ago
  23. a9424d5 Multiple unrelated changes by Stefan Reinauer · 16 years ago
  24. 793bdcd A bunch of cosmetic improvements by Uwe Hermann · 16 years ago
  25. 65c1b86 Changes to make flashrom compile (and work) on FreeBSD by Andriy Gapon · 16 years ago
  26. 1b18b3c ICH8 and ICH9 have an almost identical SPI interface, only the location of the SPIBAR differs by Carl-Daniel Hailfinger · 16 years ago
  27. b46acba Add support for SPI chips on ICH9 by Dominik Geyer · 16 years ago
  28. 6dc1d3b Add more infrastructure for flashrom ICH9 support by Carl-Daniel Hailfinger · 16 years ago
  29. a00e2a0 Add the Intel 6300ESB as known chipset to the chipset struct enables by Claus Gindhart · 16 years ago
  30. 9477c4e Enable ROM decode range to 1MB for vt8237r by Bari Ari · 16 years ago
  31. b36a071 Add ICH9 detection by Carl-Daniel Hailfinger · 17 years ago
  32. 67f9ea3 Prepare for ICH7/ICH8 SPI support by adding some debugging for all ICH* chipsets by Carl-Daniel Hailfinger · 17 years ago
  33. eac1016 Also print the chip vendor name in --list-supported output by Uwe Hermann · 17 years ago
  34. e5ac164 Add --list-supported option which lists the supported ROM chips, chipsets, and mainboards by Uwe Hermann · 17 years ago
  35. 3697ac7 Further cleanups to enable_flash_cs5536 by Mart Raudsepp · 17 years ago
  36. e1344da Improve error handling and make RCONF_DEFAULT_MSR address be a constant by Mart Raudsepp · 17 years ago
  37. 0514a5f Write enable flash chips attached to CS3 of CS5536 chipsets (AMD Geode) by Mart Raudsepp · 17 years ago
  38. 3ac76af Correctly disable the ROM area Write Protect bit in the Geode LX by Marc Jones · 17 years ago
  39. 372eeb5 Various coding style fixes, constification, fixed typos by Uwe Hermann · 17 years ago
  40. d54958a Flashrom support for AMD Geode CS5536 by Lane Brooks · 17 years ago
  41. 97a6470 Add support for Intel 440MX and Fujitsu MBM29F400TC by Uwe Hermann · 17 years ago
  42. a502dce Some cosmetic cleanups in the flashrom code and output by Uwe Hermann · 17 years ago
  43. dca0ab1 Fix wrong values/typos in chipset_enable.c by Carl-Daniel Hailfinger · 17 years ago
  44. ac30934 Revert my last cleanup patch by Uwe Hermann · 17 years ago
  45. 17d00ab Cosmetic changes to make the flashrom output more consistent by Uwe Hermann · 17 years ago
  46. c9fb5d9 Change out/in combinations to pci_read/write_byte in sis630 chipset enable by Alex Beregszaszi · 17 years ago
  47. d110764 Change all flashrom license headers to use our standard format by Uwe Hermann · 17 years ago
  48. ffec5f3 Cosmetic fixes by Uwe Hermann · 17 years ago
  49. 0846f89 Drop a bunch of useless header files, merge them into flash.h by Uwe Hermann · 17 years ago
  50. f4a673b Fix up and document the AMD CS5530/CS5530A support by Uwe Hermann · 17 years ago
  51. e823ee0 Document the newly supported IBM x3455 board and the now-supported Broadcom HT-1000 chipset by Uwe Hermann · 17 years ago
  52. 1c283f4 Move GPIO settings to board specific code for IBM x3455 by Stefan Reinauer · 17 years ago
  53. c868b9e Add support for BCM HT1000 chipset by Stefan Reinauer · 17 years ago
  54. 6b14175 Add support for ASUS P5A (Socket 7, ALi based) by Luc Verhaegen · 17 years ago
  55. a7e0548 Fix coding style of flashrom by running indent on all files by Uwe Hermann · 17 years ago
  56. c031066 Add support for CX700 builtin southbridge by Randall Philipson · 17 years ago
  57. 8e3a600 Split flash_enable.c into chipset_enable.c and board_enable.c by Luc Verhaegen · 17 years ago[Renamed (63%) from flash_enable.c]
  58. 3ad2518 Add support for the ICH7-DH southbridge (untested) by Uwe Hermann · 17 years ago
  59. d6b86cf The attached patch adds additional PCI IDs for MCP55 LPC devices by Ed Swierk · 18 years ago
  60. 6382b44 Fix wrong VT8235 flash enable failed warning by Luc Verhaegen · 18 years ago
  61. 3ab5415 Add support for the Gigabyte m57sli-s4 board by Ward Vandewege · 18 years ago
  62. 064b1f2 This patch is a rework of Adam Kaufman's Solaris patch by Adam Kaufman · 18 years ago
  63. 3618346 Delete superfluous and incorrect comment by Uwe Hermann · 18 years ago
  64. ca78297 Add support for the SST-49LF004C, SST-49LF008C, SST-49LF016C by Yinghai Lu · 18 years ago
  65. 987942d Fix some code comments of the Intel PIIX4/PIIX4E/PIIX4M code by Uwe Hermann · 18 years ago
  66. c6b5f49 Support for VIA VT82C686 utility by Stefan Reinauer · 18 years ago
  67. ea2c66d Add support for Intel PIIX4/PIIX4E/PIIX4M-based mainboards by Uwe Hermann · 18 years ago
  68. 219b61e Multiple unrelated changes by Stefan Reinauer · 18 years ago
  69. eb36647 Add patch from Uwe Hermann to support more ICH southbridges by Stefan Reinauer · 18 years ago
  70. cbc55d0 Print a warning if southbridge is not known by Stefan Reinauer · 18 years ago
  71. e807d82 Add support for SST39SF040, SST39SF010A and W39V040B by Stefan Reinauer · 18 years ago
  72. 023af76 Multiple unrelated changes by Scott Tsai · 18 years ago
  73. 86de283 Multiple unrelated changes by Stefan Reinauer · 18 years ago
  74. d2c3a62 Add support for ICH5 by Ronald G. Minnich · 19 years ago
  75. 184a404 Flashrom update from Stefan, resolve issue 21 by Ollie Lho · 19 years ago
  76. 952dfce Nvidia Ck804 support by Yinghai Lu · 19 years ago
  77. d11f361 Enable LPC decoding for 1 MB more addresss, for supporting SST49LF00xA/B by Ollie Lho · 20 years ago
  78. 6a96741 Add support for ICH4 by Ronald G. Minnich · 20 years ago
  79. 8b8897a Remove false alarm of erase/write, use verify '-v' if you are not sure about the integrity by Ollie Lho · 21 years ago
  80. 761bf1b Consolidate more jedec standard code by Ollie Lho · 21 years ago
  81. cbbf125 Move utility functions into new source files by Ollie Lho · 21 years ago