)]}'
{
  "log": [
    {
      "commit": "842d678f07439e133e69fc775a848dcd66369446",
      "tree": "c01716fbc4220c1211749772d6a566e6d70701d7",
      "parents": [
        "aa714dd3dd7090e1fa7175f3a32a252b04817261"
      ],
      "author": {
        "name": "Richard Hughes",
        "email": "richard@hughsie.com",
        "time": "Fri Jan 15 09:48:12 2021 +0000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Wed Mar 27 08:32:15 2024 +0000"
      },
      "message": "libflashrom: Return progress state to the library user\n\nProjects using libflashrom like fwupd expect the user to wait for the\noperation to complete. To avoid the user thinking the process has\n\"hung\" or \"got stuck\" report back the progress complete of the erase,\nwrite and read operations.\n\nAdd a new --progress flag to the CLI to report progress of operations.\n\nInclude a test for the dummy spi25 device.\n\nTested: ./test_build.sh; ./flashrom -p lspcon_i2c_spi:bus\u003d7 -r /dev/null --progress\n\nflashrom-stable:\n* Closer to original libflashrom API.\n* Split update_progress() into progress_start/_set/_add/_finish:\n  Simplifies progress calls scattered through the code base. We let\n  the core code in `flashprog.c` handle the total progress. Only API\n  is flashprog_progress_add().  Erase progress is completely handled\n  in `flashprog.c`. Fine grained read/write progress can be reported\n  at the chip/programmer level.\n* Add calls to all chip read/write paths and opaque programmers\n  except for read_memmapped() (which is handled in follow ups).\n* At least one wrinkle left: Erasing unaligned regions will slightly\n  overshoot total progress.\n\nChange-Id: I7197572bb7f19e3bdb2bde855d70a0f50fd3854c\nSigned-off-by: Richard Hughes \u003crichard@hughsie.com\u003e\nSigned-off-by: Daniel Campello \u003ccampello@chromium.org\u003e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/49643\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/74731\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "e3a26888e14d16592c2c79d1516828d3d32961a4",
      "tree": "02d401e60defd27fe7bee194978bac782284cb39",
      "parents": [
        "2b66ad9c4465432e6f2aff2e95f1e7a556bfc3f0"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Wed Jan 11 21:45:51 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Mar 09 10:30:24 2024 +0000"
      },
      "message": "Pass programmer context to programmer-\u003einit()\n\nChange-Id: I064eb4e25c3d382e4e5bde802306698fafe5e1d0\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72526\n"
    },
    {
      "commit": "621208c341cb400b9b13b5874da49504818a9f49",
      "tree": "1a851dd54e96add7fe6e30de98fe3b5e4424a775",
      "parents": [
        "56684d9a2ed8a0f878472d5aa0518a3200526812"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Wed Sep 07 22:21:39 2022 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "drivers/: Make \u0027fallback_{un}map\u0027 the default unless defined\n\nDrop the explicit need to specify the default \u0027fallback_{un}map\u0027\ncallback function pointer from the \u0027programmer_entry\u0027 struct.\nThis is a reasonable default for every other driver in the tree\nwith only a select few exceptions [atavia, serprog, dummyflasher\nand internal].\n\nThus this simplifies driver development and paves way\nto remove the \u0027programmer\u0027 global handle.\n\nflashrom-stable: Updated `dirtyjtag_spi` which was added earlier.\n\nChange-Id: I5ea7bd68f7ae2cd4af9902ef07255ab6ce0bfdb3\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67404\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72360\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "56684d9a2ed8a0f878472d5aa0518a3200526812",
      "tree": "020c2d8db0e05a74981b5b381c37febd46fb796d",
      "parents": [
        "78ed668a924db5dd78c3530655127f895728fe59"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Wed Sep 07 10:47:45 2022 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "drivers/: Make \u0027internal_delay\u0027 the default unless defined\n\nDrop the explicit need to specify the default \u0027internal_delay\u0027\ncallback function pointer in the programmer_entry struct.\nThis is a reasonable default for every other driver in the\ntree with only the two exceptions of ch341a_spi.c and serprog.c.\n\nThus this simplifies driver development.\n\nflashrom-stable: Updated `dirtyjtag_spi` which was added earlier.\n\nChange-Id: I17460bc2c0aebcbb48c8dfa052b260991525cc49\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67391\nOriginal-Reviewed-by: Peter Marheine \u003cpmarheine@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nOriginal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72359\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "dd9d0c58d601a003ebc1918c53edc16aab607080",
      "tree": "2daac025bb07ce348b414cb9c6e7957419ca3102",
      "parents": [
        "4bd966c8099b64ebb665b6f40786bb21d59a9363"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Sat Jun 04 20:23:57 2022 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "tree: Consolidate BIT() macro\n\nChange-Id: I7e61f7671b70ca5ed751d99405714436bcd18d5a\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/64962\nOriginal-Reviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nOriginal-Reviewed-by: Elyes Haouas \u003cehaouas@noos.fr\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72338\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "3f4d35daf4533650e75fcabb8f1ed9085e1fcf77",
      "tree": "ae3340f0a563d1d9ed48285cc861e7e90e2343ef",
      "parents": [
        "a6b45c4516e15aeb405028e5095e86259fcd9e34"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.com",
        "time": "Mon Jan 17 15:11:43 2022 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "hwaccess: move mmio functions into hwaccess_physmap\n\nThe mmio_le/be_read/writex functions are used for raw memory access.\nBundle them with the physmap functions.\n\nChange-Id: I313062b078e89630c703038866ac93c651f0f49a\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/61160\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72278\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "d52aaabb802c72b370cafc9285621f7a6c83bd7b",
      "tree": "6b167ba4835dc9d16a52792c978402d3c5068bff",
      "parents": [
        "d0d8d2c5081f06f2250210bc0b859a653305a0a0"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.com",
        "time": "Thu Jan 06 14:49:31 2022 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "nicintel_eeprom: remove unused rget_io_perms()\n\nThe nicintel_eeprom programmer does not use x86 IO Ports. Remove the\ndependency to it.\n\nChange-Id: I5fd42572fd29f5d7fd749c2836eac3e68c947946\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/60845\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72273\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "74b4aa0b15439a2ab2474889a7abed978439757a",
      "tree": "a3e6d01052b04bbae7c71af7c1148d3619ba1ab1",
      "parents": [
        "b3287b43dc2fc90913686eb7ca9adfdedac2fdb4"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.com",
        "time": "Tue Dec 14 17:52:30 2021 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "physmap: rename to hwaccess_physmap, create own header\n\nLine up physmap with the other hwaccess related code.\n\nChange-Id: Ieba6f4e94cfc3e668fcb8b3c978de5908aed2592\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/60113\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72267\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "a065520a7c7eedcca961de1fc891cc0b04e6df77",
      "tree": "f7a4c280f6d3114b98a52e147f988c4ae293271b",
      "parents": [
        "d96c97c77309f1cf1ff1cbe9fa521a75fc9d5698"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.com",
        "time": "Tue Dec 14 16:36:05 2021 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "hwaccess: move x86 port I/O related code into own files\n\nAllow port I/O related code to be compiled independent from memory\nmapping functionality. This enables for a better selection of needed\nhardware access types.\n\nChange-Id: I372b4a409f036da766c42bc406b596bc41b0f75a\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/60110\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72265\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "d96c97c77309f1cf1ff1cbe9fa521a75fc9d5698",
      "tree": "2ca206a0bb2873472e243eb2138c7f1e0345abf2",
      "parents": [
        "b7c6a66d5167a9cb6d83081f4c84b7a6c0d28046"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.com",
        "time": "Tue Nov 02 21:03:00 2021 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "pci.h: move include into own wrapper\n\nSplit the include of hwaccess and libpci. There is no need to have pci.h\nincluded in hwaccess.\n\nChange-Id: Ibf00356f0ef5cc92e0ec99f8fe5cdda56f47b166\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/58883\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72264\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "72c02ff4b0ea4111d4f2632ba102506683607749",
      "tree": "97e0b54b1ff3a061a8e1507af05fddd1818ac48c",
      "parents": [
        "a1fed9ffe3bf81d7a605c2be9e979b0e0804d28b"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 08 02:00:06 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "opaque_master: Use new API to register shutdown function\n\nThis allows opaque masters to register shutdown function in\nopaque_master struct, which means there is no need to call\nregister_shutdown in init function, since this call is now a part\nof register_opaque_master.\n\nAs a consequence of using new API, two things are happening here:\n1) No resource leakage anymore in case register_shutdown() would fail,\n2) Fixed propagation of register_opaque_master() return values.\n\nTested: 1) builds and ninja test including CB:56413\n2) on ARMv7 device\nflashrom -p linux_mtd -V\n-\u003e using linux_mtd, chip found\n\nChange-Id: Id8471a117556edcbf9694752fabe05cf4501ce70\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/56825\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72230\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "7a7b25dc3532ca7b121966bd7e3827371d6dce75",
      "tree": "194398b492036ae685e3fb7d95e8f8ea52c90c0d",
      "parents": [
        "7783f2f39397cc3fad701f6bc5eaf8fa80e2e3ca"
      ],
      "author": {
        "name": "Anastasia Klimchuk",
        "email": "aklm@chromium.org",
        "time": "Tue Aug 03 11:54:56 2021 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "nicintel_eeprom: Check UNPROG_DEVICE in 82580 shutdown\n\nPreviously shutdown function was registered conditionally for 82580,\nonly if the device was not UNPROG_DEVICE. This patch moves the check\nfor UNPROG_DEVICE into shutdown function itself, so that shutdown\nfunction can be always registered for 82580.\n\nThis also fixes a memory leak in nicintel_ee_shutdown_82580.\n\nNo changes for i210 device init/shutdown, only for 82580.\n\nAnd very importantly this unlocks API change which plans to move\nregister_shutdown inside register_opaque_master, similar to what\u0027s\ndone in CB:56103\n\nChange-Id: I5c729a3a63d0106e65525a6a77b2f9104c96847f\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/56821\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72227\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "21b20218a6128c1880eceb634101df176b56692d",
      "tree": "84402bf4e4ac933b023ac6e1c56f4a693ef522bc",
      "parents": [
        "b91a203091fc43824bc57f3c8e2db0bcc311da59"
      ],
      "author": {
        "name": "Anastasia Klimchuk",
        "email": "aklm@chromium.org",
        "time": "Thu May 13 12:28:47 2021 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "programmer: Smoothen register_opaque_master() API\n\nIt was impossible to register a const struct opaque_master that would\npoint to dynamically allocated `data`. Fix that so that we won\u0027t\nhave to create more mutable globals.\n\nChange-Id: Id3adb4cf04ae04dbe87ddb96f30871cb5f7c8ff0\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54170\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72202\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "316ef019e04c402423bb4602aa9f5f231062b175",
      "tree": "b99fb0f75c7c1943edcea0f1505f20d0a78b4594",
      "parents": [
        "494fa833effc2de065a7beede123d1aa0d02afcb"
      ],
      "author": {
        "name": "Alexander Goncharov",
        "email": "chat@joursoir.net",
        "time": "Sun Aug 07 12:08:49 2022 +0300"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 05 16:35:01 2023 +0000"
      },
      "message": "nicintel_eeprom: handle errors using goto for i210\u0027s shutdown\n\nThis patch prepares the programmer to move global singleton states\ninto a struct.\n\nTOPIC\u003dregister_master_api\n\nChange-Id: Idb4f75fa92966a0fffd83dd0e297f5f51f6c0bd3\nSigned-off-by: Alexander Goncharov \u003cchat@joursoir.net\u003e\nTicket: https://ticket.coreboot.org/issues/391\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66491\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71478\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "43040f297e68cd4d826d58f57566581ef902d179",
      "tree": "a8357aba5a8dbfd43f3e7949c865f2682bf5962d",
      "parents": [
        "4203a47a102e2622f404ee6567b240882d584116"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.com",
        "time": "Thu Jun 23 14:38:35 2022 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 05 16:35:01 2023 +0000"
      },
      "message": "tree: indent struct *_master consistently with tabs\n\nUse `\u003ctab\u003e.key\u003ctab\u003e*\u003d \u003cvalue\u003e,`\n\nTEST: `make VERSION\u003d0 MAN_DATE\u003d0` returns the same flashrom binary\nbefore and after the patch\n\nChange-Id: I1c45ea9804ca09e040d7ac98255042f58b01f8ef\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/65363\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71466\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "27fdfd751ee0d4ed919a23d934b9271568377fa6",
      "tree": "fe26d2ce85d796031e89178efc59cc7b2e59a4e1",
      "parents": [
        "9fc8e258914a1e891fd4025a3d50edfa8153a141"
      ],
      "author": {
        "name": "Anastasia Klimchuk",
        "email": "aklm@chromium.org",
        "time": "Tue Aug 03 10:41:50 2021 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 05 16:15:22 2023 +0000"
      },
      "message": "nicintel_eeprom: Delete extra parentheses from if condition\n\nChange-Id: I068bd227668a79f14e38e703a5a49db18d5de8c7\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/56820\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71416\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "cc853d84ed2f8ecafc1f6daa443f8baa4c871805",
      "tree": "8e5f3e0b7a75d272a109e20af5aeeeec11dfebf7",
      "parents": [
        "7e1345602641114c8eeb5cfef992bf1da8d7fa6a"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.de",
        "time": "Tue May 04 15:32:17 2021 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 05 16:15:22 2023 +0000"
      },
      "message": "programmer_table: move each entry to the associated programmer source\n\nChange-Id: I3d02bd789f0299e936eb86819b3b15b5ea2bb921\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.de\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/52946\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71373\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "771bb7952a91722d2d9f100e19b0566f06298126",
      "tree": "dd32d8135b2780a15ae4dc17a3ac6234e664717c",
      "parents": [
        "17d16032d68931361a2a20de243ac95752f3292a"
      ],
      "author": {
        "name": "Angel Pons",
        "email": "th3fanbus@gmail.com",
        "time": "Sun May 02 15:09:20 2021 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 05 16:15:22 2023 +0000"
      },
      "message": "nicintel_eeprom.c: Mark 8086:1531 as tested\n\nReading, erasing and writing works on an i210 NIC of an Asus Z10PA-D8.\n\nChange-Id: I9cabea5dfb9424b9c30d82840089506f2bd943da\nSigned-off-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/52825\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71353\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "89622674b29c09bb33cb5844520d9271ebef8ea0",
      "tree": "76f3035d59461fc0e70fee40e00ef410ea011769",
      "parents": [
        "5d068ddca4aa8c657bbf3e7df8cf94c8e3212ada"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Oct 10 18:05:55 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Dec 10 16:38:50 2019 +0000"
      },
      "message": "nicintel_eeprom: Reduce usage of is_i210()\n\nDon\u0027t entagle the code paths for the two NIC classes if it\u0027s not necessary.\n\nOnly compile tested.\n\nChange-Id: I59164ccf54afbbd64a0598282d13e80ff7fd6fa4\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom/+/33637\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: HAOUAS Elyes \u003cehaouas@noos.fr\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n"
    },
    {
      "commit": "e083880279119677e443fc16b4694f8c81bf2c40",
      "tree": "03413b996779bc4c86ec41590f3e7bcdd97d0ef5",
      "parents": [
        "124ef38f7afc61ad7c713c22aad7c5c7f79bdb9b"
      ],
      "author": {
        "name": "Elyes HAOUAS",
        "email": "ehaouas@noos.fr",
        "time": "Mon Apr 02 11:14:02 2018 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Apr 24 20:21:41 2018 +0000"
      },
      "message": "Remove address from GPLv2 headers\n\nChange-Id: I7bfc339673cbf5ee2d2ff7564c4db04ca088d0a4\nSigned-off-by: Elyes HAOUAS \u003cehaouas@noos.fr\u003e\nReviewed-on: https://review.coreboot.org/25381\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "4343e7d44006dcda2ea76b0e7625837832141539",
      "tree": "18f07dec45cafc53621d1af74c33ae60e4169916",
      "parents": [
        "2ec33f9e6a303a729ceb164d34a85563b6e2c1b0"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Oct 10 17:38:07 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Oct 20 19:27:08 2017 +0000"
      },
      "message": "fixup! nicintel_eeprom: Support for I210 emulated EEprom\n\nFix is_i210(), add a comment and break an overlong line.\n\nChange-Id: I5d3f71e4e0f77cc8793e7f395baf69e1fad930a3\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/21934\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "79d838d31696542105a4185758f23db13d8ea045",
      "tree": "20162a2ada71c7ece57f96d9790ce8c7b791bb5c",
      "parents": [
        "75a2a79aebe9ffd0bcdb5f8d014d9e5583973014"
      ],
      "author": {
        "name": "David Hendricks",
        "email": "dhendrix@chromium.org",
        "time": "Wed Sep 27 09:25:34 2017 -0700"
      },
      "committer": {
        "name": "David Hendricks",
        "email": "david.hendricks@gmail.com",
        "time": "Tue Oct 03 00:23:34 2017 +0000"
      },
      "message": "fixup! nicintel_eeprom: Support for I210 emulated EEprom\n\nA couple of C99-style variable declarations within loops are causing\ncompilation failures on some systems (gcc 4.9.2-10 on Raspbian). This\nmoves them to make gcc happy.\n\nChange-Id: Ib7ad5a69244e462f84eae93df9e841716e089b31\nSigned-off-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/21702\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "9fe1fb71c7e53e4f44d633fe52dc33453b36848b",
      "tree": "726c76de3e2b36ea50bb50ff9e87f75aeecd3d21",
      "parents": [
        "7b629bcde47e18d094e496fb8ae537272ead0998"
      ],
      "author": {
        "name": "Ricardo Ribalda Delgado",
        "email": "ricardo.ribalda@gmail.com",
        "time": "Thu Mar 23 15:11:22 2017 +0100"
      },
      "committer": {
        "name": "David Hendricks",
        "email": "david.hendricks@gmail.com",
        "time": "Sun Sep 17 18:05:16 2017 +0000"
      },
      "message": "nicintel_eeprom: Support for I210 emulated EEprom\n\nOn the I210 family there is no MAC EEprom, instead there is a big flash\n(typically around 16Mb) with contents of the old MAC plus other stuff.\nThere is an interface to program the whole flash, but once it is\nprogrammed it enters a \"Secure Mode\" that disables the interface.\n\nLuckily, the section with the MAC can still be updated via the EEprom\ninterface. This patch adds support for this interface.\n\nroot@qt5022-fglrx:~# ./flashrom -p nicintel_eeprom:pci\u003d01:0.0 -w kk.raw -V\nflashrom v0.9.9-unknown on Linux 4.10.0-qtec-standard (x86_64)\nflashrom is free software, get the source code at https://flashrom.org\n\nflashrom was built with libpci 3.4.1, GCC 5.3.0, little endian\nCommand line (5 args): ./flashrom -p nicintel_eeprom:pci\u003d01:0.0 -w kk.raw -V\nCalibrating delay loop... OS timer resolution is 1 usecs, 1856M loops per second, 10 myus \u003d 10 us,\n100 myus \u003d 102 us, 1000 myus \u003d 1017 us, 10000 myus \u003d 10044 us, 4 myus \u003d 4 us, OK.\nInitializing nicintel_eeprom programmer\nFound \"Intel I210 Gigabit Network Connection\" (8086:1533, BDF 01:00.0).\nRequested BAR is of type MEM, 32bit, not prefetchable\nRequested BAR is of type MEM, 32bit, not prefetchable\nThe following protocols are supported: Programmer-specific.\nProbing for Programmer Opaque flash chip, 0 kB: Found Programmer flash chip \"Opaque flash chip\"\n(4 kB, Programmer-specific) on nicintel_eeprom.\nFound Programmer flash chip \"Opaque flash chip\" (4 kB, Programmer-specific).\nReading old flash chip contents... done.\nErasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:W\nErase/write done.\nVerifying flash... VERIFIED.\n\nChange-Id: I553f33e5dcb4412d682fc93095b29bcfed11713c\nSigned-off-by: Ricardo Ribalda Delgado \u003cricardo.ribalda@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/21431\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "5c316f954941241ed75a1f00f00bf1bff318488a",
      "tree": "ce836bcb29d7d9da86ee583a88236b020985ba36",
      "parents": [
        "dc627931848ed6af40be4f7d5bdb8e33d28b8333"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Feb 08 21:57:52 2015 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Feb 08 21:57:52 2015 +0000"
      },
      "message": "Add a bunch of new/tested stuff and various small changes 22\n\nTested mainboards:\nOK:\n - AOpen UK79G-1394 (used in EZ18 barebones)\n   Reported by Lawrence Gough\n - ASUS M4N78 SE\n   Reported by Dima Veselov\n - ASUS P5LD2-VM\n   Mark board enable as tested (reported by Dima Veselov)\n - GIGABYTE GA-970A-UD3P (rev. 2.0)\n   Reported by trucmar on IRC\n - GIGABYTE GA-990FXA-UD3 (rev. 4.0)\n   Reported by ROKO__ on IRC\n - GIGABYTE GA-H77-DS3H (rev. 1.1)\n   Reported by Evgeniy Edigarev\n - GIGABYTE GA-P55-USB3 (rev. 2.0)\n   Reported by Måns Thörnqvist\n - MSI MS-7817 (H81M-E33)\n   Reported by Igor Kolker\n\nChipsets:\n - Marked Intel Bay Trail (0x0f1c) as tested OK\n   Reported by Antonio Ospite\n - Refine Intel IDs\n    * Add IDs for Braswell\n    * Add IDs for 9 Series PCHs (e.g. H97, Z97)\n    * Rename Wellsburg devices slightly\n\nFlash chips:\n - Atmel AT25DF041A to PREW (+PREW)\n   Reported by Tai-hwa Liang\n - Atmel AT26DF161 to PREW (+EW)\n   Reported by Steve Shenton\n - Atmel AT45DB011D to PREW (+PREW)\n   Reported by The Raven\n - Atmel AT45DB642D to PREW (+PREW)\n   Reported by Mahesh Mokal\n - Eon EN25F32 to PREW (+PREW)\n   Reported by Arman Khodabande\n - Eon EN25F40 to PREW (+REW)\n   Reported by Jerrad Pierce\n - Eon EN25QH16 to PREW (+EW)\n   Reported by Ben Johnson\n - GigaDevice GD25Q20(B) to PREW (+PREW)\n   Reported by Gilles Aurejac\n - Macronix MX25U6435E/F to PR (+PR)\n   Reported by Matt Taggart\n - PMC Pm25LV512(A) to PREW (+PREW)\n   Reported by The Raven\n - SST SST39VF020 to PREW (+PREW)\n   Reported by Urja Rannikko\n - Winbond W25Q40.V to PREW (+EW)\n   Reported by Torben Nielsen\n - Add E variants of MX25Lx006 (MX25L2006E, MX25L4006E, MX25L8006E).\n - Add MX25L6465E variant.\n - There was never a MX25L12805 AFAICT.\n - Split MX25L12805 from models with the same ID but an additional 32 kB\n   eraser: MX25L12835F/MX25L12845E/MX25L12865E.\n - Add a bunch of ST parallel NOR flash chip IDs.\n\nMiscellaneous:\n - Whitelist ThinkPad X200.\n - Constify master parameter of register_master().\n - Remove FEATURE_BYTEWRITES because it was never used at all.\n - Refine hwseq messages and make them less prominent.\n - Fix the yet unused PRIxCHIPADDR format string thingy.\n - Fix copy\u0026paste error in spi_prettyprint_status_register_bp().\n   Spotted by Pablo Cases.\n - Add an additional SMBus controller revision to identify another Yangtze\n   model. Thanks to Dan Christensen for reporting this issue.\n - dediprog: add missing include for stdlib.h.\n   This fixes (at least) building on FreeBSD and DragonflyBSD with gcc.\n - Remove references to struct pci_filter from programmer.h.\n   It is only needed in internal.c where it has a complete type. Having\n   it in programmer.h provokes a warning by some old versions of gcc.\n - Tiny other stuff.\n\nCorresponding to flashrom svn r1879.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "3e6b7bb9480ca0aff25f9d6bc7767bf4c5331447",
      "tree": "967316a348ac3ab343a9e02e1ce47c0dd883f576",
      "parents": [
        "05151b6dcbba16746aa803069dd6046a82e33599"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Jan 25 23:45:14 2015 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Jan 25 23:45:14 2015 +0000"
      },
      "message": "Shadowing fix in nicintel_eeprom.c for ancient libpci\n\nVery old versions (\u003c2.2) of pciutils had a typedef named \"word\" in\ntypes.h. That does not play well with previous local variable names\nof nicintel_eeprom.c.\n\nCorresponding to flashrom svn r1874.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "8d21ff1d63e9ce1039fb1cba978e26ecbaec492d",
      "tree": "26e086e92fa8e798bbbd660b5a8c0bc2ecb47209",
      "parents": [
        "4c32af89998df9cae2a20d50e219c195070b012f"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Jan 10 09:33:06 2015 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Jan 10 09:33:06 2015 +0000"
      },
      "message": "Refinements for DragonflyBSD\n\n - /usr/include/cpu/param.h defines PAGE_MASK already, hence use another\n   name for the respective macro in nicintel_eeprom.c.\n - Since DragonflyBSD 3.6 DPorts is used as the default package manager.\n   Therefore we should use /usr/local/ instead of /usr/pkg/ on default\n   to fetch libraries.\n\nCorresponding to flashrom svn r1866.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "2a41f0a2c0daeb0ee2a38a252ab96135d70a6b81",
      "tree": "9d9c28c7560f4947c49e54e62c1f3a04f07aec45",
      "parents": [
        "a5bcbceb581f27cfc0055369d3dd9cfd1ae00bfa"
      ],
      "author": {
        "name": "Ricardo Ribalda Delgado",
        "email": "ricardo.ribalda@gmail.com",
        "time": "Mon Jul 28 20:35:21 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Mon Jul 28 20:35:21 2014 +0000"
      },
      "message": "Add new programmer for SPI EEPROMs attached to Intel 82580 NICs\n\nThis patch lets you read and write the EEPROM on 82580-based gigabit NIC\ncards. So far it has been tested on copper NICs only, but other variants\nemploying this controller should work too.\nIt is a nice substitution for the official eeupdate tool.\n\nSpeed is quite decent: less than 4 seconds for erases or writes of 32 kB.\n\nCorresponding to flashrom svn r1832.\n\nSigned-off-by: Ricardo Ribalda Delgado \u003cricardo.ribalda@gmail.com\u003e\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nTested-by: Ricardo Ribalda Delgado \u003cricardo.ribalda@gmail.com\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    }
  ]
}