)]}' { "log": [ { "commit": "006d08d64ba33d5400dc87e458727df615c381ef", "tree": "c76c5840f8757bbf7368c1f8e60aeb75fcb4db2a", "parents": [ "81deae9ff171410104a1c1840290cc4e48b2b2fc" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 10 22:33:22 2026 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jun 28 09:29:37 2026 +0000" }, "message": "programmer: Move .max_rom_decode into struct master_common\n\nThis is useful information from a chipdriver perspective. It also saves\nus the open-coded tracking of the \"registered master\" in `cli_classic.c`\nright away.\n\nChange-Id: I532e9b1802184520852fe0b45650239ea252a60d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/430\n" }, { "commit": "f3113acc7b51a1707764f90c0d423e79b59b7543", "tree": "4905c73004745c1c76d31f1b68db49b53b5d4ef0", "parents": [ "4af02fe6355beb2ca7eac59a5c35856e1b4084d5" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 21 12:50:19 2026 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 22 09:47:02 2026 +0000" }, "message": "edi: Turn edi_chip_probe() into a bus probing function\n\nLet our common bus-probing infrastructure handle the ID comparison.\nThis also makes the `flashchips\u0027 entry (KB9012) an actual chip entry\nthat carries its identification.\n\nChange-Id: I9533ece2b1337281ea70cb2e3be7a74353a4a758\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/424\n" }, { "commit": "2e0a0031139fe9aa4e7ad3259c6a864112b06f11", "tree": "453b9a47b06c404e7572945e6c23dc0aaa6c1c1c", "parents": [ "b9e47cc321b4924e19d1a556462a8cd94361d1ea" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 07 22:32:27 2026 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 22 09:47:02 2026 +0000" }, "message": "spi: Use bus probing for SFDP\n\nOnly probe for the SFDP signature and split the actual SFDP parsing\ninto a chip preparation function.\n\nChange-Id: I182d0a386bb2fd11951a1c9f2f965ce68ff57cf0\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/427\n" }, { "commit": "b9e47cc321b4924e19d1a556462a8cd94361d1ea", "tree": "22676291abc0c0530863684f4f002f04038b4522", "parents": [ "ac13873e102208d4a78d9c9e541a3eab29fbb1c6" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 21 13:25:17 2026 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 22 09:47:02 2026 +0000" }, "message": "spi: Use bus probing for ST95 RDID\n\nAs the SPI instruction used for probing conflicts with AT45DB chips,\nlet it only run at priority `1\u0027, when no flash chip was detected.\n\nChange-Id: I61db0d6fa7be81d120bc84213c358498019dc52d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/420\n" }, { "commit": "ac13873e102208d4a78d9c9e541a3eab29fbb1c6", "tree": "2e55b347493cfd79f2c648726e1cefd57cf62fd9", "parents": [ "64f53a1c9f5bd11b8b35cff757ac6d4aa37b0c59" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 28 17:42:27 2026 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 22 09:47:02 2026 +0000" }, "message": "Introduce a priority for bus-probing functions\n\nWe want to stop probing once anything was detected by specific,\nhigh-priority probing functions. This can benefit, for example,\nthe probing of non-flash chips on the SPI bus. So far we didn\u0027t\nprobe for these automatically, because the probing commands can\nbe misunderstood by SPI flashes.\n\nWe\u0027ll invoke the probing functions in order of their priority,\nstarting with priority `0\u0027. Once any of them returns something\nthat doesn\u0027t look like continuous 0 or 1 bits, we\u0027ll skip all\nprobing functions with less priority.\n\nChange-Id: Ibde3c348a2fb84b71c325a6c2719e9f2c8b5e784\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/418\n" }, { "commit": "64f53a1c9f5bd11b8b35cff757ac6d4aa37b0c59", "tree": "d64e96af9998a13ba3e22eb1cce5a65d434b7be2", "parents": [ "4312576b49dc77b53d5ebfa6686e3072c9368ea0" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 15 16:04:29 2026 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 22 09:47:02 2026 +0000" }, "message": "spi: Use bus probing for REMS, RES and AT25F\n\nChange-Id: Ic5d2a5283c5fb5e52c58c0b5937922371f56249f\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/417\n" }, { "commit": "4312576b49dc77b53d5ebfa6686e3072c9368ea0", "tree": "5802bfef2623095f5fdccd98df15bdabac35f785", "parents": [ "fbc41d2a932ede9c02aa7803472c31f39ec200f2" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon May 01 15:56:16 2023 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 22 09:47:02 2026 +0000" }, "message": "spi: Use bus probing for RDID\n\nWe put 3 and 4 byte RDID into a single function. Only if we can\u0027t\nread 4 bytes, we try again with 3. There are no conflicts because\nthe only RDID4 manufacturer ID contains the 0x7f prefix, hence it\ncan\u0027t match any 3-byte ID.\n\nChange-Id: I5d35bc30255aae66da35d58431628512e50b39f0\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/74900\n" }, { "commit": "fbc41d2a932ede9c02aa7803472c31f39ec200f2", "tree": "8b72b78abfd99bf8737b90cc2fece11f2dbe93d3", "parents": [ "966dc9b776c2897d1245937639ab41fc834d7cb9" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 22 23:04:01 2026 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 22 09:47:02 2026 +0000" }, "message": "spi: Move SPI related things into new chipdrivers/spi.h\n\nA few things that rely heavily on `flash.h` are moved there instead:\n* function signatures containing `erasefunc_t`,\n* the inline default_wrsr_target() that needs to know struct flashctx.\n\nThis allows to keep the new header file free of a transitive `flash.h`\ninclude.\n\nChange-Id: Ib215821feeb822ea3fc11bf9f48c0328f9a394d4\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/416\n" }, { "commit": "af9d738a66a885f19fdb0659455834f114d9d1e0", "tree": "e3596a537af16f3d9a0aee3dbe7bfc668fc5ce34", "parents": [ "0069440fb0905b7ff3bf5184ffae34673be2e35d" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon May 01 13:33:26 2023 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 22 09:47:02 2026 +0000" }, "message": "Add infrastructure to probe per bus\n\nAdd some infrastructure around per-bus probing functions. Each function\nis provided a private parameter, e.g. the expected length of an ID. This\nwill allow us to implement probing functions that are only called as of-\nten as necessary. The results will be stored in the `registered_master`\nstructure, to be compared to database entries later.\n\nThe probe_buses() wrapper can be used for chip entries, and allows us to\ntransition the existing probing functions one by one. Once all functions\nhave been ported, probe_flash() can be adapted as well and the wrapper\nwill become obsolete.\n\nChange-Id: I6e82b6d61df50234096ac39acab58a4014203933\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/74899\n" }, { "commit": "610c1aad71bfa118c4f49ac01761f586b8dede69", "tree": "8ad4cfd904cf909526b32b03561ad369f42720d9", "parents": [ "b95fe9b9751746b269a3bbd7021cf731d8553715" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Feb 15 02:56:05 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Mar 15 14:27:20 2026 +0000" }, "message": "spi: Pass master instead of flash to .send_command\n\nIn the SPI-master API, `.send_command` should only forward commands to\nthe SPI bus. All details about the commands and the SPI slave should be\nhandled in the chip driver. Hence, replace the `flashctx` pointer with\none to the `spi_master` to enforce proper separation.\n\nChange-Id: I50934a1294217794b7e23cc98ade7e4279c059a1\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/74897\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "dc34409b2016a851ce05b593d3fceb45b0816afa", "tree": "dc9f277489a6ebaa1bf8e9d17428312db8290520", "parents": [ "e3f648c3146be28c642782b11187011dfd6f258d" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Dec 07 00:22:21 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 14 22:42:55 2026 +0000" }, "message": "spi: Refactor default_spi_send_command() to avoid flashctx deref\n\nChange-Id: Icc16a52d12de5a07494294f5f76722970c1d1d14\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/323\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "1b1deda80bbd7f56b8047fad32badb749eeefffb", "tree": "e7058d9d175d08ed2542f6e34be0842a7ade8f57", "parents": [ "a1b7f3521f66a19a2d4c9a6a373c5a7ab36e1473" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Apr 18 00:35:48 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "Implement QPI support\n\nWith the quad-i/o support in place, this is actually straight-\nforward:\n* we check for compatibility of the flash chip and programmer,\n* select an appropriate fast-read function, and\n* always set the respective io-mode when passing a SPI command\n to the programmer.\n\nTested with FT4222H + W25Q128FV and linux_gpio_spi + MX25L25645G.\n\nChange-Id: I2287034f6818f24f892d66d1a505cb719838f75d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/165\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "4760b6ec1f7fbcee1bf238a25e3df56a86327a5a", "tree": "a4c3762b1228f901f62d40b53ed1a953b25926b4", "parents": [ "0c9af0a639bf9180839d548f91547b58de921ca9" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Jan 06 23:45:28 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi25: Implement multi-i/o reads\n\nWe describe a read operation in a new `struct spi_read_op`. It\u0027s\ncomprised of the i/o mode, its opcode, an optional mode byte, and\nthe number of dummy bytes.\n\nBased on this information about the various read operations, and\nthe flash and master feature flags, we select the read operation\nwith the highest throughput.\n\nThe following assumption is made about 4BA chips: When it supports\nnative-4BA fast reads and a multi-i/o version of the regular fast\nread, then it should also support the respective native-4BA, multi-\ni/o version (yes, JEDEC, there are too many read commands!). So far\nthis seems to hold for the chips in our database.\n\nChange-Id: I3c93e71d85f769831d637c14d3571f7ddb54d8b2\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/49\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "d518563f197241cc72f5da4b2108b2df10f00372", "tree": "8ec807be43adf3b5c9f66a2701b7bf0ea3a4a11f", "parents": [ "bd72a470b9b58386b52ca4568313be71b4d2c472" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jan 05 18:44:41 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi: Prepare for multi i/o and dummy bytes\n\nMulti-i/o commands split SPI transactions into multiple phases that\ncan be transferred over 1, 2 or 4 wires. For this, we adapt `struct\nspi_command` with a new enum, specifying the transfer mode, and ad-\nditional size fields. While we are at it, move everything related\ninto a new header file `spi_command.h` so we won\u0027t further clutter\n`flash.h`.\n\nOn the master side, we add respective feature flags for the multi-\ni/o modes.\n\nSee also the comment in `spi_command.h` about multi-i/o commands.\n\nChange-Id: I79debb845f1c8fec77e0556853ffb01735e73ab8\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/44\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "cbf9c1132914f0d5d3a271f910611a6364d30dd3", "tree": "149601c569f8a9534bc84db47a83c53c41fc67e4", "parents": [ "823a7046d28d207a2985a52a3a95e4916ba72d4e" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 25 19:24:17 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Apr 06 13:39:43 2024 +0000" }, "message": "spi: Don\u0027t cross 16MiB boundaries with long writes\n\nThe 16MiB issue still bites us. Originally, the core of flashprog never\nsent more than an erase block at once to write. Now that we write bigger\nchunks at once, after all necessary erasure, it can happen that we cross\n16MiB boundaries. This is an issue with programmer drivers that can only\nsend 3-byte addresses. We use the extended address register with these,\nto select which 16MiB area is currently accessed. Should we try to write\nacross a 16MiB boundary, we\u0027d write with stale extended-address register\ncontents (basically wrapping around).\n\nThis once more troubles old, V1 Dediprog SF100\u0027s. Where we can send huge\nchunks at once and leave the sequencing to the programmer. The program-\nmer, however, is unaware of the state of the extended-address register.\nOther programmer drivers do the sequencing with spi_write_chunked() and\nshouldn\u0027t be affected.\n\nTo settle this issue, copy the loop logic that we already used to avoid\nthe problem for long reads.\n\nTested with Dediprog \"SF100 V:5.1.9\".\n\nChange-Id: I5b9d6779eff5224fb9981fd478dbc94262cd3262\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/115\nReviewed-by: Urja Rannikko \u003curjaman@gmail.com\u003e\n" }, { "commit": "7679b5ccf987e4999fefed6c6100a7a8f50d4350", "tree": "d904cf0a8e68feb831380054ce5956cb3b96fdca", "parents": [ "ca1c7fdd6bd6f61029492fb7a194bd47119e465f" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Apr 28 21:48:53 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Mar 27 08:32:15 2024 +0000" }, "message": "spi25: Replace spi_read_chunked() with more abstract version\n\nThe new flashprog_read_chunked() takes a low-level reading function as\nargument. This allows us to make use of the chunking with non-SPI read\nfunctions.\n\nChange-Id: Ica1b616e75e4e7682120928588e231c82cf4cf70\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/74865\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "9a11cbf21a5078bcdb8db7584c44a9ee17020db4", "tree": "e67a9eadfdb7a71f81df36c7e97180474a8c59df", "parents": [ "aabb3e0ff54e87c0136c91f105e506ed19184cc6" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jan 13 01:19:07 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:40:04 2024 +0000" }, "message": "Let the flash context directly point to the used master\n\nWe used to have a pointer to a full `registered_master` struct in\nour flash context. Beside the used master, this contained a bit\nmask of supported buses. Oddly convenient, this bit mask invited\nto bypass the chip driver and break the abstraction. It allowed\nto place bus-specific details virtually anywhere in flashprog,\nmaking it harder to find a good place for them.\n\nSo, get rid of the `buses_supported` bit mask by pointing directly\nto the master. Only the chip driver will implicitly know which type\nof master is used.\n\nChange-Id: I9ce13d8df0e7ccc67519d888dd9cb2e2ff8d6682\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72533\n" }, { "commit": "89569d60e3aeeec651496b2e7a2e6064d782ab3b", "tree": "bf0c3951886de60086d32ff6e1a850adad926da6", "parents": [ "929d2e1b17a448d3352dbecb6a620ee0c1e65a58" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 12 23:31:40 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "memory_mapped: Reduce `decode_sizes` to a single `max_rom_decode`\n\nWe used to store the maximum decode size, i.e. the maximum memory-mapped\nrange of the flash chip, per bus type (Parallel, LPC, FWH, SPI). There\nwas no programmer in the tree that really made use of it, though:\n* The chipset drivers usually focus on a single bus type. And even if\n they advertise the whole default set (PAR, LPC, FWH), they only pro-\n vide a maximum decode size for one of them. The latter is probably\n wrong, should really more than one bus type be supported.\n* PCI and external programmers all support only a single bus type, with\n the exception of `serprog` which doesn\u0027t set a maximum decode size.\n\nWhat made the distinction even less useful is that for some chips that\nsupport multiple bus types, i.e. LPC+FWH, we can\u0027t even detect which\ntype it is. The existing code around this also only tried to provide\nthe best possible warning message at the expense of breaking the pro-\ngrammer abstraction.\n\nHence, unify the set of sizes into a single `max_rom_decode` property.\nWe store it inside the `registered_master` struct right away, to avoid\nany more use of globals.\n\nChange-Id: I2aaea18d5b4255eb843a625b016ee74bb145ed85\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72531\n" }, { "commit": "1338936efbd5301880063461b74eaf883db6e363", "tree": "ec0fd82dbaafd435bd3784d13378b1c4334f9e93", "parents": [ "8d36db619b5bca0d5a1ddf05c26926b460605e31" ], "author": { "name": "Nico Huber", "email": "nico.huber@secunet.com", "time": "Tue Mar 05 18:35:30 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 08 18:09:43 2024 +0000" }, "message": "Consider 4BA support when filtering erase functions\n\nWhen we decide which erase functions to use, we need to know exactly\nwhich functions are supported by the used programmer. We missed that\nsome programmers can\u0027t send 4-byte adddresses. As we already have a\nfeature flag for this, check it right away for all 4BA erase opcodes.\n\nThis affects mostly rare combinations of external programmers with\nmodern 4BA flash chips. For instance early versions of the Dediprog\nSF100.\n\nTests confirmed that this fixes the combination of a first protocol\ngeneration SF100 with a Winbond W25Q256JV.\n\nChange-Id: I51da2832a6a703058da57cdc0335b214653453ed\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/99\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "c3b02dce51aad2766512d1939a1b7447c2d526b8", "tree": "58069f464bb8a777ef06e93767813a4c5a042cb0", "parents": [ "a02df33fbf1c196395a61049e60895d4ae0e0a5b" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Aug 12 01:13:45 2023 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Sep 18 19:24:39 2023 +0000" }, "message": "Rebrand to flashprog and update URLs\n\nMostly automated `sed` work. As of now, URLs to the old wiki are broken\neither way, so changing them shouldn\u0027t hurt. Other URLs (e.g. to mailing\nlist archives) were hopefully filtered correctly.\n\nChange-Id: I9d43bfd0e675eff2fcbad05f304b9ce9f5006b08\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashrom-stable/+/21\n" }, { "commit": "e7a41e3cec25165b6564b62b6aa64f90bd2dab71", "tree": "a635e566992d379fa1acca5de7fd7517e5c13580", "parents": [ "b0be3200954bebf2431c4d7bd441096f157f621e" ], "author": { "name": "Nikolai Artemiev", "email": "nartemiev@google.com", "time": "Mon Nov 28 17:40:56 2022 +1100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "tree/: Make probe_opcode() flashctx argument const\n\nProbing an opcode generally shouldn\u0027t involve mutating the flashctx\nstate and currently no probe_opcode functions do that.\n\nMake the flashctx arg const so that call sites don\u0027t need to have a\nnon-const pointer.\n\nTested: ninja test\n\nChange-Id: I19e98be50d682de2d2715417f8b7b8c62b871617\nSigned-off-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70030\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72543\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "b0be3200954bebf2431c4d7bd441096f157f621e", "tree": "f77f849073a8e0a8d0f6105c55ef06b969d3c982", "parents": [ "3561451faed250ced4a55e15d1abe5e3d94abfc4" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Tue Sep 20 00:07:23 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi.c: Add AT45 erasefn opcode mapping\n\nflashrom-stable: Dropped spurious/wrong function description.\n\nChange-Id: I798a91f1e20b63662715c68e6d43d03fc6005d51\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67717\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72542\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "e2ff4e90125680a48623a2a908bff38d5b91e44e", "tree": "20d7cec6607c5ffd1d64d57a88148275d02a715f", "parents": [ "0cea753aff33b78051febadf8786df83144b5ee7" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Mon Sep 19 23:31:08 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi25.c: Move spi_get_opcode_from_erasefn() to spi.c\n\nSplit spi_get_opcode_from_erasefn() out into spi.c to add support for\nnon spi25 flashes next.\n\nChange-Id: Id654e998d0af2d3f5845336bb98b38d724519038\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67715\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72540\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "0cea753aff33b78051febadf8786df83144b5ee7", "tree": "8972ea6cf44e249659ddad7ea3d9aa2dedffc0b6", "parents": [ "ab9f25893f1fa87cbbaf656869e346391eccdb31" ], "author": { "name": "Aarya Chaumal", "email": "aarya.chaumal@gmail.com", "time": "Mon Jul 04 18:21:50 2022 +0530" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi: Add function to probe erase command opcode for all spi_master\n\nAdd a field, probe_opcode, to struct spi_master which points to a\nfunction returning a bool by checking if a given command is supported by\nthe programmer in use. This is used for getting a whitelist of commands\nsupported by the programmer, as some programmers like ichspi don\u0027t\nsupport all opcodes.\n\nMost programmers use the default function, which just returns true.\nICHSPI and dummyflasher use their specialized function.\n\nflashrom-stable: Added `.probe_opcode` for `dirtyjtag_spi`, `ich7`.\n\nChange-Id: I6852ef92788221f471a859c879f8aff42558d36d\nSigned-off-by: Aarya Chaumal \u003caarya.chaumal@gmail.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/65183\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72539\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "0b587f921aebd36aaa9f69faea0d2601386d7379", "tree": "c13c57f89dd385d3ed1bd76893cf7a251f8eba1a", "parents": [ "7310f19a07d70a16a0e6342ceb538854729282cd" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Fri Sep 09 23:01:05 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "spi: Make \u0027default_spi_write_aai\u0027 the default unless defined\n\nA NULL func pointer is necessary and sufficient for the\ncondition `NULL func pointer \u003d\u003e default_spi_write_aai\u0027 as to not\nneed this explicit specification of \u0027default\u0027.\n\nTherefore drop the explicit need to specify the \u0027default_spi_write_aai\u0027\ncallback function pointer in the spi_master struct. This is a reasonable\ndefault for every other driver in the tree with only a few exceptions.\n\nThis simplifies the code and driver development.\n\nflashrom-stable: Updated `dirtyjtag_spi` which was added earlier.\n\nChange-Id: I7f14aaea0edcf0c08cea0e9cd27d58152707fb2a\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67479\nOriginal-Reviewed-by: Peter Marheine \u003cpmarheine@chromium.org\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72369\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "7783f2f39397cc3fad701f6bc5eaf8fa80e2e3ca", "tree": "e6334627f11526c27e3e1d77da367e7e2caf5e69", "parents": [ "f48ede4eb133f9cd44b3a2a4a98ea821611d74ae" ], "author": { "name": "Anastasia Klimchuk", "email": "aklm@chromium.org", "time": "Mon Jul 05 09:18:06 2021 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "spi_master: Add shutdown function in spi_master struct\n\nWith this, register_spi_master can take care of register_shutdown\nas well, and every spi master only needs to call register_spi_master\ninstead of calling both register_spi_master and register_shutdown.\n\nTesting:\nIn dummyflasher, comment out free(data) in shutdown. Test fails with error:\n../dummyflasher.c:949: note: block 0x55e0727a6e40 allocated here\nERROR: dummy_init_and_shutdown_test_success leaked 1 block(s)\nMeans, shutdown function is invoked for drivers with \"old\" API\n(so, transitioning from old to new API is not breaking anything).\n\nNext patches in the chain converts spi masters to use new API.\n\nTested: builds and ninja test\n\nChange-Id: I2dc80dceca2f8204bcd0dad1f51753d7e79f1af5\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/55932\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72226\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "5e08e3e829e3f736e18cef7b8f4a8929c9e06257", "tree": "cfe9483275582e2ff2a50628824cf8e842c1feef", "parents": [ "6c33185c81f4aab0d048be7c4b68dca1a91800c2" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue May 11 17:38:14 2021 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "programmer: Smoothen register_spi_master() API\n\nIt was impossible to register a const struct spi_master that would\npoint to dynamically allocated `data`. Fix that so that we won\u0027t\nhave to create more mutable globals.\n\nChange-Id: I0c753b3db050fb87d4bbe2301a7ead854f28456f\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54066\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72179\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "ac90af6cdc747bfe3dc38c83c0b7272addf37659", "tree": "ec67fd7c4d01db82b5a1ffd8c8ed36a7229108dd", "parents": [ "bb4f3b06dcfb60a6ab84750c9b149482dc5ee579" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Dec 18 00:22:47 2022 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jan 13 01:34:15 2023 +0000" }, "message": "Change references to flashrom-stable\n\nAdapt all mentions of the mailing list and also the version print.\n\nChange-Id: Ib4a3271422ee6cf4d0efb8c3fa858b66a22c0a33\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70922\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "5eca427ae64519b70d1c4ccfb427305ca9974ba0", "tree": "1ca22ef1e0072a76650fdd182206844f8ebddd7d", "parents": [ "1bbc501f79319cc6c8d839bc44fa55e96afab33a" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Sun Apr 12 17:27:53 2020 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Dec 30 01:16:34 2022 +0100" }, "message": "const\u0027ify flashctx to align signatures with cros flashrom\n\nThe ChromiumOS flashrom fork has since const\u0027ify flashctx\nin a few places. This aligns the function signatures to\nmatch with downstream to ease forward porting patches\nout of downstream back into mainline flashrom.\n\nThis patch is minimum viable alignment and so feedback is\nwelcome.\n\nChange-Id: Iff6dbda13cb0d941481c0d204b9c30895630fbd1\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/40324\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70933\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "d8b2e808cd46986f945ba9cf3b90c70fe58de9c6", "tree": "4094be4996c4ae32a78e0e13c558ee78bcdd85dc", "parents": [ "0373ce31fe5b11dcf23b27fbc221ba019a1cf7f1" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Jun 18 23:39:56 2019 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jun 21 11:54:19 2019 +0000" }, "message": "spi: Move 16MiB partitioning up into spi_chip_read()\n\nWe enforced a 16MiB limit in spi_read_chunked() for multi-die flash\nchips that can\u0027t be fully read at once. The same limit can be useful\nfor dediprog programmers. So move it into a more generic place.\n\nChange-Id: Iab1fd5b2ea550b4b3ef3e8402e0b6ca218485a51\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom/+/33613\nReviewed-by: Ryan O\u0027Leary\nReviewed-by: ron minnich \u003crminnich@gmail.com\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n" }, { "commit": "e083880279119677e443fc16b4694f8c81bf2c40", "tree": "03413b996779bc4c86ec41590f3e7bcdd97d0ef5", "parents": [ "124ef38f7afc61ad7c713c22aad7c5c7f79bdb9b" ], "author": { "name": "Elyes HAOUAS", "email": "ehaouas@noos.fr", "time": "Mon Apr 02 11:14:02 2018 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Apr 24 20:21:41 2018 +0000" }, "message": "Remove address from GPLv2 headers\n\nChange-Id: I7bfc339673cbf5ee2d2ff7564c4db04ca088d0a4\nSigned-off-by: Elyes HAOUAS \u003cehaouas@noos.fr\u003e\nReviewed-on: https://review.coreboot.org/25381\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "ed098d62d66d91cf7330a37f9b83e303eb7f56d8", "tree": "639b6233e588fd8b4150b42112da36e239ba7fa4", "parents": [ "7e3c81ae7122120fe10d43fcba61a513e2461de9" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Apr 21 23:47:08 2017 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Dec 28 10:49:05 2017 +0000" }, "message": "spi: Move ICH BBAR quirk out of the way\n\nGet rid of the layering violations around ICH\u0027s BBAR. Move all the weird\naddress handling into (surprise, surprise) `ichspi.c`. Might fix writes\nfor the `BBAR !\u003d 0` case by accident.\n\nBackground: Some ICHs have a BBAR (BIOS Base Address Configuration\nRegister) that, if set, limits the valid address range to [BBAR, 2^24).\nCurrent code lifted addresses for REMS, RES and READ operations by BBAR,\nnow we do it for all addresses in ichspi. Special care has to be taken\nif the BBAR is not aligned by the flash chip\u0027s size. In this case, the\nlower part of the chip (from BBAR aligned down, up to BBAR) is inacces-\nsible (this seems to be the original intend behind BBAR) and has to be\nleft out in the address offset calculation.\n\nChange-Id: Icbac513c5339e8aff624870252133284ef85ab73\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/22396\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "9912718de18e455e16d26458aca4eac37f792aa2", "tree": "d447b47feb1d0f497c17ab6941e0b4c9afbed5cb", "parents": [ "b1f88360fc806ee69d7cf1b9404b3977bc53aace" ], "author": { "name": "Boris Baykov", "email": "dev@borisbaykov.com", "time": "Sat Jun 11 18:29:00 2016 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 15 12:30:26 2017 +0000" }, "message": "4BA: Flashrom integration for the 4-bytes addressing extensions\n\nThis patch integrates code of the previous patch into Flashrom\u0027s code.\nAll the integrations is around 3 functions spi_nbyte_read, spi_nbyte_program\nand spi_byte_program. After this patch then are not static and can be called\nby their pointers saved in flashchips array. Also I added to flashrom.c some\ncode to switch a chip to 4-bytes addressing mode. And one error message is\ncorrected in spi.c because it\u0027s not suitable for 32-bit addresses.\n\nPatched files\n-------------\nflash.h\n+ added set of 4-bytes address functions to flashchip structure definition\n\nflashrom.c\n+ added switch to 4-bytes addressing more for chips which support it\n\nserprog.c\n+ added 4-bytes addressing spi_nbyte_read call to serprog_spi_read\n\nspi.c\n+ fixed flash chip size check in spi_chip_read\n\nspi25.c\n+ added 4-bytes addressing spi_nbyte_read call to spi_read_chunked\n+ added 4-bytes addressing spi_nbyte_program call to spi_write_chunked\n+ added 4-bytes addressing spi_byte_program call to spi_chip_write_1\n\nConflicts:\n\tserprog.c\n\nChange-Id: Ib051cfc93bd4aa7580519e0e6206d025f3ca8049\nSigned-off-by: Boris Baykov \u003cdev@borisbaykov.com\u003e, Russia, Jan 2014\n[clg: ported from\n https://www.flashrom.org/pipermail/flashrom/2015-January/013205.html ]\nSigned-off-by: Cédric Le Goater \u003cclg@kaod.org\u003e\nReviewed-on: https://review.coreboot.org/20505\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "a5bcbceb581f27cfc0055369d3dd9cfd1ae00bfa", "tree": "5daecd880a16b7011be28e064fb7550f3e6b7e58", "parents": [ "82b6ec1df30d3fca55547f230c76718d6e613b2a" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jul 19 22:03:29 2014 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jul 19 22:03:29 2014 +0000" }, "message": "Rename programmer registration functions\n\nRegister_programmer suggests that we register a programmer. However,\nthat function registers a master for a given bus type, and a programmer\nmay support multiple masters (e.g. SPI, FWH). Rename a few other\nfunctions to be more consistent.\n\nCorresponding to flashrom svn r1831.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n" }, { "commit": "f20b7beff054eb316088d590094d9efbc68dbee1", "tree": "6324be451385c9f9cea27381f35f300fbaa7f454", "parents": [ "20da4aa82cc11f25a6a4a52fd2bed219e6e1d829" ], "author": { "name": "Mark Marshall", "email": "mark.marshall@omicron.at", "time": "Fri May 09 21:16:21 2014 +0000" }, "committer": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Fri May 09 21:16:21 2014 +0000" }, "message": "Add \u0027const\u0027 keyword to chip write and other function prototypes\n\nCorresponding to flashrom svn r1789.\n\nInspired by and mostly based on a patch\nSigned-off-by: Mark Marshall \u003cmark.marshall@omicron.at\u003e\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n" }, { "commit": "eb58257b9650b9191d8b987e0b214fed1ad2b77a", "tree": "8e37e169514dfba6083cc6f8c18943e69b81e9a4", "parents": [ "3c0fcd0f30f2b3c0df57b66e645859d923e68d16" ], "author": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Fri Sep 21 12:52:50 2012 +0000" }, "committer": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Fri Sep 21 12:52:50 2012 +0000" }, "message": "Add a bunch of new/tested stuff and various small changes 14\n\nTested Mainboards:\nOK:\n - ASUS M3A78-EH\n http://www.flashrom.org/pipermail/flashrom/2010-October/005297.html\n - ASUS P2B-LS\n http://www.flashrom.org/pipermail/flashrom/2010-November/005506.html\n - Biostar TA790GX A3+\n http://paste.flashrom.org/view.php?id\u003d1350\n - ECS 848P-A7\n http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html\n - GIGABYTE GA-G41MT-S2PT\n Reported on IRC\n - GIGABYTE GA-H77-D3H\n Reported and tested by Alexander Gordeev on IRC.\n - Gigabyte GA-X79-UD5\n http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html\n - Shuttle FN78S\n http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html\n - VIA EITX-3000\n Reported on IRC by Tuju\n\nNOT OK:\n - Dell PowerEdge C6220 (0HYFFG)\n http://www.flashrom.org/pipermail/flashrom/2012-September/009900.html\n - Foxconn Q45M\n http://www.flashrom.org/pipermail/flashrom/2012-September/009923.html\n - MSI MS-7309 (K9N6SGM-V)\n http://www.flashrom.org/pipermail/flashrom/2012-August/009712.html\n - Supermicro X9QRi-F+\n http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html\n - ZOTAC H61-ITX WiFi (H61ITX-A-E)\n http://www.flashrom.org/pipermail/flashrom/2012-August/009649.html\n\nASUS CUSL2-C has been tested to be working with the board enable once\nimplemented for the TUSL2-C board. They seem to have the same PCI IDs\nas shown in the links below. Since only the CUSL2-C board enable has been\ntested yet, we distinguish the two by DMI strings.\nhttp://paste.flashrom.org/view.php?id\u003d1393\nhttp://www.flashrom.org/pipermail/flashrom/attachments/20091206/ddca2c6c/attachment-0002.eml\n\nTested flash chips:\n - Set EMST F25L008A to PREW (+PREW)\n http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html\n - Set GigaDevice GD25Q64 to PREW (+PREW)\n http://git.chromium.org/gitweb/?p\u003dchromiumos/third_party/flashrom.git;a\u003dcommit;h\u003d9e8ef49b1f626c2197e131fba6c5b65c8af4eeea\n - Set Macronix MX25L12805 to P (+P)\n http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html\n - Set SST SST49LF003A/B to PREW (+EW)\n http://paste.flashrom.org/view.php?id\u003d467\n - Set Winbond W49V002FA to PREW (+EW)\n http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html\n\nTested chipsets:\n - Intel X79 (0x1d41)\n http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html\n\nBoard enables:\n - add ASUS P4P800-X\n Created by Idwer Vollering and tested by Mingsen Bao:\n http://paste.flashrom.org/view.php?id\u003d467\n - add DMI string to P4P800-VM\n\nMiscellaneous:\n - Add remaining Intel 7 series chipset (LPC) PCI IDs\n - Add generic SPI detection for chips from Winbond\n - Minor manpage changes\n - Minor other cleanups\n - Escape full stops after abbreviations in the manpage.\n - Add ICH9 and successors to spi_get_valid_read_addr\n\nCorresponding to flashrom svn r1601.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n" }, { "commit": "5a7cb847f096dacb0bf96b3aa909f79d76ae8204", "tree": "da511e990c1fdded61ee5dcefae38314c3a5a6cc", "parents": [ "dd73d830f7370b5f0bbdaa0780b0ff8d6ff1776a" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Aug 25 01:17:58 2012 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Aug 25 01:17:58 2012 +0000" }, "message": "Make struct flashchip a field in struct flashctx instead of a complete copy\n\nAll the driver conversion work and cleanup has been done by Stefan.\nflashrom.c and cli_classic.c are a joint work of Stefan and Carl-Daniel.\n\nCorresponding to flashrom svn r1579.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "7bca126561b80f626dea269d7a6284a7cde0a8ed", "tree": "45c6b31e39846a88d89d157d758134d7b8dc1db1", "parents": [ "3464d05eb41ab4c7a6faba9a1a36bfbeda0de850" ], "author": { "name": "Nico Huber", "email": "nico.huber@secunet.com", "time": "Fri Jun 15 22:28:12 2012 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Jun 15 22:28:12 2012 +0000" }, "message": "Let the programmer driver decide how to do AAI transfers\n\nCurrently spi_aai_write() is implemented without an abstraction\nmechanism for the programmer driver. This adds another function\npointer \u0027write_aai\u0027 to struct spi_programmer, which is set to\ndefault_spi_write_aai (renamed spi_aai_write) for all programmers\nfor now.\n\nA patch which utilises this abstraction in the dediprog driver will\nfollow.\n\nCorresponding to flashrom svn r1543.\n\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "c40cff7b86848f5b248d7fcf20f7d517b60c385d", "tree": "7f9db61c7b4868e513c4702cfe57bb35ae695266", "parents": [ "8a3c60cdd0e5632173567923ae1927763e31e857" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Dec 20 00:19:29 2011 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Dec 20 00:19:29 2011 +0000" }, "message": "Have all programmer init functions register bus masters/programmers\n\nAll programmer types (Parallel, SPI, Opaque) now register themselves\ninto a generic programmer list and probing is now programmer-centric\ninstead of chip-centric.\nRegistering multiple SPI/... masters at the same time is now possible\nwithout any problems. Handling multiple flash chips is still unchanged,\nbut now we have the infrastructure to deal with \"dual BIOS\" and \"one\nflash behind southbridge and one flash behind EC\" sanely.\n\nA nice side effect is that this patch kills quite a few global variables\nand improves the situation for libflashrom.\n\nHint for developers:\nstruct {spi,par,opaque}_programmer now have a void *data pointer to\nstore any additional programmer-specific data, e.g. hardware\nconfiguration info.\n\nNote:\nflashrom -f -c FOO -r forced_read.bin\ndoes not work anymore. We have to find an architecturally clean way to\nsolve this.\n\nCorresponding to flashrom svn r1475.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Michael Karcher \u003cflashrom@mkarcher.dialup.fu-berlin.de\u003e\n" }, { "commit": "8a3c60cdd0e5632173567923ae1927763e31e857", "tree": "3a5514d022392cf4d8fa368f9f02653da21a93ca", "parents": [ "63fd9026f1e82b67a65072fda862ba7af35839e1" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Dec 18 15:01:24 2011 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Dec 18 15:01:24 2011 +0000" }, "message": "Add struct flashctx * parameter to all functions accessing flash chips\n\nAll programmer access function prototypes except init have been made\nstatic and moved to the respective file.\n\nA few internal functions in flash chip drivers had chipaddr parameters\nwhich are no longer needed.\n\nThe lines touched by flashctx changes have been adjusted to 80 columns\nexcept in header files.\n\nCorresponding to flashrom svn r1474.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Michael Karcher \u003cflashrom@mkarcher.dialup.fu-berlin.de\u003e\n" }, { "commit": "63fd9026f1e82b67a65072fda862ba7af35839e1", "tree": "7d9ffba077715cf9e75c9f4a36d0d7f11a3181f6", "parents": [ "83c92e983aaf11fb6f5bafb6744275c50add193c" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Dec 14 22:25:15 2011 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Dec 14 22:25:15 2011 +0000" }, "message": "Use struct flashctx instead of struct flashchip for flash chip access\n\nStruct flashchip is used only for the flashchips array and for\noperations which do not access hardware, e.g. printing a list of\nsupported flash chips.\n\nstruct flashctx (flash context) contains all data available in\nstruct flashchip, but it also contains runtime information like\nmapping addresses. struct flashctx is expected to grow additional\nmembers over time, a prime candidate being programmer info.\nstruct flashctx contains all of struct flashchip with identical\nmember layout, but struct flashctx has additional members at the end.\n\nThe separation between struct flashchip/flashctx shrinks the memory\nrequirement of the big flashchips array and allows future extension\nof flashctx without having to worry about bloat.\n\nCorresponding to flashrom svn r1473.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Michael Karcher \u003cflashrom@mkarcher.dialup.fu-berlin.de\u003e\n" }, { "commit": "c69c9c84e0341b701d9966fea8ce54d4e017bbb7", "tree": "2ea0b12abf9dd3483246423752239b88c6d7942e", "parents": [ "8ca4255d7968dbf6301367074cc7267d22a25658" ], "author": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Wed Nov 23 09:13:48 2011 +0000" }, "committer": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Wed Nov 23 09:13:48 2011 +0000" }, "message": "Unsignify lengths and addresses in chip functions and structs\n\nPush those changes forward where needed to prevent new sign\nconversion warnings where possible.\n\nCorresponding to flashrom svn r1470.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "8c35745fcf3ed6eb2769beda0c8b941df07f6175", "tree": "2f3c43a3589edc55e7143b39d40df4a0cd039183", "parents": [ "e3185c0599d77c06b9665c9721649b96108c894f" ], "author": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Sun Sep 18 22:42:18 2011 +0000" }, "committer": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Sun Sep 18 22:42:18 2011 +0000" }, "message": "Revert \"Unsignify lengths and addresses in chip functions and structs\"\n\n- probe_timing was changed to unsigned although we use negative values\n for special cases\n- some code was not changed along hence did no longer compile:\n * dediprog\u0027s read and write functions\n * linux_spi\u0027s read and write functions\n- it introduced a number of new sign conversion warnings\n (http://paste.flashrom.org/view.php?id\u003d832)\n\nTo be safe this patch reverts all changes made in r1448, a corrected\npatch will follow later.\n\nThanks to idwer for pointing out the problem first!\n\nCorresponding to flashrom svn r1450.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n" }, { "commit": "d196e7c1387b30ac35e7b0f605c79823ac9b5ec9", "tree": "e0f40df44cb94c62f150a84080bf7171f8623aa8", "parents": [ "75da80c17bbb992ce2b60ae15ef2fba7d23bfd8e" ], "author": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Sun Sep 18 00:41:33 2011 +0000" }, "committer": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Sun Sep 18 00:41:33 2011 +0000" }, "message": "Unsignify lengths and addresses in chip functions and structs\n\nCorresponding to flashrom svn r1448.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "1a227954f2c7d0a25d42bcea2ea0b901ceb0f464", "tree": "ff9f4d8bbe04e1e80755b43b36b990b74d6845b3", "parents": [ "4deb8c6a7ad0d4290cb7272a11da94139019c6ae" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 27 07:13:06 2011 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 27 07:13:06 2011 +0000" }, "message": "Rename CHIP_BUSTYPE_FOO to BUS_FOO\n\nIt\u0027s shorter to type, and we have less problems with the 80 column limit.\n\nCorresponding to flashrom svn r1396.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "93f7023e16c8bd6f16ad02d4f2027669e5c90285", "tree": "3eb592d1a3c6cac53aa9856cfaa7d2a70371fcc5", "parents": [ "84d1968250ecf9df18b2d456530f76b8984edf6b" ], "author": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Tue Jul 26 14:33:46 2011 +0000" }, "committer": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Tue Jul 26 14:33:46 2011 +0000" }, "message": "Add a bunch of new/tested stuff and various small changes 6\n\n- add J-7BXAN to the list of supported boards\n http://www.flashrom.org/pipermail/flashrom/2011-July/007397.html\n\n- fix urls, typos, whitespace etc.\n\n- fix counting of supported chips in the wiki output\n\nCorresponding to flashrom svn r1393.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nthe last one is\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\neverything else is\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n" }, { "commit": "b9dbe48b77384e2faf0619161fc5c55afe388ea9", "tree": "8b556f82073e824bc1e9a4cc9547d67b1d902cee", "parents": [ "627975196d0630a137548df631756e656a8139af" ], "author": { "name": "Michael Karcher", "email": "flashrom@mkarcher.dialup.fu-berlin.de", "time": "Wed May 11 17:07:07 2011 +0000" }, "committer": { "name": "Michael Karcher", "email": "flashrom@mkarcher.dialup.fu-berlin.de", "time": "Wed May 11 17:07:07 2011 +0000" }, "message": "Kill central list of SPI programmers\n\nRemove the array spi_programmer, replace it by dynamic registration\ninstead. Also initially start with no busses supported, and switch to\nthe default non-SPI only for the internal programmer.\n\nAlso this patch changes the initialization for the buses_supported variable\nfrom \"everything-except-SPI\" to \"nothing\". All programmers have to set the\nbus type on their own, and this enables register_spi_programmer to just add\nthe SPI both for on-board SPI interfaces (where the internal programmer\nalready detected the other bus types), as well as for external programmers\n(where we have the default \"none\").\n\nCorresponding to flashrom svn r1299.\n\nSigned-off-by: Michael Karcher \u003cflashrom@mkarcher.dialup.fu-berlin.de\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "627975196d0630a137548df631756e656a8139af", "tree": "9a01302678ba2ba642040e928b89c8877c080412", "parents": [ "b713d2e35c5336da81f5fbc83393961d1d8aa7bd" ], "author": { "name": "Michael Karcher", "email": "flashrom@mkarcher.dialup.fu-berlin.de", "time": "Wed May 11 17:07:02 2011 +0000" }, "committer": { "name": "Michael Karcher", "email": "flashrom@mkarcher.dialup.fu-berlin.de", "time": "Wed May 11 17:07:02 2011 +0000" }, "message": "Factor out SPI write/read chunking wrappers\n\nCorresponding to flashrom svn r1298.\n\nSigned-off-by: Michael Karcher \u003cflashrom@mkarcher.dialup.fu-berlin.de\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "97bc95ce2be4e17db150a83098673cedf5b50b40", "tree": "726389fc8d2e3875645d8a3774f9899c4009faf0", "parents": [ "7f517a710308133fd33f2fd9e10fa4e8c6a190e5" ], "author": { "name": "Patrick Georgi", "email": "patrick.georgi@secunet.com", "time": "Tue Mar 08 07:17:44 2011 +0000" }, "committer": { "name": "Patrick Georgi", "email": "pgeorgi@google.com", "time": "Tue Mar 08 07:17:44 2011 +0000" }, "message": "Fix and improve libpayload platform support\n\n- Fix various minor compile issues (eg. include necessary standard headers)\n- Fix compilation of libpayload code paths\n- Provide libpayload support in Makefile\n- Add make target \"libflashrom.a\" which links non-CLI code to static\n library\n\nCorresponding to flashrom svn r1280.\n\nSigned-off-by: Patrick Georgi \u003cpatrick.georgi@secunet.com\u003e\nTested-with-DOS-crosscompiler-by: Idwer Vollering \u003cvidwer@gmail.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "7f517a710308133fd33f2fd9e10fa4e8c6a190e5", "tree": "8881584a476cc76b2e91ce92752029952b8e1f41", "parents": [ "d95355880a66fcbdb056031425288d29a9e6691f" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Mar 08 00:23:49 2011 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Mar 08 00:23:49 2011 +0000" }, "message": "Various IT85* cleanups and fixes\n\nFix a few typos.\nChange the EC memory region mapping name.\nDrop unused function parameter.\nUse mmio_writeb()/mmio_readb() to get reliable access to volatile memory\nlocations instead of plain pointer access which is optimized away by gcc.\nUse own it85_* SPI high-level chip read/write functions instead of\nrelying on unrelated ICH functions.\n\nCorresponding to flashrom svn r1279.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n\nDavid writes:\nI applied the patch against the Chromium OS branch and\nsuccessfully tested read and write operations on a Cr48.\n\nAcked-by: David Hendricks \u003cdhendrix@google.com\u003e\n" }, { "commit": "4e7483964676edb8e05bb6c6d52aca8d011f0bc5", "tree": "772e8f4d0f2fd14940dbc78934f8911eca963a56", "parents": [ "44ebb04f9f23b51b441011e2767cde7bd8038038" ], "author": { "name": "David Hendricks", "email": "dhendrix@google.com", "time": "Mon Feb 28 23:58:15 2011 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Feb 28 23:58:15 2011 +0000" }, "message": "Update the ITE IT8500 EC support to match the current state of the flashrom-chromium tree\n\nThis code has been deployed and tested to work on the Cr-48.\nThere are a few caveats, though:\n- The boot BIOS straps register must be modified to select LPC. This\n can be done with the \"select_bbs.sh\" script (Install iotools at\n http://code.google.com/p/iotools/ before using select_bbs).\n- It is very important to disable power management daemons before\n running flashrom on this EC. I commented out the brute force method\n we use in the Chromium OS branch that disables powerd, since IIRC\n Carl-Daniel has a better approach in the works.\n- Due to dependencies which may be introduced by the OEM/ODM EC\n firmware, the code is not guaranteed to work for anything other than\n the Cr-48.\n\nCorresponding to flashrom svn r1263.\n\nSigned-off-by: David Hendricks \u003cdhendrix@google.com\u003e\n\nCarl-Daniel comments:\nCode is not hooked up yet because probing needs to be sorted out.\n\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "90021f28ff6cb97c53aeb18667addefb43c706e3", "tree": "7ec04388c7b9dbb9796953d6616b855bf451d341", "parents": [ "859f3f0d751e92ec99c79408a4a7789bfb61a514" ], "author": { "name": "Mark Marshall", "email": "mark.marshall@csr.com", "time": "Fri Dec 03 14:48:11 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Dec 03 14:48:11 2010 +0000" }, "message": "Add support for the Open Graphics Project development card, OGD1, as a SPI flash programmer\n\nThe project is in the the process of designing and making a complete,\nopen source, graphics card. More info at http://wiki.opengraphics.org.\n\nThe first development card is a PCI add in card containing a couple of\nFPGAs and a couple of serial flash chips (amongst other things). The\nFPGAs are called XP10 and S3 (their part numbers). The XP10 contains its\nown flash and does not need to be programmed by flashrom - it ensures\nthat the device can enumerate on the PCI bus without needing further\nconfiguration.\n\nThe larger FPGA is the S3. This is configured from a large SPI flash\n(2 MBytes). The second SPI flash is used to store the VGA BIOS. It is\nsmaller (128 KBytes). This patch adds support for programming either of\nthe two SPI flash chips.\n\nThe programmer device takes one configuration option which selects which\nof the two flash chips is accessed. This must be set to either \"cprom\"\nor \"bprom\". (The project refers to the two chips as \"cprom\" / \"bprom\",\n\"s3\" and \"bios\" are more readable alternatives).\n\nAdd support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested\nfor write.\n\nCorresponding to flashrom svn r1241.\n\nSigned-off-by: Mark Marshall \u003cmark.marshall@csr.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "306b81875dc8c16b230f9b01f37138aa4768d116", "tree": "25a7b11b90f5f98c0638387d606c6680d0f71e5c", "parents": [ "482e97443dac5158b6bf48af1b7636a9388debf6" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 23 21:28:16 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 23 21:28:16 2010 +0000" }, "message": "Add chunked write ability to the Dediprog SF100 driver\n\nPlease note that the write speedup only applies to chips which have SPI\npage write (i.e. chips using spi_chip_write_256).\n\nThis is a quick fix for write speed until I get around to implementing\nfull bulk SPI write support.\n\nCorresponding to flashrom svn r1235.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Richard A. Smith \u003crichard@laptop.org\u003e\nAcked-by: Mathias Krause \u003cmathias.krause@secunet.com\u003e\n" }, { "commit": "75a58f94cc641e8051169ec6bb9894a390a8e2bf", "tree": "eb3c0573cecfe70ded0b96003dc6f4d5e55975d4", "parents": [ "79e6757d269b91ee759bd569df7093225f4f3715" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Oct 13 22:26:56 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Oct 13 22:26:56 2010 +0000" }, "message": "Switch all flash chips to partial write\n\nThe inner write functions which handle partial write are renamed to the\noriginal name of their wrappers. The write wrappers are removed.\n\nCorresponding to flashrom svn r1211.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nTested-by: Maciej Pijanka \u003cmaciej.pijanka@gmail.com\u003e\nTested-by: Andrew Morgan \u003cziltro@ziltro.com\u003e\nTested-by: Idwer Vollering \u003cvidwer@gmail.com\u003e\nAcked-by: Idwer Vollering \u003cvidwer@gmail.com\u003e\nTested-by: Sean Nelson \u003caudiohacked@gmail.com\u003e \nAcked-by: Sean Nelson \u003caudiohacked@gmail.com\u003e \n" }, { "commit": "f52f784bb300ec0acbd6c6bd9e6c3e5b435c4a90", "tree": "957964a468245432abbd23cd06839898b64105ce", "parents": [ "92c8b0cec2ed06db9c24c4d93cf38a596edf23ab" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Oct 08 18:52:29 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Oct 08 18:52:29 2010 +0000" }, "message": "Move implicit erase out of chip drivers\n\nFlashrom had an implicit erase-on-write for most flash chip and\nprogrammer drivers, but it was not entirely consistent.\n\nSome drivers had their own hand-rolled partial update functionality\nwhich made handling partial updates from generic code impossible.\n\nMove implicit erase out of chip drivers, and kill some dead erase\nfunctions at the same time. A full chip erase is now performed in the\ngeneric code for all flash chips on write, and after that the whole chip\nis written.\n\nCorresponding to flashrom svn r1206.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "ec489e4ec65ec416a6c41ded6d5eae0b6ebd7103", "tree": "096c8eb5101ada5ba8b098baf30060a20f471512", "parents": [ "9a87c5d6ad41f7c1512ad9f2a2f0ee60213fbef0" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Sep 15 00:13:02 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Sep 15 00:13:02 2010 +0000" }, "message": "Honor ICH SPI address window for reads\n\nICH SPI has the ability to restrict SPI read/write accesses to a given\naddress range. The low end of the range is configurable by the BIOS (and\nby flashrom if the BIOS didn\u0027t lock down the flash interface), the high\nend of the range is 0xffffff (2^24-1).\nThis patch checks for an address range restriction and uses the low end\nof the allowed range as base for SPI reads. A similar workaround for\nREMS/RES opcodes has been committed in r500.\n\nThis fixes read on the Intel D945GCLF mainboard where the stock BIOS\nenforces a restricted address range.\nPlease note that writes need the same fix, but for architectural reasons\nthat fix will be merged once partial write is available.\n\nCorresponding to flashrom svn r1170.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n\nTested by David Hendricks on the Intel D945GCLF mainboard, results at\nhttp://paste.flashrom.org/view.php?id\u003d79\n\nAcked-by: David Hendricks \u003cdhendrix@google.com\u003e\n" }, { "commit": "004f4b7954aebedff506119a12a752be9e4e9334", "tree": "b0e94febe10eba982ee3b5c227c33748ba374615", "parents": [ "67db2eb92c3f4858528d19e7921b08c5ec6dbdc9" ], "author": { "name": "Idwer Vollering", "email": "vidwer@gmail.com", "time": "Fri Sep 03 18:21:21 2010 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Fri Sep 03 18:21:21 2010 +0000" }, "message": "Add Intel Gigabit NIC SPI flashing support\n\nTested on a 82541PI (0x8086, 0x107c) using 32-bit hardware.\n\nThe last line in nicintel_request_spibus() could be changed so that FL_BUSY\nis used instead.\n\nShortened sample log:\n[...]\nFound \"Intel 82541PI Gigabit Ethernet Controller\" (8086:107c, BDF 01:03.0).\nFound chip \"ST M25P10.RES\" (128 KB, SPI) at physical address 0xfffe0000.\nMultiple flash chips were detected: M25P05.RES M25P10.RES\nPlease specify which chip to use with the -c \u003cchipname\u003e option.\n[...]\n\nCorresponding to flashrom svn r1151.\n\nSigned-off-by: Idwer Vollering \u003cvidwer@gmail.com\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "fd7075ae75c04df49f61a7617e772c54e0b4984d", "tree": "c95adc0c593268590615032f0d297e7190bcf2a7", "parents": [ "f792c7d4cb43e8c34719e015f20e8049579e34af" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jul 29 13:09:18 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jul 29 13:09:18 2010 +0000" }, "message": "Add detailed status register printing and unlocking for all ATMEL AT25* chips\n\nAdd support for Atmel AT25DF081A and AT25DQ161.\n\nSome chips require EWSR before WRSR, others require WREN before WRSR,\nand some support both variants. Add feature_bits to select the correct\nSPI command, and default to EWSR.\n\nCorresponding to flashrom svn r1115.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nTested-by: Steven Rosario\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "2f43616873dd88cd417017dc5bc218b3e10deb0d", "tree": "aeb262cf0a555f42e00890c5907e8ac6f537a4b4", "parents": [ "5b997c3ed66ddbbb9470f27d4e27ab4c263bc9cf" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 28 15:08:35 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 28 15:08:35 2010 +0000" }, "message": "Add Nvidia nForce MCP61/MCP65/MCP67/MCP78S/MCP73/MCP79 SPI flashing support\n\nHuge thanks go to Michael Karcher for reverse engineering the interface\nand to Johannes Sjölund for testing the first iterations of my patch on\nhis hardware until it worked.\n\nThanks to the following testers of the patch:\n* MCP61, 10de:03e0, LPC OK, ECS Geforce6100SM-M, Andrew Cleveland\n* MCP61, 10de:03e0, LPC OK, Biostar NF520-A2 NF61D-A2, Vitaliy Buchynskyy\n* MCP65, 10de:0441, SPI OK, MSI MS-7369 K9N Neo-F v2, Kjell Braden\n* MCP65, 10de:0441, SPI OK, MSI MS-7369, Wolfgang Schnitker\n* MCP65, 10de:0441, SPI OK, MSI MS-7369, Johannes Sjölund\n* MCP65, 10de:0441, SPI OK, MSI MS-7369, Melchior Franz\n* MCP78S, 10de:075c, SPI OK, Asus M3N78 PRO, Brad Rogers\n* MCP78S, 10de:075c, SPI OK, Asus M3N78-VM, Marcel Partap\n* MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Kimmo Vuorinen\n* MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Vikram Ambrose\n* MCP79, 10de:0aad, SPI OK, Acer Aspire R3600, Andrew Morgan\n* MCP79, 10de:0aae, LPC ??, Lenovo Ideapad S12 laptop, Christian Schmitt\n* MCP79, 10de:0aae, SPI OK, Apple iMac9,1 Mac-F2218EA9, David \"dledson\"\n\nflashrom will refuse to write/erase for safety reasons if MCP6x/MCP7x\nSPI is detected.\n\nCorresponding to flashrom svn r1113.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "5b997c3ed66ddbbb9470f27d4e27ab4c263bc9cf", "tree": "adbaace5de6bb0d97a58143c7e3ae775a15d47ff", "parents": [ "1d3a2fefbc636fb569bd1d018fb97b1b17c08e99" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Jul 27 22:41:39 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Jul 27 22:41:39 2010 +0000" }, "message": "Split off programmer.h from flash.h\n\nProgrammer specific functions are of absolutely no interest to any file\nexcept those dealing with programmer specific actions (special SPI\ncommands and the generic core).\n\nThe new header structure is as follows (and yes, improvements are\npossible):\nflashchips.h flash chip IDs\nchipdrivers.h chip-specific read/write/... functions\nflash.h common header for all stuff that doesn\u0027t fit elsewhere\nhwaccess.h hardware access functions\nprogrammer.h programmer specific functions\ncoreboot_tables.h header from coreboot, internal programmer only\nspi.h SPI command definitions\n\nCorresponding to flashrom svn r1112.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "e7fdd6e9a17129da53b8f4104b58899b5a011458", "tree": "0bd5bf090f36ef8f444d37e5bf4f2238345ac617", "parents": [ "17e23ac9798e5e983232c42314d7affb2994925e" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 21 10:26:01 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 21 10:26:01 2010 +0000" }, "message": "Add support for RayeR SPIPGM hardware as described in http://rayer.ic.cz/elektro/spipgm.htm\n\nTo use the RayeR driver, run\nflashrom -p rayer_spi -V\n\nKnown bugs/limitations:\n- Won\u0027t compile/work on non-x86 architectures.\n- Will always use direct port I/O access.\n\nLog follows:\n\nflashrom v0.9.2-r1039 on MS-DOS 7 (i686), built with libpci 3.1.5, GCC \n4.3.2, little endian\nCalibrating delay loop... OK.\nInitializing rayer_bitbang_spi programmer\nUsing port 0x378 as I/O base for parallel port access.\n...\nProbing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 \n0xc2, id2 0x2015\n...\nFound chip \"Macronix MX25L1605\" (2048 KB, SPI) at physical address \n0xffe00000.\n...\nNo operations were specified.\n\nCorresponding to flashrom svn r1093.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Martin Rehak \u003crayer@seznam.cz\u003e\nAcked-by: Michael Karcher \u003cflashrom@mkarcher.dialup.fu-berlin.de\u003e\n" }, { "commit": "29a1c66a23bc8685f456d548361b735bf36dcf2b", "tree": "963d487fa71ce4b6ad998d89fde9e167ce11e6bb", "parents": [ "ca812d40d461e70a70df6079978e96642775e7b2" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 14 20:21:22 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 14 20:21:22 2010 +0000" }, "message": "Use generic unlocking infrastructure for SPI chips\n\nActually check if the unlock worked instead of just assuming it worked.\n\nCorresponding to flashrom svn r1082.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Michael Karcher \u003cflashrom@mkarcher.dialup.fu-berlin.de\u003e\n" }, { "commit": "ca812d40d461e70a70df6079978e96642775e7b2", "tree": "2de588625302d190884e05aca9755f4f075ab2a4", "parents": [ "9a795d83fbb8842a271d5e037dc983a57b0419fd" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 14 19:57:52 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 14 19:57:52 2010 +0000" }, "message": "Use the max_rom_decode infrastructure for wbsio_spi\n\nUse this instead of the open-coding variant that only aborts after it is too late.\n\nCorresponding to flashrom svn r1081.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Michael Karcher \u003cflashrom@mkarcher.dialup.fu-berlin.de\u003e\n" }, { "commit": "9a795d83fbb8842a271d5e037dc983a57b0419fd", "tree": "a9049f708d0ab7d42d122fecd23855aaa819c5bc", "parents": [ "1748c5701f77ab7164ab3311f37abc356d825ccb" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 14 16:19:05 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 14 16:19:05 2010 +0000" }, "message": "Convert SPI chips to partial write\n\nHowever, wrap the write functions in a compat layer to allow converting\nthe rest of flashrom later. Tested on Intel NM10 by David Hendricks.\n\nCorresponding to flashrom svn r1080.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Michael Karcher \u003cflashrom@mkarcher.dialup.fu-berlin.de\u003e\n" }, { "commit": "ad3cc55e139b2e239325815464fe5f7d828aa794", "tree": "46568cf766d19740418be5ca8eaa494c7e69cc36", "parents": [ "b63b067ae22803689592db482611093b33a29eef" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jul 03 11:02:10 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jul 03 11:02:10 2010 +0000" }, "message": "Kill global variables, constants and functions if local scope suffices\n\nConstify variables where possible.\nInitialize programmer-related variables explicitly in programmer_init to\nallow running programmer_init from a clean state after\nprogrammer_shutdown.\nProhibit registering programmer shutdown functions before init or after\nshutdown.\nKill some dead code.\nRename global variables with namespace-polluting names.\nUse a previously unused locking helper function in sst49lfxxxc.c.\n\nThis is needed for libflashrom.\n\nEffects on the binary size of flashrom are minimal (300 bytes\nshrinkage), but the data section shrinks by 4384 bytes, and that\u0027s a\ngood thing if flashrom is operating in constrained envionments.\n\nCorresponding to flashrom svn r1068.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Michael Karcher \u003cflashrom@mkarcher.dialup.fu-berlin.de\u003e\n" }, { "commit": "1b0ba893529cf93ae54b91607d93d3ad49c259e5", "tree": "af751b638928cfed22ad9411d0cb7169fe9feef8", "parents": [ "9c62d11d55a492f59781874cb74ce84f8dde1bfc" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Jun 20 10:58:32 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Jun 20 10:58:32 2010 +0000" }, "message": "Add SPI chip read support to the dummy flasher\n\nThis allows using the dummy flasher for SPI read debugging.\n\nCorresponding to flashrom svn r1053.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Sean Nelson \u003caudiohacked@gmail.com\u003e\n" }, { "commit": "8ae500e09dc4c55d0a8e39b6f751ca476afd21c4", "tree": "41d248006fe015d9b382728a9defb987427611e3", "parents": [ "80a59ea2d56c57490692ba76fc1b5dc71a2dc97a" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Jun 20 10:39:33 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Jun 20 10:39:33 2010 +0000" }, "message": "Fix message printing for SPI RES on spew level\n\nUse a blacklist instead of a whitelist for 4-byte SPI RDID.\nTell users where to report bugs.\n\nCorresponding to flashrom svn r1051.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Sean Nelson \u003caudiohacked@gmail.com\u003e\n" }, { "commit": "71127727dcff4f7e70b318d7a5eb87f0c8fcc4d7", "tree": "ecd2ba9f67c51b833d22051628b79ccb1dcde0a2", "parents": [ "a0020df6309e4536fcb97bd93bc46e2068f0ffe8" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon May 31 15:27:27 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon May 31 15:27:27 2010 +0000" }, "message": "So far, we have up to 4 different names for the same thing (ignoring capitalization)\n\nCONFIG_FT2232SPI (makefile config option)\nFT2232_SPI_SUPPORT (#define)\nft2232spi (programmer name)\nft2232_spi.c (programmer file)\n\nUse CONFIG_* with underscores for makefile config options and #defines\nand kill the useless _SUPPORT idiom.\nUse lowercase names with underscores for programmer names and programmer\nfiles.\n\nWith this, you can run \"grep -i ft2232_spi\" and find everything related\nto the ft2232_spi driver. Same applies to all other programmers.\n\nCorresponding to flashrom svn r1023.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "831e8f4abb29f1ff66ebb8ab5ff496050ff677f7", "tree": "8d19ef4871587dcaf0a3a1dec562dd6ef09024b6", "parents": [ "4178760241c3b3dc46a806ee3621a2eb97f4cca5" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun May 30 22:24:40 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun May 30 22:24:40 2010 +0000" }, "message": "Remove unneeded #include statements completely\n\nUnistd.h was only used to get a definition of NULL in all files. Add our\nown NULL #define and remove unistd.h from flash.h\nstdio.h has no place in flash.h, it should be included only in files\nwhich really need it.\nAdd #include statements in individual .c files where needed.\n\nReplace a few printf with msg_* to eliminate the need for stdio.h.\n\nCorresponding to flashrom svn r1021.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n" }, { "commit": "80f3d05e7356ec85f9ea27ae2e11245e0b6bb3c6", "tree": "3a8deb77453a25d539577a7bfe50aa2bf98682f6", "parents": [ "4073c09556e4fd75fa58102b24b1b6e3aabbe124" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri May 28 15:53:08 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri May 28 15:53:08 2010 +0000" }, "message": "ichspi: try harder to conform to address restrictions\n\nICH SPI can enforce address restrictions for all accesses which take an\naddress (well, it could if the chipset implementation was not broken).\nSince exploiting the broken implementation is harder than conforming\nto the address restrictions wherever possible, conform to the address\nrestrictions instead. This patch eliminates a lot of transaction errors\npeople were seeing on chip probe.\n\nCorresponding to flashrom svn r1016.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "cceafa2ad073fe58b10b6f2317cbd36a63d7ccb5", "tree": "f07a19288da12246cf3da5d886be39915cfc59a5", "parents": [ "8d341b5ae774bdf8249c68944a77b72b7c4be640" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed May 26 01:45:41 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed May 26 01:45:41 2010 +0000" }, "message": "Handle the following architectures in generic flashrom code\n\n- x86/x86_64 (little endian)\n- PowerPC (big endian)\n- MIPS (big+little endian)\n\nNo changes to programmer specific code. This means any drivers with MMIO\naccess will _not_ suddenly start working on big endian systems, but with\nthis patch everything is in place to fix them.\n\nCompilation should work on all architectures listed above for all\ndrivers except nic3com and nicrealtek which require PCI Port IO which is\nx86-only for now.\n\nTo compile without nic3com and nicrealtek, run\nmake distclean\nmake CONFIG_NIC3COM\u003dno CONFIG_NICREALTEK\u003dno\n\nThanks to Misha Manulis for testing early versions of this patch on\nPowerPC (big endian) with the satasii programmer.\nThanks to Segher Boessenkool for design review and for helping out with\ncompiler tricks and pointing out that we need eieio on PowerPC.\nThanks to Vladimir Serbinenko for compile testing on MIPS (little\nendian) and PowerPC (big endian) and for runtime testing on MIPS (little\nendian).\nThanks to David Daney for compile testing on MIPS (big endian).\nThanks to Uwe Hermann for compile and runtime testing on x86_64.\n\nDO NOT RUN flashrom ON NON-X86 AFTER APPLYING THIS PATCH!\nThis patch only provides the infrastructure, but does not convert any\ndrivers, so flashrom will compile, but it won\u0027t do the right thing on\nnon-x86 platforms.\n\nCorresponding to flashrom svn r1013.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Misha Manulis \u003cmisha@manulis.com\u003e\nAcked-by: Vladimir \u0027phcoder/φ-coder\u0027 Serbinenko \u003cphcoder@gmail.com\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Segher Boessenkool \u003csegher@kernel.crashing.org\u003e\n" }, { "commit": "316a29f33f7b4f549097c102cf2e56a30d7e3cac", "tree": "544d1dea8706b7b9e3591f81eba8be45fc054ab8", "parents": [ "270237687a7f550e86c01548550f25b1d0a31d65" ], "author": { "name": "Sean Nelson", "email": "audiohacked@gmail.com", "time": "Fri May 07 20:09:04 2010 +0000" }, "committer": { "name": "Sean Nelson", "email": "audiohacked@gmail.com", "time": "Fri May 07 20:09:04 2010 +0000" }, "message": "Convert various prints to use msg_p* and msg_g* respectively\n\nConvert programmer print messages to msg_p* convert general print messages to msg_g* a few fixes as suggested by Carl-Daniel.\n\nCorresponding to flashrom svn r997.\n\nSigned-off-by: Sean Nelson \u003caudiohacked@gmail.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "408e47af32b06613576bff74c0f455fc00220d58", "tree": "df195f58fca631cc9e175305a8167b7249937f57", "parents": [ "50415d2e48a510e8799217805a6bd12e49606272" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Mar 22 03:30:58 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Mar 22 03:30:58 2010 +0000" }, "message": "Multibyte SPI write for the Bus Pirate\n\nCorresponding to flashrom svn r964.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Sean Nelson \u003caudiohacked@gmail.com\u003e\n" }, { "commit": "14ba6682e99273273be74b8e8681d0604b85e9b9", "tree": "cd0212ae1ffe83aaea0a5ca9f5e2be86615c471a", "parents": [ "cfa674fde7ee763844f82e38503cd997a3951197" ], "author": { "name": "Sean Nelson", "email": "audiohacked@gmail.com", "time": "Fri Feb 26 05:48:29 2010 +0000" }, "committer": { "name": "Sean Nelson", "email": "audiohacked@gmail.com", "time": "Fri Feb 26 05:48:29 2010 +0000" }, "message": "Split spi.c into programmer and chip code Remove chipdriver.h include from flash.h\n\nSome of the spi programmer drivers required chipdrivers.h, needs fixing later:\n it87spi.c\n ichspi.c\n sb600spi.c\n wbsio_spi.c\n buspirate_spi.c\n ft2232spi.c\n bitbang_spi.c\n dediprog.c\n\nCorresponding to flashrom svn r914.\n\nSigned-off-by: Sean Nelson \u003caudiohacked@gmail.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "e4edb067a64275ba62669ebb4b42f653cb6aff0d", "tree": "89298b49e35ca9af4ead9eb194ac2abdcf1020ec", "parents": [ "fb0828f3db2b6c298b5617690a70cc92f34f3287" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Feb 12 19:37:25 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Feb 12 19:37:25 2010 +0000" }, "message": "Ignore RES (1 byte) if chip replied to REMS (2 bytes)\n\nSPI RES is the most unreliable way to identify chips because it only\nreturns a 1-byte ID for most chips.\n\nFor every given ID out there, probably a dozen incompatible flash\nchips match it. We already refuse to identify a chip with RES if that\nchip responds to RDID (3 bytes, good match), and with this patch we\nadditionally refuse RES if the chip responds to REMS (2 bytes, still a\ngood match). This increases matching accuracy a lot.\n\nBesides that, the RDID/REMS response checking has been cleaned up for\nbetter readability.\n\nCorresponding to flashrom svn r899.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Sean Nelson \u003caudiohacked@gmail.com\u003e\n" }, { "commit": "eac657909055bad33c60dfa92a28f6a953935b54", "tree": "d46c80bf96f1beaee264fd883fe713d564281e32", "parents": [ "2fea3f3197277efb0af7b70b5e5b210213367e2e" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Jan 22 02:53:30 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Jan 22 02:53:30 2010 +0000" }, "message": "Add write support\n\nSpeed up reads by a factor of 4 by switching block size from 4 to 16.\nAdd support for 4 byte RDID.\nAdd USB error decoding via usb_strerror.\n\nCorresponding to flashrom svn r879.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "d38fac8c261e4d7e3857453dfb612b9094f63e95", "tree": "f0c9704289953cb4c119ec42dfdac2150c322111", "parents": [ "415afcffc17492762d766939953ec2245b8582b0" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Jan 19 11:15:48 2010 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Jan 19 11:15:48 2010 +0000" }, "message": "Dediprog SF100 support\n\nReverse engineered from USB logs. I never touched that programmer nor\ndid I ever see the associated software.\nDisabled by default until it is complete. The driver needs to be hooked\nup to the SPI core before it will do anything besides init and\ndiagnostics.\n\nI successfully reverse engineered all commands, but some are still\nsomewhat magic.\nLogs from \"flashrom -p dediprog -V\" are appreciated.\n\nProbe and read should work, erase/write is expected to explode.\nThe programmer will set voltage to 0 on exit.\n\nThanks a lot to Stefan Reinauer and Patrick Georgi for providing USB\nlogs and for testing the result.\n\nCorresponding to flashrom svn r870.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "5643c0782e5cd8ef19010ed9bba7286386b2b584", "tree": "339d115b6865e7c0c3b3330df5f81072fb12803a", "parents": [ "db7c153cdd0eb3de235bfcfac23709c2feef52e1" ], "author": { "name": "Sean Nelson", "email": "audiohacked@gmail.com", "time": "Tue Jan 19 03:23:07 2010 +0000" }, "committer": { "name": "Sean Nelson", "email": "audiohacked@gmail.com", "time": "Tue Jan 19 03:23:07 2010 +0000" }, "message": "Block eraser conversions and support for Eon EN25B series\n\nConvert chips to block_erasers:\nST_M25PE10\nST_M25PE20\nST_M25PE40\nST_M25PE80\nST_M25PE16\nPMC_25LV010\nPMC_25LV016B\nPMC_25LV020\nPMC_25LV040\nPMC_25LV080B\nPMC_25LV512\nPMC_39F010\nPMC_49FL002\nPMC_49FL004\nSANYO_LE25FW203A\nSPANSION_S25FL016A\n\nAdded spi_block_erase_d7 for PMC chips.\n\nCorresponding to flashrom svn r867.\n\nSigned-off-by: Sean Nelson \u003caudiohacked@gmail.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "4e2fb0ee3ebbdf1f2da6ca1a3937f63eeac647b4", "tree": "d670b18a3e72c7678e6391f1ef4f2ee9ae6a3c31", "parents": [ "e7f3209487b8adb681dd720f9ae512c8ded26f6e" ], "author": { "name": "Michael Karcher", "email": "flashrom@mkarcher.dialup.fu-berlin.de", "time": "Tue Jan 12 23:29:26 2010 +0000" }, "committer": { "name": "Michael Karcher", "email": "flashrom@mkarcher.dialup.fu-berlin.de", "time": "Tue Jan 12 23:29:26 2010 +0000" }, "message": "Don\u0027t use \"byte\" as identifier\n\nSome mingw declares a global identifier \"byte\", causing -Werror -Wshadow\nto break compilation. This patch renames all identifiers called \"byte\".\n\nCorresponding to flashrom svn r861.\n\nSigned-off-by: Michael Karcher \u003cflashrom@mkarcher.dialup.fu-berlin.de\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "db53ec5373db0517c77f91d5d9e447f0771a0243", "tree": "ae622763f2f1d79b1c0366f60242d7e13f0a6340", "parents": [ "14e100c9335e310b3e84763f29306392574a14f4" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Dec 22 23:54:10 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Dec 22 23:54:10 2009 +0000" }, "message": "Add a few FIXME comments to the generic SPI code\n\nCorresponding to flashrom svn r814.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "66ef4e5ff32b1d19281c9d6723b1acfe566f9763", "tree": "df65fe458cd52070208d9e46e23418a015b16696", "parents": [ "a7e30503fad58008e739627dcb84348ded8ef572" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Dec 13 22:28:00 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Dec 13 22:28:00 2009 +0000" }, "message": "Internal (onboard) programming was the only feature which could not be disabled\n\nMake various pieces of code conditional on support for internal\nprogramming. Code shared between PCI device programmers and onboard\nprogramming is now conditional as well.\n\nIt is now possible to build only with dummy support:\nmake CONFIG_INTERNAL\u003dno CONFIG_NIC3COM\u003dno CONFIG_SATASII\u003dno\nCONFIG_DRKAISER\u003dno CONFIG_SERPROG\u003dno CONFIG_FT2232SPI\u003dno\n\nThis allows building for a specific use case only, and it also\nfacilitates porting to a new architecture because it is possible to\nfocus on highlevel code only.\n\nNote: Either internal or dummy programmer needs to be compiled in due to\nthe current behaviour of always picking a default programmer if -p is\nnot specified. Picking an arbitrary external programmer as default \nwouldn\u0027t make sense.\n\nBuild and runtime tested in all 1024 possible build combinations. The\nonly failures are by design as mentioned above.\n\nCorresponding to flashrom svn r797.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Sean Nelson \u003caudiohacked@gmail.com\u003e\n" }, { "commit": "d5b28fae1da48233753a19d3fa007c204786ec8c", "tree": "55b9f4704024f1e845fc1c8df44a2b1bd97d6884", "parents": [ "d70b09ca13f118af02078e5fcd336b9f83c7565a" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 24 18:27:10 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 24 18:27:10 2009 +0000" }, "message": "Add the ability to set Bus Pirate SPI speed via the command line\n\nExample usage:\nflashrom -p buspiratespi:spispeed\u003d2.6MHz,dev\u003d/dev/foo\nflashrom -p buspiratespi:dev\u003d/dev/foo,spispeed\u003d2.6M\n\nRefactor programmer option parsing (this allows cleanups in other\nprogrammers as well).\n\nIncrease SPI read size from 8 to 12 bytes (current single-transaction\nlimit of the Bus Pirate raw SPI protocol).\n\nAdd Bus Pirate to the list of programmers supporting 4 byte RDID.\n\nAdd Bus Pirate syntax to the man page.\n\nTested-by: Sean Nelson \u003caudiohacked@gmail.com\u003e\n\nCorresponding to flashrom svn r776.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Sean Nelson \u003caudiohacked@gmail.com\u003e\n" }, { "commit": "5cca01f3943d888f9ee5f1efcf9faa0269bf8533", "tree": "1978ce52ae758b879635c7a8a9c2651f739844f8", "parents": [ "e51ea10a8889544b942d3490bb721f160fe09517" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 24 00:20:03 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Tue Nov 24 00:20:03 2009 +0000" }, "message": "Cleanly validate ICH SPI preopcodes\n\nThe code should work on Linux/*BSD/MacOSX and relies on the serial code\nimplementation in serial.c. Support for additional platforms (Windows)\nwill have to be added to serial.c for this to work. For tests without a\nBus Pirate (or with non-functional serial code) it is possible to\n#define FAKE_COMMUNICATION in buspirate_spi.c.\nThanks to Sean Nelson for the SPI mode settings code. I tweaked it a bit\nto make configuration from a commandline easier should anybody want that\nfeature.\n\nTested-by: Sean Nelson \u003caudiohacked@gmail.com\u003e\n\nCorresponding to flashrom svn r772.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Sean Nelson \u003caudiohacked@gmail.com\u003e\n" }, { "commit": "01d49ed39db2c182c1788d73f4b50e4af3513679", "tree": "bf814fbd7d2cccd943299f00e2ef5277b16e36ae", "parents": [ "f52920581d07df19e1ef7c00aa7d1a1dc2a83b8f" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Nov 20 01:12:45 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Nov 20 01:12:45 2009 +0000" }, "message": "Add support for generic RDID and REMS matching of unknown chips\n\nIf a chip is not on the RDID generic vendor list nor on the REMS\nspecific ID list, flashrom will claim that no chip is there.\n\nHandle these cases gracefully. flashrom will ignore generic matches if a\nspecific chip was found, so this will have no impact on supported chips,\nbut help a lot for a first quick analysis by the user or developer. The\nonly drawback is that unknown chips may be recognized multiple times\nuntil they are added to flashchips.[ch].\n\nCorresponding to flashrom svn r767.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Marc Jones \u003cmarcj303@gmail.com\u003e\n" }, { "commit": "3efc51c1bcfe94329243c779ed32a59a693d75a1", "tree": "426975a8a4a0afa512f7011e37aa01c9544248f4", "parents": [ "7a0d94741d50745ec8bf9bda44a523fc0e868857" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Nov 16 15:03:35 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Nov 16 15:03:35 2009 +0000" }, "message": "If a SPI command taking an address does fail, we want to know the address for easier debugging\n\nVincent wrote: This patch provided help to debug the partial write on\nICH in descriptor mode.\n\nCorresponding to flashrom svn r764.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Vincent S. Cojot \u003copenlook@cojot.name\u003e \n" }, { "commit": "de75a5ed7f0f1b05e32a97423723db7a0719a2f2", "tree": "e94909e0b3b7bd53dcee2d46ce51d1423d0483f5", "parents": [ "4010712033b988f0be85f790982a12bb4010094b" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Oct 01 13:16:32 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Oct 01 13:16:32 2009 +0000" }, "message": "Introduce proper error checking for SPI programming\n\nCorresponding to flashrom svn r739.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "26f7e64cb173ea07a79b453519a641b14f6512c3", "tree": "ef1a254b134a43ccae502cffca6aa08b994a3998", "parents": [ "707f1ebec360d27d1f3b87a96c6edac87e2eef3d" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Sep 18 15:50:56 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Fri Sep 18 15:50:56 2009 +0000" }, "message": "The current ICH SPI preop handling is a hack which spews lots of warnings, but still yields correct results\n\nWith the multicommand infrastructure I introduced in r645, it became\npossible to integrate ICH SPI preopcodes cleanly into the flashrom\ndesign.\n\nThe new code checks for every opcode in a multicommand array if it is a\npreopcode. If yes, it checks if the next opcode is associated with that\npreopcode and in that case it simply runs the opcode because the correct\npreopcode will be run automatically before the opcode.\n\nCorresponding to flashrom svn r727.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: FENG Yu Ning \u003cfengyuning1984@gmail.com\u003e\n" }, { "commit": "4740c6ff3c230c83fa618557f94cc6675c5ab3b1", "tree": "9e511c0b501d900db3810632231ca8a620a118e6", "parents": [ "ab044b20a2b44097ce65c3fd4f232ee7170303ba" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Sep 16 10:09:21 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Sep 16 10:09:21 2009 +0000" }, "message": "Allow to exclude each of the external programmer drivers from being compiled in\n\nExample make commandline if you want only internal programmers:\nmake CONFIG_FT2232SPI\u003dno CONFIG_SERPROG\u003dno CONFIG_NIC3COM\u003dno\nCONFIG_SATASII\u003dno CONFIG_DRKAISER\u003dno CONFIG_DUMMY\u003dno\n\nOf course, all of the CONFIG_* symbols can be mixed and matched as\nneeded. CONFIG_FT2232SPI is special because even if it is enabled, make\nwill check if the headers are available and skip it otherwise.\n\nCorresponding to flashrom svn r724.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "f38431a5b23e578cff1299b8d69e7d650c060b60", "tree": "293fe367a94034d5b17d622c33e0365ec1a9b871", "parents": [ "c04ee22c7006d6e006086c40651b8761cea0fbfc" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Sep 05 02:30:58 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Sep 05 02:30:58 2009 +0000" }, "message": "Store block sizes and corresponding erase functions in struct flashchip\n\nI decided to fill in the info for a\nfew chips to illustrate how this works both for uniform and non-uniform\nsector sizes.\n\nstruct eraseblock{\nint size; /* Eraseblock size */\nint count; /* Number of contiguous blocks with that size */\n};\n\nstruct eraseblock doesn\u0027t correspond with a single erase block, but with\na group of contiguous erase blocks having the same size.\nGiven a (top boot block) flash chip with the following weird, but\nreal-life structure:\n\ntop\n16384\n8192\n8192\n32768\n65536\n65536\n65536\n65536\n65536\n65536\n65536\nbottom\n\nwe get the following encoding:\n{65536,7},{32768,1},{8192,2},{16384,1}\n\nAlthough the number of blocks is bigger than 4, the number of block\ngroups is only 4. If you ever add some flash chips with more than 4\ncontiguous block groups, the definition will not fit into the 4-member\narray anymore and gcc will recognize that and error out. No undetected\noverflow possible. In that case, you simply increase array size a bit.\nFor modern flash chips with uniform erase block size, you only need one\narray member anyway.\n\nOf course data types will need to be changed if you ever get flash chips\nwith more than 2^30 erase blocks, but even with the lowest known erase\ngranularity of 256 bytes, these flash chips will have to have a size of\na quarter Terabyte. I\u0027m pretty confident we won\u0027t see such big EEPROMs\nin the near future (or at least not attached in a way that makes\nflashrom usable). For SPI chips, we even have a guaranteed safety factor\nof 4096 over the maximum SPI chip size (which is 2^24). And if such a\nbig flash chip has uniform erase block size, you could even split it\namong the 4 array members. If you change int count to unsigned int\ncount, the storable size doubles. So with a split and a slight change of\ndata type, the maximum ROM chip size is 2 Terabytes.\n\nSince many chips have multiple block erase functions where the\neraseblock layout depends on the block erase function, this patch\ncouples the block erase functions with their eraseblock layouts.\nstruct block_eraser {\n struct eraseblock{\n unsigned int size; /* Eraseblock size */\n unsigned int count; /* Number of contiguous blocks with that size */\n } eraseblocks[NUM_ERASEREGIONS];\n int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);\n} block_erasers[NUM_ERASEFUNCTIONS];\n\nCorresponding to flashrom svn r719.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "04aa59a8645510f212fc6a270b48a883f3d00fa5", "tree": "95c8f6738fa4dbaa09b7ee0f058de130333dc84c", "parents": [ "0d5db9a8f86a2663570b05a557b49e0fa13f8631" ], "author": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Sep 02 22:09:00 2009 +0000" }, "committer": { "name": "Uwe Hermann", "email": "uwe@hermann-uwe.de", "time": "Wed Sep 02 22:09:00 2009 +0000" }, "message": "Standardize on using __func__ instead of __FUNCTION__\n\nThe __func__ variant is standardized in C99 and recommended to be\nused instead of __FUNCTION__ in the gcc info page.\n\nOnly _very_ old versions of gcc did not know about __func__, but we\u0027ve\nbeen using both __func__ and __FUNCTION__ for a long while now, and\nnobody complained about this, so all our users seem to use recent\nenough compilers.\n\nCorresponding to flashrom svn r711.\n\nSigned-off-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "3426ef6ab8dc13a0f1c306ab5d63e27664fb3e5c", "tree": "78525e6b9821679dbf87c69dc56c8af7182e04c2", "parents": [ "173e3eaabef842e3ad785f3c3c510bf4122deff9" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Aug 19 13:27:58 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Aug 19 13:27:58 2009 +0000" }, "message": "If FT2232H SPI is not enabled, it should be compiled out completely\n\nWe can\u0027t remove ft2232_spi.o from unconditional OBJS yet due to our\nmakefile structure (make features), but this patch adds #ifdefs around\nall FT2232H code, so the net effect is the same.\n\nCorresponding to flashrom svn r691.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "116081a224c3b36a4a7d940cfdb1dac1ba35fc75", "tree": "e82fbd5e39ffa638a9f56d93e90f0f520d392a53", "parents": [ "db41c59e3ba625659e397675384b08b4ec967fe6" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Aug 10 02:29:21 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Aug 10 02:29:21 2009 +0000" }, "message": "Replace remaining explicit erases in SPI programmer drivers with auto-erases\n\nSome SPI chip drivers and the generic 1-byte SPI chip write functions\ndidn\u0027t include the automatic erase present in other chip drivers.\n\nSince the majority is definitely auto-erase, change the remaining\nexplicit-erase cases to be auto-erase as well.\n\nCorresponding to flashrom svn r673.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carlos Arnau Perez \u003ccemede@gmail.com\u003e\n" }, { "commit": "5b2f52fa6caab4bda5aaf8b6128eb3044a930c47", "tree": "d76cdee91b7051e5edc1423169874d0755c2d95e", "parents": [ "22ea8cd503b65a6a5983e2db71b54dfcd89b3c74" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Aug 03 09:35:20 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Mon Aug 03 09:35:20 2009 +0000" }, "message": "Fix SPI multicommand endless loop in default_spi_send_multicommand\n\nCorresponding to flashrom svn r670.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "f8555e24a456551de9ce3d89fc648db9034ef517", "tree": "b2ed02345452c285f0138e2a2777e1dab46ba617", "parents": [ "414bd320ac1346db9539625975644bfa7b30281e" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jul 23 01:36:08 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jul 23 01:36:08 2009 +0000" }, "message": "This is a workaround for a bug in SB600 and SB700\n\nIf we only send an opcode and no additional data/address, the SPI\ncontroller will read one byte too few from the chip. Basically, the\nlast byte of the chip response is discarded and will not end up in the\nFIFO. It is unclear if the CS# line is set high too early as well. That\nhardware bug is undocumented as of now, but I\u0027m working with AMD to add\na detailed description of it to the errata.\n\nAdd loads of additional debugging to SB600/SB700 init.\n\nAdd explanatory comments for unintuitive code flow.\n\nThanks go to Uwe for testing quite a few iterations of the patch.\n\nKill the SB600 flash chip status register special case, which was a\nsomewhat misguided workaround for that hardware erratum.\n\nNote for future added features in the SB600 SPI driver: It may be\npossible to read up to 15 bytes of command response with overlapping\nreads due to the ring buffer design of the FIFO if the command can be\nrepeated without ill effects. Same for skipping up to 7 bytes between\ncommand and response.\n\nCorresponding to flashrom svn r661.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "414bd320ac1346db9539625975644bfa7b30281e", "tree": "1029c94038ad13ad5ac0b7e292c28b3135932662", "parents": [ "a80cfbc3d7ebc5ebe8775652687a26e6e02247b6" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jul 23 01:33:43 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Thu Jul 23 01:33:43 2009 +0000" }, "message": "Verbose probe output is split across multiple lines for some probe functions\n\nThis makes visual inspection and grepping a lot harder than necessary.\nRemove line breaks where appropriate. Some error messages should end up\non stderr instead of just being displayed in verbose mode.\n\nThanks to Maciej Pijanka for testing.\n\nCorresponding to flashrom svn r660.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "fcbdbbc0d4da0b600556d51cd048e01b3a19d582", "tree": "099011a8ff4fd1dd7e773dcdc7dfe440a0ca9cc4", "parents": [ "02487aa4edfc832b27afcd850cbfbe499fa09c35" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 22 20:09:28 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 22 20:09:28 2009 +0000" }, "message": "Convert SPI write status register to multicommand infrastructure\n\nCorresponding to flashrom svn r658.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n" }, { "commit": "02487aa4edfc832b27afcd850cbfbe499fa09c35", "tree": "f63fae957dd853e016abfffdd8fff62ffb2ebb1f", "parents": [ "f3196df7f07d27fd1ebdd94365717369fb98a472" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 22 15:36:50 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Wed Jul 22 15:36:50 2009 +0000" }, "message": "Replace most of the switch cases in the spi code with lookup on a struct instead\n\nThis brings the SPI code in line with the generic programmer\ninfrastructure.\n\nThis patch is a reworked version of a patch by Jakob Bornecrantz.\n\nCorresponding to flashrom svn r657.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nSigned-off-by: Jakob Bornecrantz \u003cwallbraker@gmail.com\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Jakob Bornecrantz \u003cwallbraker@gmail.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "2f1b36fb35873c599442e1828756c1993524cd5e", "tree": "836e46a0ba0fcd1ce41a52eddcb3437c2d08e2e5", "parents": [ "39fa9b55cd4c049f43124b873b464641fc9f79a9" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Jul 12 12:06:18 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sun Jul 12 12:06:18 2009 +0000" }, "message": "Convert SPI byte program to use the multicommand infrastructure\n\nTested-by: Jakob Bornecrantz \u003cwallbraker@gmail.com\u003e\n\nCorresponding to flashrom svn r651.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nTested it on Epia-m700 worked okay.\nAcked-by: Jakob Bornecrantz \u003cwallbraker@gmail.com\u003e\n" }, { "commit": "39fa9b55cd4c049f43124b873b464641fc9f79a9", "tree": "0cdc6d06d31e404c03d5d7cac101ef709d3219ce", "parents": [ "9d68080e0e81af7a0a7b24411fb1410867e93ffe" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jul 11 22:26:52 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jul 11 22:26:52 2009 +0000" }, "message": "Convert SPI block erase to use the multicommand infrastructure\n\nTested-by: Jakob Bornecrantz \u003cwallbraker@gmail.com\u003e\n\nCorresponding to flashrom svn r650.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n\nJakob writes:\nTested it on my EPIA-m700 and it worked nice. Also double checked that\none of the changed functions actually ran.\nAcked-by: Jakob Bornecrantz \u003cwallbraker@gmail.com\u003e\n" }, { "commit": "60d711879f7d288b5b8e5594af87fce85475d4b0", "tree": "d92a381fcf4c62dc22c4d001d4187f1fd9240cec", "parents": [ "bb297f733dc78a22d6ee0eb37560207e0c2d424a" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jul 11 19:28:36 2009 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jul 11 19:28:36 2009 +0000" }, "message": "Convert SPI chip erase to use the multicommand infrastructure\n\nOnce the ICH/VIA SPI driver is converted to multicommand, a lot of hacks\ncan disappear.\n\nCorresponding to flashrom svn r647.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nTested-by: Jakob Bornecrantz \u003cwallbraker@gmail.com\u003e\nAcked-by: Jakob Bornecrantz \u003cwallbraker@gmail.com\u003e\n" } ], "next": "d0478299b1d714a7001f19fb2cafeb257698a2c0" }