)]}'
{
  "log": [
    {
      "commit": "5455786bfb4b09af11f4354a6bb4842d37d78419",
      "tree": "4444295adb9d0e6f9e13e08a16bc5c88a0b14352",
      "parents": [
        "c3b02dce51aad2766512d1939a1b7447c2d526b8"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Mon May 15 12:01:04 2023 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 08 19:56:50 2023 +0000"
      },
      "message": "spi95: Avoid automatic probing\n\nIt turned out that the read ID command for the ST/M95 family (0x83)\nis a write command for AT45DB chips. We\u0027ll tag respective chips as\nusing a SPI95 command set, like we did for EDI, to avoid automatic\nprobing.\n\nChange-Id: Ibdf364424ac9cd8a734507a05fe769f008f8178e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/75218\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n"
    },
    {
      "commit": "c3b02dce51aad2766512d1939a1b7447c2d526b8",
      "tree": "58069f464bb8a777ef06e93767813a4c5a042cb0",
      "parents": [
        "a02df33fbf1c196395a61049e60895d4ae0e0a5b"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Aug 12 01:13:45 2023 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Mon Sep 18 19:24:39 2023 +0000"
      },
      "message": "Rebrand to flashprog and update URLs\n\nMostly automated `sed` work. As of now, URLs to the old wiki are broken\neither way, so changing them shouldn\u0027t hurt. Other URLs (e.g. to mailing\nlist archives) were hopefully filtered correctly.\n\nChange-Id: I9d43bfd0e675eff2fcbad05f304b9ce9f5006b08\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashrom-stable/+/21\n"
    },
    {
      "commit": "3ac761c3c47a6476b8b0f9ce613b32914b163c46",
      "tree": "146db2e06439bf76f4c66fd48facb10ec3c0bf79",
      "parents": [
        "b77607f048e5cdfbf8fb1e9ad3b110c9a67e80e0"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Mon Jan 16 02:43:17 2023 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Apr 04 10:12:02 2023 +0000"
      },
      "message": "layout: Verify that regions to be written are granularity aligned\n\nThis will be important with the new erase/write strategy when we don\u0027t\nwrite per erase block anymore.\n\nChange-Id: Ie3c74ff4313c9d72ac92d3226804e0407088c17d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72546\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "3b64d8107b56dc437cde606e17abaae435d7ba35",
      "tree": "3971e382111e87d2dc6d00e38e4198d78ec46eb7",
      "parents": [
        "23b2b864777a09b4d9a9024675670a7d694c1e06"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Fri Aug 12 13:07:51 2022 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "flashrom.c: Move print logic to print.c\n\nThis free\u0027s up flashrom.c from namespace pollution.\n\nChange-Id: I2724f7910fa3e01bcf49b8093260a4f1643df777\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66652\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72351\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "63f6a37984cf361229b433343ea9146c57a87f18",
      "tree": "0ebdaca6bbf8168b6bbb93da3b3be9dcc0336fe3",
      "parents": [
        "ee3fbd7c7c05efbdea2ded8484bcfe96238f0124"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Fri Aug 12 12:56:43 2022 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "parallel.c: Consoldiate parallel master registration logic\n\nThis is analogous to spi.c and opaque.c however parallel\nlogic was previously never consoldiated.\n\nThis free\u0027s up flashrom.c from namespace pollution.\n\nTested: builds with both make and meson.\n\nChange-Id: Ie08e2e6c51ccef5281386bf7e3df439b91573974\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66651\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72349\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "dd9d0c58d601a003ebc1918c53edc16aab607080",
      "tree": "2daac025bb07ce348b414cb9c6e7957419ca3102",
      "parents": [
        "4bd966c8099b64ebb665b6f40786bb21d59a9363"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Sat Jun 04 20:23:57 2022 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "tree: Consolidate BIT() macro\n\nChange-Id: I7e61f7671b70ca5ed751d99405714436bcd18d5a\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/64962\nOriginal-Reviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nOriginal-Reviewed-by: Elyes Haouas \u003cehaouas@noos.fr\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72338\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "2d17041c5e170b42785e99d2aaedb98abb9bf040",
      "tree": "b60bbb992860f4c8d5bca7ff2c67ebcba2f26647",
      "parents": [
        "f6a273b353355fd3817a00135019fd71e3543683"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Mon Nov 15 15:47:15 2021 +1100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "flashrom: Drop read_flash_to_file() usage\n\nAspire towards a goal of making cli_classic more of just\na user of libflashrom than having quasi-parallel paths in\nflashrom.c\n\nThis converts remaining read_flash_to_file() usage to the\ndo_read() provider wrapper around libflashrom.\n\nTested: `\nsudo ./flashrom -p ft2232_spi:type\u003d232H,divisor\u003d1000 -f -r out -c W25X05\nFlashrom output:\n\nNo EEPROM/flash device found.\nForce read (-f -r -c) requested, pretending the chip is there:\nAssuming Winbond flash chip \"W25X05\" (64 kB, SPI) on ft2232_spi.\nPlease note that forced reads most likely contain garbage.\nBlock protection could not be disabled!\nReading flash... done.\nData read:\n\nxxd out-1khz\n00000000: 0000 07ff ffff e000 0000 7fff fffe 0000  ................\n00000010: 0007 ffff ffe0 0000 007f ffff fe00 0000  ................\n00000020: 07ff ffff e000 0000 7fff fffe 0000 0007  ................\n00000030: ffff ffe0 0000 007f ffff fe00 0000 0fff  ................\nxxd out-100khz\n00000000: b6db 6db6 db6d b6db 6db6 db6d b6db 6db6  ..m..m..m..m..m.\n00000010: db6d b6db 6db6 db6d b6db 6db6 db6d b6db  .m..m..m..m..m..\n00000020: 6db6 db6d b6db 6db6 db24 9249 2492 4924  m..m..m..$.I$.I$\n00000030: 9249 2492 4924 9249 2492 4924 9249 2492  .I$.I$.I$.I$.I$.\n`\n\nChange-Id: I4b690b688acf9d5deb46e8642a252a2132ea8c73\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Tested-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/59291\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72336\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "58015c25eb05fa77966d1c53261a83b56a3cf6b3",
      "tree": "a1df11881a074c8c66de756f846be9030ce0443a",
      "parents": [
        "e276765eca031c6900d37b22b89e686283f39c91"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.com",
        "time": "Thu Apr 14 13:50:55 2022 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "Introduce an `include` directory for header files\n\nMove all header files to the new `include` directory.\nAdapt include directives and build systems to the new directory.\n\nChange-Id: Iaddd6bbfa0624b166d422f665877f096983bf4cf\nSigned-off-by: Felix Singer \u003cfelix.singer@secunet.com\u003e\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/58622\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72322\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\n"
    },
    {
      "commit": "e276765eca031c6900d37b22b89e686283f39c91",
      "tree": "97c22e96f45e7e7cb0520941a2d7d292d716fa18",
      "parents": [
        "17affdcd24896b6bb7e73137e9d026ad66a36dfd"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.com",
        "time": "Thu Apr 07 17:48:53 2022 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "Drop STANDALONE mode\n\nSTANDALONE mode was used to build flashrom without having support for\nfile handling. This was relevant to build libflashrom on top of\nlibpayload. For a while now, the code which is covered by STANDALONE has\nmoved to cli_*.c and is not used for libflashrom. Therefore we can drop\nSTANDALONE mode.\n\nChange-Id: I58fb82270a9884a323d9850176708d230fdc5165\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/63469\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72321\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "98cfa69207c6558fce9b71f8d0510b3130afd67e",
      "tree": "82a951c69051eb9d9491cf4a87dbf0a9de4e3ce0",
      "parents": [
        "306c8b76f7fd6326371b2208f516d5090cdb8370"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Mon Dec 13 12:46:12 2021 +1100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "flashrom.c: Move do_*() helpers into cli_classic.c\n\nThese helpers are only used by the CLI logic and so we localise\nthem here to move towards cli_classic being a pure libflashrom\nuser.\n\nChange-Id: If1112155e2421e0178fd73f847cbb80868387433\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/60070\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72290\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "c72d20aa8f6a05dda4e0d0a616cdeccc897736e2",
      "tree": "5e2166c061b70a2b6e653e8fd9f5f616295c0513",
      "parents": [
        "83aa6afc09f89d78b27f02d1005847b17128e81e"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Mon Dec 13 12:30:03 2021 +1100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "cli_classic.c: Convert do_erase() to libflashrom call\n\nInline emergency_help_message() to cli_classic call site.\nThis leaves do_erase() a redudant wrapper and moves us a step\ncloser to cli_classic as a pure libflashrom user by using\nflashrom_flash_erase().\n\nTested: `flashrom -E`\n\nChange-Id: I8566164e7dbad69cf478b24208014f10fb99e4d0\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/60068\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72287\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "3d5be0b5f65fe191839b567cfc3bc8b76abeeef5",
      "tree": "e49001b4796c9a0e54b21a6eda49dd8a0308ea50",
      "parents": [
        "433dc1c647f0601dd5c7aa5d0c0584dc6ef80c96"
      ],
      "author": {
        "name": "Thomas Heijligen",
        "email": "thomas.heijligen@secunet.de",
        "time": "Tue Oct 12 20:31:45 2021 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "hwaccess: replace flashrom specific macros by compiler defines\n\nReplace the remaining IS_* macros with the associated compiler defines\n\nChange-Id: Ia0f022d12390722816066d292e1878824adc613c\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.de\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/58280\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72248\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "345f65aac482e813d36e74ad7508254cf8f58c4d",
      "tree": "289105d2e073651d36913820997db11550a2b612",
      "parents": [
        "d9b57717471346b89da335bdf14ade85426efbfe"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri May 14 01:11:08 2021 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "layout: Tidy up the include-args API\n\nMove all forward declarations into `layout.h`, use consistent naming.\n\nChange-Id: I0e87c9d91b9bc4d78f9cee98caff6985803f7be7\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54287\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72223\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "d9b57717471346b89da335bdf14ade85426efbfe",
      "tree": "13901f46bcd8b00d33ceb1eb881e101f914ac323",
      "parents": [
        "e0ed4120f70c9642951c74ba6698405fbec75c08"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri May 14 01:07:28 2021 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "layout: Kill the global layout\n\nChange-Id: Ic302e9c5faf1368e5ca244ce461e55e14f916ab8\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54286\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72222\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "e0ed4120f70c9642951c74ba6698405fbec75c08",
      "tree": "fad22f015b4c60157d85214aef0eeae99be93b82",
      "parents": [
        "efe96a939e08bad88890531a7961925e03c5196e"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri May 14 00:48:28 2021 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "layout: Rework normalize_romentries() API\n\nRename it to layout_sanity_checks() as that is what it does and\nlet it work on the currently active layout instead of the global\nlayout.\n\nChange-Id: Ifae3480d4bd68c939c291f05734544e93f00306c\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54285\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72221\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "5bd990c2ab8ceb263d598a2348d7020ce774784f",
      "tree": "0ee2bdd6b6aa9af15becf68d7afd4142df0bf99c",
      "parents": [
        "92e0b62fc37a6d89975ced41f5ec3c3715404f33"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jun 16 19:46:46 2019 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Jan 29 12:29:02 2023 +0000"
      },
      "message": "layout: Introduce flashrom_layout_new()\n\nIt initializes an empty layout. Currently the maximum number of entries\nhas to be specified, which will vanish once we use dynamic allocation\nper entry.\n\nWe replace the two special cases `single_layout` and `ich_layout` with\ndynamically allocated layouts. As a result, we have to take care to\nrelease the `default_layout` in a flashctx once we are done with it.\n\nChange-Id: I2ae7246493ff592e631cce924777925c7825e398\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/33543\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72214\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "a1805097309f7d230f3596550fc673b109d5b19d",
      "tree": "1a2772c9df3563a3ec5dc167dd900501b665744e",
      "parents": [
        "2fc70dcfe988928e97e69e98d91e7e3999ecd352"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Mon May 16 11:10:36 2022 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 05 16:35:01 2023 +0000"
      },
      "message": "flashrom.c: Make need_erase() helper static local\n\nThe need_erase() helper is only used within flashrom.c\n\nChange-Id: Ic0946bb109fca2fc18e15eefa11cccea284ded0b\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/64369\nOriginal-Reviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71460\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "f6c1cb1a856e67b8cf7eaf7a90b09bc3923a3718",
      "tree": "9776b733a8f851fe90b582068baae97e64425e40",
      "parents": [
        "137f02f887144eae222e44adb675cb299fd00337"
      ],
      "author": {
        "name": "Martin Roth",
        "email": "gaumless@gmail.com",
        "time": "Tue Mar 15 10:55:25 2022 -0600"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 05 16:35:01 2023 +0000"
      },
      "message": "Global cleanup: Fix a few spelling errors\n\nJust a trivial patch to fix a few errors found by codespell.\n\nHere\u0027s the command I used:\ncodespell -S subprojects,out \\\n-L fwe,dout,tast,crate,parms,claus,nt,nd,te,truns,trun\n\nSigned-off-by: Martin Roth \u003cgaumless@gmail.com\u003e\nChange-Id: I4e3b277f220fa70dcab21912c30f1d26d9bd8749\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/62840\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Elyes Haouas \u003cehaouas@noos.fr\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71455\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "d75e1b1fda75e3573140912cb0af246ccf86c8ee",
      "tree": "0b20aa11090ab199fe70055e964f78aa5a0fe096",
      "parents": [
        "f55ca20fcf7fcc8a8c95d034c7126217a117e88e"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Wed Jul 14 15:06:04 2021 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jan 05 16:15:22 2023 +0000"
      },
      "message": "flashrom.c: Make extract_param() static local\n\nThe function is only ever used within flashrom.c.\n\nChange-Id: I81f1cdb9df98c151201390edeb69c74defe7881f\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/56295\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71414\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n"
    },
    {
      "commit": "c720b6e8fbe9245e670f1424c5d24143b22a4c72",
      "tree": "82c71b6415f8583d331ea7fc88ce73e2705f6071",
      "parents": [
        "590525835ab9f8b9471c17f859e0e18245008c08"
      ],
      "author": {
        "name": "Sergii Dmytruk",
        "email": "sergii.dmytruk@3mdeb.com",
        "time": "Thu Oct 06 15:17:52 2022 +0300"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 30 01:16:54 2022 +0100"
      },
      "message": "flash.h: extend `struct tested` with .wp field\n\nUsing \"B\" letter for \"block protection\" in TEST_* macros.\n\nTicket: https://ticket.coreboot.org/issues/377\nChange-Id: I791400889159bc6f305fb05f3e2dd9a90dbe18a4\nSigned-off-by: Sergii Dmytruk \u003csergii.dmytruk@3mdeb.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/68179\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71000\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "9bb8a322e991b899a6faff4ec14d2f4c6dba447d",
      "tree": "466f98faf8e1f425b5c3144e399008bf14ac8b35",
      "parents": [
        "542b1f04869e7ac42b84800675f08f617ddf3f2d"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue May 24 15:07:34 2022 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 30 01:16:52 2022 +0100"
      },
      "message": "flashchips,spi25: Replace `.wrea_override` with FEATURE_4BA_EAR_1716\n\nThere are two competing sets of instructions to access the extended\naddress register of 4BA SPI chips. Some chips even support both sets.\n\nSo far, we assumed the 0xc5/0xc8 instructions by default and allowed\nto override the write instructions with the `.wrea_override` field.\nThis has some disadvantages:\n\n* The additional field is easily overlooked. So when adding a new\n  flash chip, one might assume only 0xc5/0xc8 are supported.\n\n* We cannot describe flash chips completely that allow both\n  instructions (and some programmers may be picky about which\n  instructions can be used).\n\nTherefore, replace the `.wrea_override` field with a feature flag.\n\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nChange-Id: I6d82f24898acd0789203516a7456fd785907bc10\nTicket: https://ticket.coreboot.org/issues/357\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/64636\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70993\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "542b1f04869e7ac42b84800675f08f617ddf3f2d",
      "tree": "9516bc3f06c3fc5d67203328e524b967b5d36901",
      "parents": [
        "a8258d76aa2fb7c5f2e2085a0d1bab6804bf7a7c"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue May 24 14:30:12 2022 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 30 01:16:52 2022 +0100"
      },
      "message": "flashchips: Rename FEATURE_4BA_EXT_ADDR -\u003e _EAR_C5C8\n\nThere are two competing sets of instructions to access the extended\naddress register of 4BA SPI chips. Some chips even support both sets.\nTo prepare for other instructions than the default 0xc5/0xc8, rename\nthe original feature flag.\n\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nChange-Id: Iacb7b68a9e3444fe28873ff0fe5e3fab16643c8c\nTicket: https://ticket.coreboot.org/issues/357\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/64635\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70992\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "3f3c1f3238dcede30d0d15d36da6326b428b8b12",
      "tree": "9adc4f207793fe401c9ffd28e2f7c60460766533",
      "parents": [
        "478e179f2d5ecf6a8b82984444b9111913a8f50f"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat May 28 16:48:26 2022 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 30 01:16:50 2022 +0100"
      },
      "message": "spi25_statusreg: Allow WRSR_EXT for Status Register 3\n\nSpansion flash chips S25FL128L and S25FL256L use the WRSR instruction to\nwrite more than 2 registers. So align SR2 and SR3 support: The current\nFEATURE_WRSR_EXT is renamed to FEATURE_WRSR_EXT2 and FEATURE_WRSR_EXT3\nis added. Also, WRSR3 needs a separate flag now.\n\nVerified that FEATURE_WRSR_EXT2 still works using the `dummy_flasher`.\n\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nChange-Id: Ibdfc6eb3d2cfecbf8da0493d067031ddb079a094\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/64746\nOriginal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70988\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "801fcd0123af9a253d68089e2728d0f51a64b749",
      "tree": "71351110f1e02733565e415bf6ec322e11958d8d",
      "parents": [
        "0b2e7dd80847f19f30db35e6e0d47f3c7b02ffbf"
      ],
      "author": {
        "name": "Sergii Dmytruk",
        "email": "sergii.dmytruk@3mdeb.com",
        "time": "Sun Dec 19 18:45:16 2021 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 30 01:16:48 2022 +0100"
      },
      "message": "writeprotect: add WPS bit and always set it to zero\n\nWPS bit controls use of individual block protection which is mutually\nexclusive with protection based on ranges.  Proper support requires\nextension of the API as well as implementation, so here we\u0027re just\nmaking sure that range-based protection is enabled and our WP\nconfiguration is not ignored by the chip.\n\nChange-Id: I2c26ec65d64a3b6fb1f1a73690bc771415db2744\nSigned-off-by: Sergii Dmytruk \u003csergii.dmytruk@3mdeb.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/60231\nOriginal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70981\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "0b2e7dd80847f19f30db35e6e0d47f3c7b02ffbf",
      "tree": "020dea176939135afa15e8f328088e808b6c812a",
      "parents": [
        "9bf829d9a0b08323ca0ef8f2b52737f3eafbfe21"
      ],
      "author": {
        "name": "Sergii Dmytruk",
        "email": "sergii.dmytruk@3mdeb.com",
        "time": "Sun Dec 19 18:37:51 2021 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 30 01:16:48 2022 +0100"
      },
      "message": "spi25_statusreg.c: add SR3 read/write support\n\nAdds support for reading and writing the third status register.\n\nFeature flag is not needed because it would never on its own control\nwhether SR3 access occurs.  If added, it would be in one of three\npossible states: wrong, useless or redundant.\n\nChange-Id: Id987c544c02da2b956e6ad2c525265cac8f15be1\nSigned-off-by: Sergii Dmytruk \u003csergii.dmytruk@3mdeb.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/60230\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70980\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "c9feb1bdfa96745a200b9a62dc4234446db8ddb6",
      "tree": "b532df293904cb48d7efa7b127a0072f48801835",
      "parents": [
        "da1c834e9899e5094377a33d19daa53c0d88640b"
      ],
      "author": {
        "name": "Nikolai Artemiev",
        "email": "nartemiev@google.com",
        "time": "Thu Oct 21 01:35:13 2021 +1100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 30 01:16:45 2022 +0100"
      },
      "message": "flashchips,writeprotect_ranges: add range decoding function\n\nAllow chips to specify functions that map status register bits to\nprotection ranges. These are used to enumerate available ranges and\ndetermine the protection state of chips. The patch also adds a range\ndecoding function for the example chips. Many other chips can also be\nhandled by it, though some will require different functions (e.g.\nMX25L6406 and related chips).\n\nAnother approach that has been tried in cros flashrom is maintaining\ntables of range data, but it quickly becomes error prone and hard to\nvalidate.\n\nUsing a function to interpret the ranges allows compact encoding with\nmost chips and is flexible enough to allow chips with less predictable\nranges to be handled as well.\n\nTested: dumped range tables, checked against datasheets\n\nChange-Id: Id163ed80938a946a502ed116e48e8236e36eb203\nSigned-off-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/58480\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70969\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "c6c3f28c66e0ad792274ca05029a120925e21be6",
      "tree": "0df6153a2d812235b3defe835f40b9ed08684c92",
      "parents": [
        "9de3f8710d5c46d35cd9869018c85e5aa51483b0"
      ],
      "author": {
        "name": "Nikolai Artemiev",
        "email": "nartemiev@google.com",
        "time": "Wed Oct 20 23:34:15 2021 +1100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 30 01:16:44 2022 +0100"
      },
      "message": "flash.h,flashchips.c: add writeprotect bit layout map to chips\n\nThis patch adds a register bit map `struct reg_bit_info`, with fields\nfor storing the register, bit index, and writability of each bit that\naffects the chip\u0027s write protection. This allows writeprotect code to be\nindependent of the register layout of any specific chip. The new fields\nhave been filled out for example chips.\n\nThe representation is centered around describing how bits can be\naccessed and modified, rather than the layout of registers. This is\ngenerally easier to work with in code that needs to access specific bits\nand typically requires specifying the locations of fewer bits overall.\n\nTested: flashrom --wp-{enable,disable,range,list,status} at end of patch series\n\nChange-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284\nSigned-off-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/58477\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70966\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "9de3f8710d5c46d35cd9869018c85e5aa51483b0",
      "tree": "b742b7c1631b89e1cfa18a5553fc3da57ed2b8df",
      "parents": [
        "0167522794a2e66f00248347122c1bb8ce3b001d"
      ],
      "author": {
        "name": "Nikolai Artemiev",
        "email": "nartemiev@google.com",
        "time": "Wed Oct 20 22:32:25 2021 +1100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 30 01:16:44 2022 +0100"
      },
      "message": "spi25_statusreg,flashchips: add SR2 read/write support\n\nThis patch adds support for reading and writing the second status\nregister and enables it on a limited set of flash chips.\n\nChip support for RDSR2/WRSR2/extended WRSR is represented using feature\nflags to be consistent with how other SPI capabilities are represented.\n\nTested: flashrom -{r,w,E}\nTested: flashrom --wp-{enable,disable,range,list,status} at end of patch series\nTested: logged SR2 read/write values during wp commands\n\nChange-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db\nSigned-off-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/58570\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70965\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "0167522794a2e66f00248347122c1bb8ce3b001d",
      "tree": "ac01ed9312b2946bdcdbe1abf1078b69f6117183",
      "parents": [
        "236a38cc46ac810d0be679402bb21e83aebcb8b9"
      ],
      "author": {
        "name": "Nikolai Artemiev",
        "email": "nartemiev@google.com",
        "time": "Wed Oct 20 22:30:41 2021 +1100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 30 01:16:43 2022 +0100"
      },
      "message": "spi25_statusreg: make register read/write functions generic\n\nThis patch adds new spi_{read,write}_register() functions that take the\nsource/destination register as an argument. Currently they can only\naccess SR1, support for other registers will be added in another patch.\n\nSince we\u0027re refactoring things, this commit also makes\nspi_read_register() return an error code, making it possible to identify\nerror conditions that spi_read_status_register() concealed.\n\nThis also removes the initial 100ms delay between writing a register and\nthe first attempt to check the chip\u0027s status. An initial delay was added\nto avoid needing to read the status register multiple times, but that is\nunlikely to cause problems on modern flash chips.\n\nTested: flashrom -{r,w,E}\nTested: flashrom --wp-{enable,disable,range,list,status} at end of patch series\n\nChange-Id: I0a3951bbf993f2d8d830143b29d3ce16cc6901d7\nSigned-off-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/58475\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70964\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "4ad486465ccceedce372c498ad19ac84edbc0078",
      "tree": "b278a2499ed1ac3101b4e74f48a8a622640c15d3",
      "parents": [
        "73ae5efbc36e8523d1f2fce1258a9ab2eef02e5e"
      ],
      "author": {
        "name": "Nikolai Artemiev",
        "email": "nartemiev@google.com",
        "time": "Thu Nov 05 13:54:27 2020 +1100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 30 01:16:36 2022 +0100"
      },
      "message": "flashrom.c: implement chip restore callback registration\n\nAllows drivers to register a callback function to reset the\nchip state once programming has finished. This is used by\nthe s25f driver added in a later patch, which needs to change\nthe chip\u0027s sector layout to be able to write to the entire flash.\n\nAdapted from cros flashrom at\n`9c4c9a56b6a0370b383df9c75d71b3bd469e672d`.\n\nChange-Id: I2a522dc1fd3952793fbcad70afc6dd43850fbbc5\nSigned-off-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/47276\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70940\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "5eca427ae64519b70d1c4ccfb427305ca9974ba0",
      "tree": "1ca22ef1e0072a76650fdd182206844f8ebddd7d",
      "parents": [
        "1bbc501f79319cc6c8d839bc44fa55e96afab33a"
      ],
      "author": {
        "name": "Edward O\u0027Callaghan",
        "email": "quasisec@google.com",
        "time": "Sun Apr 12 17:27:53 2020 +1000"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Dec 30 01:16:34 2022 +0100"
      },
      "message": "const\u0027ify flashctx to align signatures with cros flashrom\n\nThe ChromiumOS flashrom fork has since const\u0027ify flashctx\nin a few places. This aligns the function signatures to\nmatch with downstream to ease forward porting patches\nout of downstream back into mainline flashrom.\n\nThis patch is minimum viable alignment and so feedback is\nwelcome.\n\nChange-Id: Iff6dbda13cb0d941481c0d204b9c30895630fbd1\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/40324\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70933\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "8900d6c8e1438ee2a4a77c8e4d3feab81ee261e2",
      "tree": "5664d15b2f3ca63f9f96ef3284cbbf5c46499179",
      "parents": [
        "7d6b526ef5b7b11f89eee37062e91590f5fa7f43"
      ],
      "author": {
        "name": "Miklós Márton",
        "email": "martonmiklosqdev@gmail.com",
        "time": "Tue Jul 30 00:03:22 2019 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Oct 04 11:03:46 2019 +0000"
      },
      "message": "helpers: Implement strndup() for MinGW\n\nProvide strndup implementation if compiled with MinGW because\nit is a POSIX only method\n\nSigned-off-by: Miklós Márton \u003cmartonmiklosqdev@gmail.com\u003e\nChange-Id: If418080bffff1f5961cacf2a300ea9c666682458\nReviewed-on: https://review.coreboot.org/c/flashrom/+/34621\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "519be66fc59558971dd653afe69ccaf1a633b492",
      "tree": "74f0912de156a86d56111f377db080246e5205e9",
      "parents": [
        "ef78de4a21323b8c459337356289218211f2c5ce"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Dec 23 20:03:35 2018 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Wed Jul 31 08:26:59 2019 +0000"
      },
      "message": "Fix -Wsign-compare trouble\n\nMostly by changing to `unsigned` types where applicable, sometimes\n`signed` types, and casting as a last resort.\n\nChange-Id: I08895543ffb7a48058bcf91ef6500ca113f2d305\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom/+/30409\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Jacob Garber \u003cjgarber1@ualberta.ca\u003e\n"
    },
    {
      "commit": "d8b2e808cd46986f945ba9cf3b90c70fe58de9c6",
      "tree": "4094be4996c4ae32a78e0e13c558ee78bcdd85dc",
      "parents": [
        "0373ce31fe5b11dcf23b27fbc221ba019a1cf7f1"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Jun 18 23:39:56 2019 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Jun 21 11:54:19 2019 +0000"
      },
      "message": "spi: Move 16MiB partitioning up into spi_chip_read()\n\nWe enforced a 16MiB limit in spi_read_chunked() for multi-die flash\nchips that can\u0027t be fully read at once. The same limit can be useful\nfor dediprog programmers. So move it into a more generic place.\n\nChange-Id: Iab1fd5b2ea550b4b3ef3e8402e0b6ca218485a51\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom/+/33613\nReviewed-by: Ryan O\u0027Leary\nReviewed-by: ron minnich \u003crminnich@gmail.com\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "b04fef91c100d815265bc1948e61a62f284c42ef",
      "tree": "9446fe01e60f38fde4dd777602a1e8dab2cce8cd",
      "parents": [
        "ee13d0c8fa365455002b109ded7f94f990be8347"
      ],
      "author": {
        "name": "Arthur Heymans",
        "email": "arthur@aheymans.xyz",
        "time": "Tue Feb 05 17:35:05 2019 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Mon Jun 17 08:03:12 2019 +0000"
      },
      "message": "layout.c: Don\u0027t use global variables for included regions\n\nThis removes the use of global variables for included region arguments\nand also uses a linked list to store the arguments.\n\nChange-Id: I6534cc58b8dcc6256c2730c809286d8083669a6c\nSigned-off-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom/+/31247\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "86bddb5d52659f23531282db137350cbf7fb5992",
      "tree": "2f2b2da3f475065c9e86218b79ded18547c6b2c3",
      "parents": [
        "57dbd64b33143964bb8eb91d33d72a2147f0091c"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Mar 13 18:14:52 2018 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Wed Oct 03 13:14:57 2018 +0000"
      },
      "message": "Enable 4BA mode for Spansion 25FL256S\n\n4BA mode is entered by setting bit 7 for the extended address register.\n\nChange-Id: I807bf55d65763a9f48a6a3377f14f4e5288a7a4c\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: Michael Fuckner \u003cmichael@fuckner.net\u003e\nReviewed-on: https://review.coreboot.org/25133\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "57dbd64b33143964bb8eb91d33d72a2147f0091c",
      "tree": "1606d103406bf36144602971ca2ac970d3a61482",
      "parents": [
        "3eb5a8c82c00769bffc95c2c6c479de6d20dbd09"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Mar 13 18:01:05 2018 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Wed Oct 03 13:10:17 2018 +0000"
      },
      "message": "flashchips: Add Spansion 25FL256S......0\n\nThe Spansion 25SFL256S supports 4BA through an extended address register,\na 4BA mode set by bit 7 of that register, or native 4BA instructions.\nEnable the former only for now.\n\nUnfortunately the S25SF256S uses another instruction to write the exten-\nded address register. So we add an override for the instruction byte.\n\nChange-Id: I0a95a81dfe86434f049215ebd8477392391b9efc\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: Michael Fuckner \u003cmichael@fuckner.net\u003e\nReviewed-on: https://review.coreboot.org/25132\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "7ecfe48b19c3e97341a3f2b0d85e7367ab92f2b6",
      "tree": "8114881424b47ca6c3044e39da8e16615001887b",
      "parents": [
        "af499198a49fe342a0bb3dbbfa362b8788a8fb4e"
      ],
      "author": {
        "name": "Marc Schink",
        "email": "flashrom-dev@marcschink.de",
        "time": "Thu Mar 17 16:07:23 2016 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Aug 30 09:55:57 2018 +0000"
      },
      "message": "helpers: Add reverse_byte() and reverse_bytes()\n\nChange-Id: I9d2e1e2856c835d22eed3b3a34bc0379773dd831\nSigned-off-by: Marc Schink \u003cflashrom-dev@marcschink.de\u003e\nReviewed-on: https://review.coreboot.org/28086\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "f9a30554803a670f9b95a7794be00f03929d6ecd",
      "tree": "46da1dafce0c76ab5730540540aaf4093463f551",
      "parents": [
        "291764a70e6d8b212680e311bfb0825abf2b9a2f"
      ],
      "author": {
        "name": "David Hendricks",
        "email": "dhendricks@fb.com",
        "time": "Sat May 23 20:30:30 2015 -0700"
      },
      "committer": {
        "name": "David Hendricks",
        "email": "david.hendricks@gmail.com",
        "time": "Thu May 17 16:49:16 2018 +0000"
      },
      "message": "linux_mtd: Import driver from ChromiumOS\n\nThis imports a series of patches from chromiumos for MTD support.\nThe patches are squashed to ease review and original Change-Ids have\nbeen removed to avoid confusing Gerrit.\n\nThere are a few changes to integrate the code:\n- Conflict resolution\n- Makefile changes\n- Remove file library usage from linux_mtd. We may revisit this and use\n  it for other Linux interfaces later on.\n- Switch to using file stream functions for reads and writes.\n\nThis consolidated patch is\nSigned-off-by: David Hendricks \u003cdhendricks@fb.com\u003e\n\nThe first commit\u0027s message is:\nInitial MTD support\n\nThis adds MTD support to flashrom so that we can read, erase, and\nwrite content on a NOR flash chip via MTD.\n\nBUG\u003dchrome-os-partner:40208\nBRANCH\u003dnone\nTEST\u003dread, write, and erase works on Oak\n\nSigned-off-by: David Hendricks \u003cdhendrix@chromium.org\u003e\nReviewed-on: https://chromium-review.googlesource.com/272983\nReviewed-by: Shawn N \u003cshawnn@chromium.org\u003e\n\nThis is the 2nd commit message:\n\nlinux_mtd: Fix compilation errors\n\nThis fixes compilation errors from the initial import patch.\n\nSigned-off-by: David Hendricks \u003cdhendricks@fb.com\u003e\n\nThis is the 3rd commit message:\n\nlinux_mtd: Suppress message if NOR device not found\n\nThis just suppresses a message that might cause confusion for\nunsuspecting users.\n\nBUG\u003dnone\nBRANCH\u003dnone\nTEST\u003dran on veyron_mickey, \"NOR type device not found\" message\nno longer appears under normal circumstances.\nSigned-off-by: David Hendricks \u003cdhendrix@chromium.org\u003e\n\nReviewed-on: https://chromium-review.googlesource.com/302145\nCommit-Ready: David Hendricks \u003cdhendrix@chromium.org\u003e\nTested-by: David Hendricks \u003cdhendrix@chromium.org\u003e\nReviewed-by: Shawn N \u003cshawnn@chromium.org\u003e\n\nThis is the 4th commit message:\n\nlinux_mtd: Support for NO_ERASE type devices\n\nSome mtd devices have the MTD_NO_ERASE flag set. This means\nthese devices don\u0027t require an erase to write and might not have\nimplemented an erase function. We should be conservative and skip\nerasing altogether, falling back to performing writes over the whole\nflash.\n\nBUG\u003db:35104688\nTESTED\u003dZaius flash is now written correctly for the 0xff regions.\n\nSigned-off-by: William A. Kennington III \u003cwak@google.com\u003e\nReviewed-on: https://chromium-review.googlesource.com/472128\nCommit-Ready: William Kennington \u003cwak@google.com\u003e\nTested-by: William Kennington \u003cwak@google.com\u003e\nReviewed-by: Brian Norris \u003cbriannorris@chromium.org\u003e\n\nThis is the 5th commit message:\n\nlinux_mtd: do reads in eraseblock-sized chunks\n\nIt\u0027s probably not the best idea to try to do an 8MB read in one syscall.\nTheoretically, this should work; but MTD just relies on the SPI driver\nto deliver the whole read in one transfer, and many SPI drivers haven\u0027t\nbeen tested well with large transfer sizes.\n\nI\u0027d consider this a workaround, but it\u0027s still good to have IMO.\n\nBUG\u003dchrome-os-partner:53215\nTEST\u003dboot kevin; `flashrom --read ...`\nTEST\u003dcheck for performance regression on oak\nBRANCH\u003dnone\n\nSigned-off-by: Brian Norris \u003cbriannorris@chromium.org\u003e\nReviewed-on: https://chromium-review.googlesource.com/344006\nReviewed-by: David Hendricks \u003cdhendrix@chromium.org\u003e\n\nThis is the 6th commit message:\n\nlinux_mtd: make read/write loop chunks consistent, and documented\n\nTheoretically, there should be no maximum size for the read() and\nwrite() syscalls on an MTD (well, except for the size of the entire\ndevice). But practical concerns (i.e., bugs) have meant we don\u0027t quite\ndo this.\n\nFor reads:\nBug https://b/35573113 shows that some SPI-based MTD drivers don\u0027t yet\nhandle very large transactions. So we artificially limit this to\nblock-sized chunks.\n\nFor writes:\nIt\u0027s not clear there is a hard limit. Some drivers will already split\nlarge writes into smaller chunks automatically. Others don\u0027t do any\nsplitting. At any rate, using *small* chunks can actually be a problem\nfor some devices (b:35104688), as they get worse performance (doing an\ninternal read/modify/write). This could be fixed in other ways by\nadvertizing their true \"write chunk size\" to user space somehow, but\nthis isn\u0027t so easy.\n\nAs a simpler fix, we can just increase the loop increment to match the\nread loop. Per David, the original implementation (looping over page\nchunks) was just being paranoid.\n\nSo this patch:\n * clarifies comments in linux_mtd_read(), to note that the chunking is\n   somewhat of a hack that ideally can be fixed (with bug reference)\n * simplifies the linux_mtd_write() looping to match the structure in\n   linux_mtd_read(), including dropping several unnecessary seeks, and\n   correcting the error messages (they referred to \"reads\" and had the\n   wrong parameters)\n * change linux_mtd_write() to align its chunks to eraseblocks, not page\n   sizes\n\nNote that the \"-\u003epage_size\" parameter is still somewhat ill-defined, and\nonly set by the upper layers for \"opaque\" flash. And it\u0027s not actually\nused in this driver now. If we could figure out what we really want to\nuse it for, then we could try to set it appropriately.\n\nBRANCH\u003dnone\nBUG\u003db:35104688\nTEST\u003dvarious flashrom tests on Kevin\nTEST\u003dReading and writing to flash works on our zaius machines over mtd\n\nChange-Id: I3d6bb282863a5cf69909e28a1fc752b35f1b9599\nSigned-off-by: Brian Norris \u003cbriannorris@chromium.org\u003e\nReviewed-on: https://chromium-review.googlesource.com/505409\nReviewed-by: David Hendricks \u003cdhendrix@chromium.org\u003e\nReviewed-by: Martin Roth \u003cmartinroth@chromium.org\u003e\nReviewed-by: William Kennington \u003cwak@google.com\u003e\nReviewed-on: https://review.coreboot.org/25706\nTested-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Philipp Deppenwiese \u003czaolin.daisuki@gmail.com\u003e\n"
    },
    {
      "commit": "e083880279119677e443fc16b4694f8c81bf2c40",
      "tree": "03413b996779bc4c86ec41590f3e7bcdd97d0ef5",
      "parents": [
        "124ef38f7afc61ad7c713c22aad7c5c7f79bdb9b"
      ],
      "author": {
        "name": "Elyes HAOUAS",
        "email": "ehaouas@noos.fr",
        "time": "Mon Apr 02 11:14:02 2018 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Apr 24 20:21:41 2018 +0000"
      },
      "message": "Remove address from GPLv2 headers\n\nChange-Id: I7bfc339673cbf5ee2d2ff7564c4db04ca088d0a4\nSigned-off-by: Elyes HAOUAS \u003cehaouas@noos.fr\u003e\nReviewed-on: https://review.coreboot.org/25381\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "b6e3d257f97fd4e3998e0743968d17010047b4c1",
      "tree": "6932c164c28e36b00788b35db201dbe40660e058",
      "parents": [
        "22418428ed28d803bfca151623bbf017d1ba6bfc"
      ],
      "author": {
        "name": "Antonio Ospite",
        "email": "ao2@ao2.it",
        "time": "Sat Mar 03 18:40:24 2018 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Mar 23 14:31:49 2018 +0000"
      },
      "message": "Fix compilation with older MinGW versions\n\nThe __MINGW_PRINTF_FORMAT constant has been defined back in 2012\nhttps://sourceforge.net/p/mingw-w64/mingw-w64/ci/77bc5d6103b5fb9f59fbddab1583e69549913312/\n\nHowever older toolchains are still around and some user reported the\nfollowing compilation failure:\n\n  flash.h:336:1: error: \u0027__MINGW_PRINTF_FORMAT\u0027 is an unrecognized format function  type [-Werror\u003dformat\u003d]\n    __attribute__((format(__MINGW_PRINTF_FORMAT, 2, 3)));\n\nFix this by defining the constant when it isn\u0027t already; the change does\nnot affect other compilers because it\u0027s guarded by \"#ifdef __MINGW32__\".\n\nSetting  __MINGW_PRINTF_FORMAT to gnu_printf is exactly what newer MinGW\nversions do when __USE_MINGW_ANSI_STDIO is defined, which it is in\nflashrom Makefile.\n\nChange-Id: I48de3e4303b9a389c515a8ce230282d9210576fd\nTested-by: Miklos Marton \u003cmartonmiklosqdev@gmail.com\u003e\nSigned-off-by: Antonio Ospite \u003cao2@ao2.it\u003e\nReviewed-on: https://review.coreboot.org/25130\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "f701f343117270b4373320eb25ae259b8e513b7d",
      "tree": "2749940aec9f2b1dc0ad53069079b78f225d76cf",
      "parents": [
        "3a826043dbd389b4be2f5783c1b984ba297b8179"
      ],
      "author": {
        "name": "Paul Kocialkowski",
        "email": "contact@paulk.fr",
        "time": "Mon Jan 15 01:10:36 2018 +0300"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Feb 11 16:54:14 2018 +0000"
      },
      "message": "Add support for reading the current flash contents from a file\n\nWhen developing software that has to be flashed to a flash chip to be\nexecuted, it often takes a long time to read the current flash contents\n(for flashrom to know what pages to erase and reprogram) each time\nwhen writing the new image. However, when the flash was just reprogrammed,\nits current state is known to be the previous image that was flashed\n(assuming it was verified).\n\nThus, it makes sense to provide that image as a file for the flash contents\ninstead of wasting valuable time read the whole flash each time.\n\nChange-Id: Idf153b6955f37779ae9bfb228a434ed10c304947\nSigned-off-by: Mike Banon \u003cmikebdp2@gmail.com\u003e\nSigned-off-by: Paul Kocialkowski \u003ccontact@paulk.fr\u003e\nReviewed-on: https://review.coreboot.org/23263\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "80ae14e5105bb938679193906d1ee43b7a51c094",
      "tree": "629130fad3e6b0b731429bb90dc8e285a91ea8ab",
      "parents": [
        "995f755ff569cbf6ed8d4eec5920b41628aa8ac9"
      ],
      "author": {
        "name": "Paul Kocialkowski",
        "email": "contact@paulk.fr",
        "time": "Mon Jan 15 01:07:46 2018 +0300"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Feb 11 16:53:34 2018 +0000"
      },
      "message": "Add support for the ENE Embedded Debug Interface EDI and KB9012 EC\n\nThe ENE Embedded Debug Interface (EDI) is a SPI-based interface for\naccessing the memory of ENE embedded controllers.\n\nThe ENE KB9012 EC is an embedded controller found on various laptops\nsuch as the Lenovo G505s. It features a 8051 microcontroller and\nhas 128 KiB of internal storage for program data.\n\nEDI can be accessed on the KB9012 through pins 59-62 (CS-CLK-MOSI-MISO)\nwhen flash direct access is not in use. Some firmwares disable EDI at runtime\nso it might be necessary to ground pin 42 to reset the 8051 microcontroller\nbefore accessing the KB9012 via EDI.\n\nThe example of flashing KB9012 at Lenovo G505S laptop could be found here:\nhttp://dangerousprototypes.com/docs/Flashing_KB9012_with_Bus_Pirate\n\nChange-Id: Ib8b2eb2feeef5c337d725d15ebf994a299897854\nSigned-off-by: Mike Banon \u003cmikebdp2@gmail.com\u003e\nSigned-off-by: Paul Kocialkowski \u003ccontact@paulk.fr\u003e\nReviewed-on: https://review.coreboot.org/23259\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "995f755ff569cbf6ed8d4eec5920b41628aa8ac9",
      "tree": "8bf525250f29a35eac59e1140da8c039790842cd",
      "parents": [
        "31b5e3bfe6c01180d9a079813ecd199b4808315d"
      ],
      "author": {
        "name": "Paul Kocialkowski",
        "email": "contact@paulk.fr",
        "time": "Mon Jan 15 01:06:09 2018 +0300"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Feb 11 16:52:48 2018 +0000"
      },
      "message": "Add support for selecting the erased bit value with a flag\n\nMost flash chips are erased to ones and programmed to zeros. However, some\nother chips, such as the ENE KB9012 internal flash, work the opposite way.\n\nChange-Id: Ia7b0de8568e31f9bf263ba0ad6b051e837477b6b\nSigned-off-by: Mike Banon \u003cmikebdp2@gmail.com\u003e\nSigned-off-by: Paul Kocialkowski \u003ccontact@paulk.fr\u003e\nReviewed-on: https://review.coreboot.org/23258\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "31b5e3bfe6c01180d9a079813ecd199b4808315d",
      "tree": "3acefe04a94524cf9f3fdd47d4136f7c5b137b60",
      "parents": [
        "305a2b3ed36ce87663aea177a806c6f435a4ceec"
      ],
      "author": {
        "name": "Mike Banon",
        "email": "mikebdp2@gmail.com",
        "time": "Mon Jan 15 01:10:00 2018 +0300"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Feb 11 16:52:30 2018 +0000"
      },
      "message": "Add a SPI command class to `struct flashchip`\n\nBy default, we want to probe for SPI25 chips only. Other SPI use cases,\nlike the ENE/EDI protocol, might use commands that can confuse these\ncommon chips.\n\nNow, flashrom will probe for a chip only if one of these conditions is\ntrue:\n1) no chip has been specified AND the chip uses the SPI25 commands\n2) this chip has been specified by -c | --chip \u003cchipname\u003e\n\nThe CLI can later be extended to probe for a specific class of chips.\n\nChange-Id: I89a53ccaef2791a2ac32904d7ab813da7478a6f0\nSigned-off-by: Mike Banon \u003cmikebdp2@gmail.com\u003e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/23262\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Paul Kocialkowski \u003ccontact@paulk.fr\u003e\n"
    },
    {
      "commit": "aac81424ebb8234b54cbab8fe47350b562b84fae",
      "tree": "2806be52075a5a3a46c5e7be2ccdb6d69b6e1a0f",
      "parents": [
        "fe34d2af28bd81aaa1e23ba38febaa98ec4bb90c"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Nov 10 22:54:13 2017 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Jan 02 20:15:35 2018 +0000"
      },
      "message": "flashchips: Revise all 4BA chips\n\nAdvertise all 4BA features that are currently supported by flashrom,\nplus add a new feature flag for the 4BA fast-read instruction. Also,\nlist all supported 3BA and 4BA erase-block functions.\n\nAs this adds a lot of new code paths that could be taken for these\nchips, mark them all as untested again.\n\nChange-Id: I0598496ee7058e3b170684d366f58e4014e0e871\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/22423\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "fe34d2af28bd81aaa1e23ba38febaa98ec4bb90c",
      "tree": "53bda4d3445a94505455ffb12a96da602ba97af6",
      "parents": [
        "1cf407b4f8d56035816efaf936a40553441eca46"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Nov 10 21:10:20 2017 +0100"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Tue Jan 02 20:15:30 2018 +0000"
      },
      "message": "spi25: Revise decision when to enter/exit 4BA mode\n\nInstead of arbitrarily deciding whether to enter 4BA mode in the flash\nchip\u0027s declaration, advertise that entering 4BA mode is supported and\nonly enter it if the SPI master supports 4-byte addresses. If not, exit\n4BA mode (the chip might be in 4BA mode after reset). If we can\u0027t assure\nthe state of 4BA mode, we bail out to simplify the code (we\u0027d have to\nensure that we don\u0027t run any instructions that can usually be switched\nto 4BA mode otherwise).\n\nTwo new feature flags are introduced:\n\n* FEATURE_4BA_ENTER:\n  Can enter/exit 4BA mode with instructions 0xb7/0xe9 w/o WREN.\n* FEATURE_4BA_ENTER_WREN\n  Can enter/exit 4BA mode with instructions 0xb7/0xe9 after WREN.\n\nFEATURE_4BA_SUPPORT is dropped, it\u0027s completely implicit now.\n\nAlso, draw the with/without WREN distinction into the enter/exit\nfunctions to reduce code redundancy.\n\nChange-Id: I877fe817f801fc54bd0ee2ce4e3ead324cbb3673\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/22422\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "ed098d62d66d91cf7330a37f9b83e303eb7f56d8",
      "tree": "639b6233e588fd8b4150b42112da36e239ba7fa4",
      "parents": [
        "7e3c81ae7122120fe10d43fcba61a513e2461de9"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Apr 21 23:47:08 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Dec 28 10:49:05 2017 +0000"
      },
      "message": "spi: Move ICH BBAR quirk out of the way\n\nGet rid of the layering violations around ICH\u0027s BBAR. Move all the weird\naddress handling into (surprise, surprise) `ichspi.c`. Might fix writes\nfor the `BBAR !\u003d 0` case by accident.\n\nBackground: Some ICHs have a BBAR (BIOS Base Address Configuration\nRegister) that, if set, limits the valid address range to [BBAR, 2^24).\nCurrent code lifted addresses for REMS, RES and READ operations by BBAR,\nnow we do it for all addresses in ichspi. Special care has to be taken\nif the BBAR is not aligned by the flash chip\u0027s size. In this case, the\nlower part of the chip (from BBAR aligned down, up to BBAR) is inacces-\nsible (this seems to be the original intend behind BBAR) and has to be\nleft out in the address offset calculation.\n\nChange-Id: Icbac513c5339e8aff624870252133284ef85ab73\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/22396\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "7a077222566c84546dca4a56c1a509626036e429",
      "tree": "b4cd487275dd4ffc92ad6ac885268842efbe9eb3",
      "parents": [
        "a1672f829328e877d9b8dea7777f25e2eba52d0e"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Oct 14 18:18:30 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Dec 28 10:46:54 2017 +0000"
      },
      "message": "spi25: Remove now obsolete `four_bytes_addr_funcs` path\n\nChange-Id: Idb7c576cb159630da2268813388b497cb5f46b43\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/22386\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "a1672f829328e877d9b8dea7777f25e2eba52d0e",
      "tree": "8f90cab7e18bc875241ff66eef153b80e7c4a71b",
      "parents": [
        "f43c654ad0dcb11b2738bbfac9246d09bb1949e5"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Oct 14 18:00:20 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Dec 28 10:45:46 2017 +0000"
      },
      "message": "spi25: Enable native 4BA read and write using feature bits\n\nPrefer the native 4BA instruction when they are supported. In this\ncase, override our logic to decide to use a 4BA address.\n\nChange-Id: I2f6817ca198bf923671a7aa67e956e5477d71848\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/22385\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "f43c654ad0dcb11b2738bbfac9246d09bb1949e5",
      "tree": "1d1f74d771dc2e8e8a67dab985945c00f68e0097",
      "parents": [
        "0ecbacbfca7f919f1780f5062c775d94c7869d81"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Oct 14 17:47:28 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Dec 28 10:44:17 2017 +0000"
      },
      "message": "spi25: Integrate 4BA support\n\nAllow 4-byte addresses for instructions usually used with 3-byte\naddresses. Decide in which way the 4th byte will be communicated\nbased on the state of the chip (i.e. have we enabled 4BA mode)\nand a new feature bit for an extended address register. If we\nare not in 4BA mode and no extended address register is available\nor the write to it fails, bail out.\n\nWe cache the state of 4BA mode and the extended address register\nin the flashctx.\n\nChange-Id: I644600beaab9a571b97b67f7516abe571d3460c1\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/22384\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "a3140d0b18058610a2694fc3592031a849b0c92a",
      "tree": "194083a9889bb76a70cb447a14660d6ec449506c",
      "parents": [
        "c8801734727e1e510cbd99e305007b73f9f57e93"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Oct 15 11:20:58 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Dec 28 10:41:38 2017 +0000"
      },
      "message": "spi25: Introduce spi_simple_write_cmd()\n\nspi_simple_write_cmd() executes WREN plus a single byte write and polls\nWIP afterwards. It\u0027s used to replace current spi_erase_chip_*() imple-\nmentations.\n\nChange-Id: Ib244356fa471e15863b52e6037899d19113cb4a9\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/22382\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "f268d8b2d6fe5ea5ab0e0e2c5eec02c16d023ce5",
      "tree": "e1bc61384072608248941a03ed03b1c0507816be",
      "parents": [
        "e1a960e0a520263b380d898459b6909a8d7f59c5"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@gmx.at",
        "time": "Thu Oct 26 18:45:00 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Fri Nov 03 16:50:17 2017 +0000"
      },
      "message": "Fix standalone ich_descriptor_tool compilation with MinGW and DJGPP\n\nTARGET_OS as well as EXEC_SUFFIX were only set when called via the\nmain makefile and even then __USE_MINGW_ANSI_STDIO was not set\nfor MinGW.\n\nWhile at it, also replace the hardcoded gnu_printf printf format\nattribute with __MINGW_PRINTF_FORMAT which is set according to\n__USE_MINGW_ANSI_STDIO respectively.\n\nChange-Id: Id146f5ba06a0e510397c6f32a2bd7c819a405a25\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@gmx.at\u003e\nReviewed-on: https://review.coreboot.org/21838\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "cc20a9b08e849437a58402f4a64d63d3710684af",
      "tree": "01975202af6298ab6c357532b0e1d6e1d77715b8",
      "parents": [
        "d94d254262594b912c65511b5d0675c6ab900d60"
      ],
      "author": {
        "name": "Ed Swierk",
        "email": "eswierk@skyportsystems.com",
        "time": "Mon Jul 03 13:17:18 2017 -0700"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Oct 15 12:37:03 2017 +0000"
      },
      "message": "4BA: Allow disabling 4-byte address mode for SPI flash\n\nThis allows us to support flash chips in any of the following\nconfigurations, regardless of whether the chip powers up in 3-byte or\n4-byte address mode.\n\n- standard commands with extended address register (*_4ba_ereg) or\n  direct commands (*_4ba_direct) in 3-byte address mode (.set_4ba \u003d\n  spi_exit_4ba_*)\n- standard commands (*_4ba) or direct commands (*_4ba_direct) in\n  4-byte address mode (.set_4ba \u003d spi_enter_4ba_*)\n- direct commands (*_4ba_direct) in either address mode (.set_4ba \u003d\n  NULL)\n\nChange-Id: I0b25309d731426940fc50956b744b681ab599e87\nSigned-off-by: Ed Swierk \u003ceswierk@skyportsystems.com\u003e\nReviewed-on: https://review.coreboot.org/20510\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "7fe85694c4a597abb2a83c2f0f3a62a1a22e130e",
      "tree": "0da033666d79e9b3dc471762d1b02ee41a7a7a8d",
      "parents": [
        "5de3b9b7263196b1d2bf41659ca44c7ea386b8ab"
      ],
      "author": {
        "name": "Boris Baykov",
        "email": "dev@borisbaykov.com",
        "time": "Sat Jun 11 18:29:03 2016 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Oct 15 12:35:08 2017 +0000"
      },
      "message": "4BA: Support for new direct-4BA instructions + W25Q256.V update\n\nLarge flash chips usually support special instructions to work with\n4-bytes address directly from 3-bytes addressing mode and without\ndo switching to 4-bytes mode. There are 13h (4BA Read), 12h (4BA Program)\nand 21h,5Ch,DCh (4BA Erase), correspondingly. However not all these\ninstructions are supported by all large flash chips. Some chips\nsupport 13h only, some 13h,12h,21h and DCh, but not 5Ch. This depends\non the manufacturer of the chip.\n\nThis patch provides code to use direct 4-bytes addressing instructions.\n\nThis code should work but it tested partially only. My W25Q256FV has\nsupport for 4BA_Read (13h), but doesn\u0027t have support 4BA_Program (12h)\nand 4BA_Erase instructions. So, direct 4BA program and erase\nshould be tested after.\n\nPatched files\n-------------\nchipdrivers.h\n+ added functions declarations for spi4ba.c\n\nflash.h\n+ feature definitions added\n\nflashchips.c\n+ modified definition of Winbond W25Q256BV/W25Q256FV chips\n\nflashrom.c\n+ modified switch to 4-bytes addressing for direct-4BA instructions\n\nspi4ba.h\n+ definitions for 4-bytes addressing JEDEC commands\n+ functions declarations from spi4ba.c (same as in chipdrivers.h, just to see)\n\nspi4ba.c\n+ functions for read/write/erase directly with 4-bytes address (from any mode)\n\nChange-Id: Ib51bcc5de7826b30ad697fcbb9a5152bde2c2ac9\nSigned-off-by: Boris Baykov \u003cdev@borisbaykov.com\u003e, Russia, Jan 2014\n[clg: ported from\n      https://www.flashrom.org/pipermail/flashrom/2015-January/013198.html ]\nSigned-off-by: Cédric Le Goater \u003cclg@kaod.org\u003e\nReviewed-on: https://review.coreboot.org/20508\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "5de3b9b7263196b1d2bf41659ca44c7ea386b8ab",
      "tree": "f3480e7191c83965a9ab97d429f090e07f30a552",
      "parents": [
        "aa6c37444c1d1a5944ea8bb3912bb0efe27dffce"
      ],
      "author": {
        "name": "Boris Baykov",
        "email": "dev@borisbaykov.com",
        "time": "Sat Jun 11 18:29:02 2016 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Oct 15 12:33:37 2017 +0000"
      },
      "message": "4BA: Support for 4-bytes addressing via Extended Address Register\n\nOn some flash chips data with addresses more than 24-bit field\ncan address may be accessed by using Extended Address Register.\nThe register has 1-byte size and stores high byte of 32-bit address.\nThen flash can be read from 3-bytes addressing mode with writing\nhigh byte of address to this Register. By using this way we have\naccess to full memory of a chip. Some chips may support this method\nonly.\n\nThis patch provides code use Extended Address Register.\n\nPatched files\n-------------\nchipdrivers.h\n+ added functions declarations for spi4ba.c\n\nflash.h\n+ feature definitions added\n\nflashrom.c\n+ modified switch to 4-bytes addressing to support extended address register\n\nspi4ba.h\n+ definitions for 4-bytes addressing JEDEC commands\n+ functions declarations from spi4ba.c (same as in chipdrivers.h, just to see)\n\nspi4ba.c\n+ functions for write Extended Address Register\n+ functions for read/write/erase with Extended Address Register\n\nChange-Id: I09a8aa11de2ca14901f142c67c83c4fa0def4e27\nSigned-off-by: Boris Baykov \u003cdev@borisbaykov.com\u003e, Russia, Jan 2014\n[clg: ported from\n      https://www.flashrom.org/pipermail/flashrom/2015-January/013200.html ]\nSigned-off-by: Cédric Le Goater \u003cclg@kaod.org\u003e\nReviewed-on: https://review.coreboot.org/20507\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "9912718de18e455e16d26458aca4eac37f792aa2",
      "tree": "d447b47feb1d0f497c17ab6941e0b4c9afbed5cb",
      "parents": [
        "b1f88360fc806ee69d7cf1b9404b3977bc53aace"
      ],
      "author": {
        "name": "Boris Baykov",
        "email": "dev@borisbaykov.com",
        "time": "Sat Jun 11 18:29:00 2016 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sun Oct 15 12:30:26 2017 +0000"
      },
      "message": "4BA: Flashrom integration for the 4-bytes addressing extensions\n\nThis patch integrates code of the previous patch into Flashrom\u0027s code.\nAll the integrations is around 3 functions spi_nbyte_read, spi_nbyte_program\nand spi_byte_program. After this patch then are not static and can be called\nby their pointers saved in flashchips array. Also I added to flashrom.c some\ncode to switch a chip to 4-bytes addressing mode. And one error message is\ncorrected in spi.c because it\u0027s not suitable for 32-bit addresses.\n\nPatched files\n-------------\nflash.h\n+ added set of 4-bytes address functions to flashchip structure definition\n\nflashrom.c\n+ added switch to 4-bytes addressing more for chips which support it\n\nserprog.c\n+ added 4-bytes addressing spi_nbyte_read call to serprog_spi_read\n\nspi.c\n+ fixed flash chip size check in spi_chip_read\n\nspi25.c\n+ added 4-bytes addressing spi_nbyte_read call to spi_read_chunked\n+ added 4-bytes addressing spi_nbyte_program call to spi_write_chunked\n+ added 4-bytes addressing spi_byte_program call to spi_chip_write_1\n\nConflicts:\n\tserprog.c\n\nChange-Id: Ib051cfc93bd4aa7580519e0e6206d025f3ca8049\nSigned-off-by: Boris Baykov \u003cdev@borisbaykov.com\u003e, Russia, Jan 2014\n[clg: ported from\n      https://www.flashrom.org/pipermail/flashrom/2015-January/013205.html ]\nSigned-off-by: Cédric Le Goater \u003cclg@kaod.org\u003e\nReviewed-on: https://review.coreboot.org/20505\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "b1f88360fc806ee69d7cf1b9404b3977bc53aace",
      "tree": "9c2b6aac3c378702d1596b8eb506f87b180638a0",
      "parents": [
        "50a5660c9c11c77c794783cd9a3343bc3ff07b6e"
      ],
      "author": {
        "name": "Boris Baykov",
        "email": "dev@borisbaykov.com",
        "time": "Sat Jun 11 18:28:59 2016 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Oct 14 10:10:17 2017 +0000"
      },
      "message": "fixup! 4BA: Basic support for 4-bytes addressing mode extensions\n\nFix some whitespace, and braces. Remove sector size from comments that I\ncould not verify.\n\nChange-Id: I4faaa036fea744135fa37f405686fb9fd0882806\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/21947\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "50a5660c9c11c77c794783cd9a3343bc3ff07b6e",
      "tree": "7095a74f39788084a14c3657bc3b868f923f5340",
      "parents": [
        "f4d7772cee806d68a06db5394ab85a6e76904e88"
      ],
      "author": {
        "name": "Boris Baykov",
        "email": "dev@borisbaykov.com",
        "time": "Sat Jun 11 18:28:59 2016 +0200"
      },
      "committer": {
        "name": "David Hendricks",
        "email": "david.hendricks@gmail.com",
        "time": "Sat Oct 14 00:46:41 2017 +0000"
      },
      "message": "4BA: Basic support for 4-bytes addressing mode extensions\n\nIf flash chip is switched to 4-bytes addressing mode then all\nread/erase/program instructions will be switched from 3-bytes mode\nto 4-bytes mode. Then well known instructions like 03h (Read),\n02h (Program) and 20h,52h,D8h (Erase) will become one byte longer\nand accept 4-bytes address instead of 3-bytes.\n\nThis patch provides support for well known instructions in 4-bytes\naddressing mode. Also here is the code to enter 4-bytes addressing\nmode by execute the instruction B7h (Enter 4-bytes mode).\n\nPatched files\n-------------\nchipdrivers.h\n+ added functions declarations for spi4ba.c\n\nflash.h\n+ feature definitions added\n\nMakefile\n+ added spi4ba.c\n\nAdded files\n-----------\nspi4ba.h\n+ definitions for 4-bytes addressing JEDEC commands\n+ functions declarations from spi4ba.c (same as in chipdrivers.h, just to see)\n\nspi4ba.c\n+ functions for enter 4-bytes addressing mode\n+ functions for read/write/erase in 4-bytes addressing mode\n\nChange-Id: Ie72e2a89cd75fb4d09f48e81c4c1d927c317b7a7\nSigned-off-by: Boris Baykov \u003cdev@borisbaykov.com\u003e, Russia, Jan 2014\n[clg: ported from\n      https://www.flashrom.org/pipermail/flashrom/2015-January/013199.html ]\nSigned-off-by: Cédric Le Goater \u003cclg@kaod.org\u003e\nReviewed-on: https://review.coreboot.org/20513\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "d152fb95e2b7fda62a85f6c8e4112ba9f353a8d6",
      "tree": "cfd2ea28b75cb90db72f488ee237a068d0cb52a4",
      "parents": [
        "731316a9128c4015bc0facd1743afeb3a080129e"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Mon Jun 19 12:57:10 2017 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jul 13 16:27:55 2017 +0000"
      },
      "message": "Drop redundant `enum msglevel`\n\nUse `enum flashrom_log_level` instead to avoid further confusion.\n\nChange-Id: I1895cb8f60da3abf70c9c2953f52414cd2cc10a9\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/20268\nReviewed-by: Paul Menzel \u003cpaulepanter@users.sourceforge.net\u003e\nReviewed-by: Philippe Mathieu-Daudé \u003cf4bug@amsat.org\u003e\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "2d62572d1dd0c37eb626fd8faa17b26690f20b15",
      "tree": "c76d5035e6fe7b8f9ca841c7030a7f44712f3d16",
      "parents": [
        "8d494992176abe0877c88f06fdbc9c8d8826ae87"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Tue May 03 10:48:02 2016 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Thu Jun 22 10:34:51 2017 +0000"
      },
      "message": "Fix linking with libpayload\n\no Move flashbuses_to_text() to flashrom.c, it\u0027s not a cli function.\no Guard `!defined(HAVE_STRNLEN)`. This guard was introduced in\n  23e10b87 (Add a bunch of new/tested stuff and various small\n  changes 24) to support older BSDs. It\u0027s probably completely\n  broken because HAVE_STRNLEN is presumably a GNU autotools\n  thing. But we can\u0027t fix it without retesting these older BSDs.\n\nChange-Id: I561135209b819361d125eeaeef9ff886d6bae987\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/18738\nReviewed-by: Philippe Mathieu-Daudé \u003cf4bug@amsat.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n"
    },
    {
      "commit": "305f417ea565a18c1e87dcf5d97307369b721c6c",
      "tree": "75fd4a1087415f99a64d0a5f26eaddcb54969883",
      "parents": [
        "ad18631b59d814b38bb6757df93fac17937a6bc9"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Fri Jun 14 11:55:26 2013 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Wed Jun 14 11:43:32 2017 +0200"
      },
      "message": "Add option to read ROM layout from IFD\n\nAdd an option --ifd to read the ROM layout from an Intel Firmware\nDescriptor (IFD). Works the same as the -l option, if given, -i\nspecifies the images to update.\n\nv2: o Rebased on libflashrom, use libflashrom interface.\n    o Use functions from ich_descriptors.c.\n\nv3: o Move ich_descriptors.o to LIB_OBJS, thus build it independent\n      of arch and programmers.\n    o Bail out if we aren\u0027t compiled for little endian.\n    o Update flashrom.8.tmpl.\n\nv4: o Incorporated David\u0027s comments.\n    o Removed single-character `-d` option.\n\nv5: Changed region names to match the output of `ifdtool --layout ...`\n\nChange-Id: Ifafff2bf6d5c5e62283416b3269723f81fdc0fa3\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/17953\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\n"
    },
    {
      "commit": "899e4ec810a1e2f3d377bc2095ba3d25b234a797",
      "tree": "270ac1d7101251d95a295effcbe5cf01ce2250f4",
      "parents": [
        "1878110848f36c53667c9855f0a413c43e64597f"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Fri Apr 29 18:39:01 2016 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Jun 03 20:19:30 2017 +0200"
      },
      "message": "Kill doit()\n\nNo words can describe this feeling.\n\nv2: Rejoice while removing more, orphaned code (layout.c).\n\nChange-Id: Id81177c50b4410e68dcf8ebab48386a94cd9b714\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/17949\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "1878110848f36c53667c9855f0a413c43e64597f",
      "tree": "66bacd63991be932b3d031dfe280576449b3280e",
      "parents": [
        "a9fc4f4ebf335f3f20a47a48f2b9c2b00a4de696"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Mon Dec 10 13:34:12 2012 +0000"
      },
      "committer": {
        "name": "David Hendricks",
        "email": "david.hendricks@gmail.com",
        "time": "Sat Jun 03 20:15:56 2017 +0200"
      },
      "message": "Adapt CLI to use new libflashrom interface\u0027 print callback\n\nThis renames CLI\u0027s print() to flashrom_print_cb() and registers it\nthrough the new libflashrom interface.\n\nv2: Add libflashrom.o to LIB_OBJS now that everything can be linked\n    together.\n\nChange-Id: Idf19978eb8e340d258199193d2978f37409e9983\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/17948\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "454f61338213f73ca74fda54c0bf86afb01947de",
      "tree": "5c981a1a181c130467d3c37b99cdeaf686ff49c8",
      "parents": [
        "7af0e79b44bdc86497a992a90855f284e74d73f1"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Mon Dec 10 13:34:10 2012 +0000"
      },
      "committer": {
        "name": "David Hendricks",
        "email": "david.hendricks@gmail.com",
        "time": "Sat Jun 03 20:13:06 2017 +0200"
      },
      "message": "Add a convenient libflashrom interface\n\nThis adds a minimal libflashrom interface based on the draft in the\nwiki. While the glue code in libflashrom.c is build on top of the\nexisting code instead on overhauling it, the interface in libflashrom.h\nis supposed to be stable. So we can keep the interface and adapt\ninternals later if favoured, without breaking clients.\n\nA new make target, libinstall, is also added. It installs libflashrom.a\nand libflashrom.h in lib/ and include/ dirs respectively.\n\nHooking this into the build would break linking of the CLI and is post-\nponed until that got fixed.\n\nv2: Rebase and fixes by Anton Kochkov.\n\nv3: o fl_image_*() rewritten with layout support (touch only included regions).\n    o Moved read/erase/write/verify operations to flashrom.c.\n    o Added layout pointer and flags to the flash context.\n\nv4: Removed libflashrom.o from LIB_OBJS until CLI is adapted.\n\nv5: o Incorporated David\u0027s comments.\n    o Added `fl_flashprog_t` as dummy parameter to hide the fact that\n      we have global state all around, and for future-proofness ofc.\n\nv6: o Change namespace prefix to flashrom_.\n    o Remove typedefs.\n\nChange-Id: I00f169990830aa17b7dfae5eb74010d40c476181\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/17946\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "7af0e79b44bdc86497a992a90855f284e74d73f1",
      "tree": "df4c2b5d2776597d14b459f9c5e8430a55c7c075",
      "parents": [
        "3a9939b952e614cd8e9e0530c22453f8f91c4e3a"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Fri Apr 29 16:40:15 2016 +0200"
      },
      "committer": {
        "name": "David Hendricks",
        "email": "david.hendricks@gmail.com",
        "time": "Sat Jun 03 20:07:39 2017 +0200"
      },
      "message": "Add functions to read/erase/write/verify by layout\n\nInspired by Lynxis\u0027 related work, this implements a foundation for\nlayout based flash access.\n\nAll operations iterate over the given layout regions. Erase and write\nthen walk, per region, over all erase blocks in an inner loop (which\nmight not be what we want, see note on optimization below). Special care\nhas been taken that flash content is merged properly, in case an erase\nblock is only partially covered by a layout region or even affects mul-\ntiple regions.\n\nA note on performance: In the case an erase block affects multiple\nregions, it will probably be read, erased and written for each region.\nAnother approach would be to walk all erase blocks once and check for\neach erase block which regions it touches (i.e. for each erase block,\nmerge data pontentially from the flash and all layout regions, then\nflash the combined data). That might result in cleaner code. I haven\u0027t\ntried it yet, though.\n\nChange-Id: Ic6194cea4c4c430e0cf9d586052508a865b09c86\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/17945\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n"
    },
    {
      "commit": "3a9939b952e614cd8e9e0530c22453f8f91c4e3a",
      "tree": "615a0ccb696f08e7761204b35eff57150c4858aa",
      "parents": [
        "9e14aeda6464b2ecb391186e5b21bf5985141499"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Wed Apr 27 15:56:14 2016 +0200"
      },
      "committer": {
        "name": "Nico Huber",
        "email": "nico.h@gmx.de",
        "time": "Sat Jun 03 12:18:02 2017 +0200"
      },
      "message": "Give layouts their own type\n\nIntroduce `struct flashrom_layout` and refactor layout.c a little, so\nwe can reuse the layout from there and have other sources of layouts\nbeside it.\n\nI didn\u0027t want to clutter up flash.h any more. So things went into a new\nlayout.h.\n\nChange-Id: Icea1a58c283131cc9c5fde6f16d783538dc1a4c7\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/17944\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nReviewed-by: Philippe Mathieu-Daudé \u003cphilippe.mathieu.daude@gmail.com\u003e\n"
    },
    {
      "commit": "23e10b87801c22f34642895de8b0b726265eb016",
      "tree": "2d62c23191801afaecbf98925effb8b8c7a44ab6",
      "parents": [
        "c2644a3fc14088a2535c05edbd56c041b3a7370d"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Jan 23 16:16:49 2016 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Jan 23 16:16:49 2016 +0000"
      },
      "message": "Add a bunch of new/tested stuff and various small changes 24\n\nTested mainboards:\nOK:\n - ASRock G31M-GS\n   Reported by Александр Трубицын\n - ASRock G41M-VS3\n   Reported by Александр Трубицын\n - ASRock N68C-S UCC\n   Reported by Alexey Belyaev\n - ASRock AMCP7AION-HT (ION 330HT(-BD))\n   Reported by Stefan Tauner\n - ASUS P5K SE\n   Reported by Александр Трубицын\n - ASUS P5KPL-VM\n   Reported by Marin Vlah\n - ASUS RAMPAGE III GENE\n   Reported by stevessss on IRC\n - GIGABYTE GA-945GM-S2\n   Reported by Александр Трубицын\n - GIGABYTE GA-945GCM-S2 (rev. 3.0)\n   Reported by Александр Трубицын\n - GIGABYTE GA-965P-S3\n   Reported by Александр Трубицын\n - GIGABYTE GA-EG43M-S2H\n   Reported by Александр Трубицын\n - GIGABYTE GA-EP31-DS3L (rev. 1.0)\n   Reported by Александр Трубицын\n - GIGABYTE GA-G33M-S2\n   Reported by Александр Трубицын\n - GIGABYTE GA-G33M-S2L\n   Reported by Александр Трубицын\n - GIGABYTE GA-H55M-S2\n   Reported by Александр Трубицын\n - GIGABYTE GA-J1900N-D3V\n   Reported by Marcos Truchado and Guillermo von Hünefeld\n - GIGABYTE GA-K8NS\n   Reported  by nicolae788\n - GIGABYTE GA-M56S-S3\n   Reported by Estevo Paz Freire\n - GIGABYTE GA-P31-DS3L\n   Reported by Александр Трубицын\n - GIGABYTE GA-P31-S3G\n   Reported by Александр Трубицын\n - MSI MS-7336\n   Reported by Benjamin Bellec\n - MSI X79A-GD45 (8D) (MS-7760)\"\n   Reported by mortehu on IRC\n - Supermicro A1SAi-2550F\n   Reported by Bernard Grymonpon\n - Supermicro X7DWT\n   Reported by Steven Stremciuc\n\nLaptop:\n - ASUS U38N\n   Reported by Ultra on IRC\n - Dell Latitude D630\n   Reported by Márton Miklós\n - Fujitsu Amilo Xi 3650\n   Reported by Elmar Stellnberger\n - Lenovo T400 (whitelisting only)\n\nChipsets:\n - Mark 8086:1f38 (Intel Avoton/Rangeley) as tested\n   Reported by Jeremy Porter and Bernard Grymonpon\n - Add Intel Sunrise Point IDs but no support yet.\n\nFlash chips:\n - Atmel AT45DB321D to PREW (+PREW)\n   Reported by The Raven\n - Eon EN25QH32 to PREW (+PREW)\n   Reported by Josua Mayer\n - Eon EN25QH64 to PREW (+EW)\n   Reported by David s. Alessio\n - GigaDevice GD25LQ64(B) to PREW (+PREW)\n   Reported by Greg Tippit\n - Intel 28F001BN/BX-T to PREW (+EW)\n   Reported by Lu Xie\n - Micron M25P10-A to PREW (+W)\n   Reported by the Raven\n - Micron M25PE40\n   Reported by David Wood\n - Micron N25Q128..3E to PREW (+PREW)\n   Reported by Miklós Márton\n - Macronix MX25L3273E to PREW (+PREW)\n   Reported by Roklobsta on IRC\n - Macronix MX23L6454 to PR (+PR)\n   Reported by Steven Honeyman\n - Macronix MX25U6435E/F to PREW (+PREW)\n   Reported by Marcos Truchado and Guillermo von Hünefeld\n - PMC Pm25LQ032C to PREW (+EW)\n   Reported by Dirk Knop\n - Spansion S25FL016A to PREW (+EW)\n   Reported by Márton Miklós\n - Spansion S25FL128S......0 to PREW (+PREW)\n   Reported by Jim Houston\n - Spansion S25FL204K to PR (+PR)\n   Reported by Thomas Debrunner\n - SST SST49LF016C to PREW (+EW)\n   Reported by Steven Stremciuc\n - SST SST39VF040 to PREW (+PREW)\n   Reported by Xavier Bourgeois\n - SST SST49LF040B to PREW (+EW)\n   Reported by Rikard Åhlund\n - ST M25P10-A to PREW (+W)\n   Reported by Martijn Schiedon\n - Winbond W39V040FA to PREW (+EW)\n   Reported by Евгений Черкашин\n - Winbond W39V080FA to PREW (+EW)\n   Reported by protagonist0 on IRC\n - Winbond W25Q80.W to PREW (+PREW)\n   Reported by Miklós Márton\n - Winbond W25X64 to PREW (+REW)\n   Reported by Johannes Krampf and Manuel Dejonghe\n - Fix ID of AMIC A25LQ64\n   Reported by Roman Titov\n - Fix page size of Spansion S25FL129P......1\n   Copy and paste error from the 128S uniform 256kB variant, probably.\n - Add Micron/Numonyx phase-change memory IDs\n\nMiscellaneous:\n - Detect Android target OS.\n   No changes are required to build flashrom (excluding programmers\n   with NEED_PCI) on Android.\n - Update rayerspi (spipgm) URL\n - Fix max_data_write handling of at45db.\n - Minor refinement of the README\n - Mark board enable for the GA-K8NS variants as tested.\n   Tested by \"nicolae788\" on a board with socket 754.\n - Mark \"Multi-system\" chassis as non-laptop case.\n - Remove W836xx log requests.\n   We got enough (and no one is looking at them for the time being anyway).\n - serprog: improve invalid reply error message, contributed by Urja Rannikko.\n - Remove default include paths for MinGW.\n - Disable implicit rules in the Makefile because we don\u0027t need them and they\n   just make the build (imperceptibly) slower.\n - Enable our own strnlen() implementation not only on DJGPP but also if\n   HAVE_STRNLEN is not defined. This is needed to get older BSDs\n   (e.g. NetBSD 6.0, FreeBSD \u003c 8.0) to work.\n - Tiny other stuff.\n\nCorresponding to flashrom svn r1917.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "c8305e1dee66cd69bd8fca38bff2c8bf32924306",
      "tree": "5093cc7a7f36228da0f1a2d8eba2e9c46239226a",
      "parents": [
        "557eb4ff18c7c8d01684a8d7afb7ffc12452bb50"
      ],
      "author": {
        "name": "Paul Kocialkowski",
        "email": "contact@paulk.fr",
        "time": "Fri Oct 16 02:16:20 2015 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Fri Oct 16 02:16:20 2015 +0000"
      },
      "message": "Add support for 128 bytes write granularity\n\nSome chips such as the ENE KB9012 internal flash require a write\ngranularity of 128 bytes.\n\nCorresponding to flashrom svn r1897.\n\nSigned-off-by: Paul Kocialkowski \u003ccontact@paulk.fr\u003e\nAcked-by: Nico Huber \u003cnico.h@gmx.de\u003e\n"
    },
    {
      "commit": "5c316f954941241ed75a1f00f00bf1bff318488a",
      "tree": "ce836bcb29d7d9da86ee583a88236b020985ba36",
      "parents": [
        "dc627931848ed6af40be4f7d5bdb8e33d28b8333"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Feb 08 21:57:52 2015 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Feb 08 21:57:52 2015 +0000"
      },
      "message": "Add a bunch of new/tested stuff and various small changes 22\n\nTested mainboards:\nOK:\n - AOpen UK79G-1394 (used in EZ18 barebones)\n   Reported by Lawrence Gough\n - ASUS M4N78 SE\n   Reported by Dima Veselov\n - ASUS P5LD2-VM\n   Mark board enable as tested (reported by Dima Veselov)\n - GIGABYTE GA-970A-UD3P (rev. 2.0)\n   Reported by trucmar on IRC\n - GIGABYTE GA-990FXA-UD3 (rev. 4.0)\n   Reported by ROKO__ on IRC\n - GIGABYTE GA-H77-DS3H (rev. 1.1)\n   Reported by Evgeniy Edigarev\n - GIGABYTE GA-P55-USB3 (rev. 2.0)\n   Reported by Måns Thörnqvist\n - MSI MS-7817 (H81M-E33)\n   Reported by Igor Kolker\n\nChipsets:\n - Marked Intel Bay Trail (0x0f1c) as tested OK\n   Reported by Antonio Ospite\n - Refine Intel IDs\n    * Add IDs for Braswell\n    * Add IDs for 9 Series PCHs (e.g. H97, Z97)\n    * Rename Wellsburg devices slightly\n\nFlash chips:\n - Atmel AT25DF041A to PREW (+PREW)\n   Reported by Tai-hwa Liang\n - Atmel AT26DF161 to PREW (+EW)\n   Reported by Steve Shenton\n - Atmel AT45DB011D to PREW (+PREW)\n   Reported by The Raven\n - Atmel AT45DB642D to PREW (+PREW)\n   Reported by Mahesh Mokal\n - Eon EN25F32 to PREW (+PREW)\n   Reported by Arman Khodabande\n - Eon EN25F40 to PREW (+REW)\n   Reported by Jerrad Pierce\n - Eon EN25QH16 to PREW (+EW)\n   Reported by Ben Johnson\n - GigaDevice GD25Q20(B) to PREW (+PREW)\n   Reported by Gilles Aurejac\n - Macronix MX25U6435E/F to PR (+PR)\n   Reported by Matt Taggart\n - PMC Pm25LV512(A) to PREW (+PREW)\n   Reported by The Raven\n - SST SST39VF020 to PREW (+PREW)\n   Reported by Urja Rannikko\n - Winbond W25Q40.V to PREW (+EW)\n   Reported by Torben Nielsen\n - Add E variants of MX25Lx006 (MX25L2006E, MX25L4006E, MX25L8006E).\n - Add MX25L6465E variant.\n - There was never a MX25L12805 AFAICT.\n - Split MX25L12805 from models with the same ID but an additional 32 kB\n   eraser: MX25L12835F/MX25L12845E/MX25L12865E.\n - Add a bunch of ST parallel NOR flash chip IDs.\n\nMiscellaneous:\n - Whitelist ThinkPad X200.\n - Constify master parameter of register_master().\n - Remove FEATURE_BYTEWRITES because it was never used at all.\n - Refine hwseq messages and make them less prominent.\n - Fix the yet unused PRIxCHIPADDR format string thingy.\n - Fix copy\u0026paste error in spi_prettyprint_status_register_bp().\n   Spotted by Pablo Cases.\n - Add an additional SMBus controller revision to identify another Yangtze\n   model. Thanks to Dan Christensen for reporting this issue.\n - dediprog: add missing include for stdlib.h.\n   This fixes (at least) building on FreeBSD and DragonflyBSD with gcc.\n - Remove references to struct pci_filter from programmer.h.\n   It is only needed in internal.c where it has a complete type. Having\n   it in programmer.h provokes a warning by some old versions of gcc.\n - Tiny other stuff.\n\nCorresponding to flashrom svn r1879.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "dc627931848ed6af40be4f7d5bdb8e33d28b8333",
      "tree": "8a458f2a546da385a13b3662586000286e3aa02d",
      "parents": [
        "0cbd8c2558209432a0f51522cd2adffc59785dd0"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Tue Jan 27 18:07:50 2015 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Tue Jan 27 18:07:50 2015 +0000"
      },
      "message": "Make strnlen() visible in old versions of glibc\n\nStrnlen() is in POSIX 2008 but was a GNU extension up to glibc 2.10\nrequiring to define _GNU_SOURCE. This fixes compilation on CentOS 4.9.\nAlso, move our implementation of strnlen() that was added to support\nDJGPP to helpers.c.\n\nCorresponding to flashrom svn r1878.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "b0eee9b8d649efc3db9a6c5f333b0fff5204a979",
      "tree": "fcba10fdf1451557f3bc58de6f39d669e5106c46",
      "parents": [
        "be62d3fc07194ec13f091aa06beff0a032f1a418"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Jan 10 09:32:50 2015 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Jan 10 09:32:50 2015 +0000"
      },
      "message": "Unify target OS and CPU architecture checks\n\nWe do CPU architecture checks once for the makefile in arch.h and\nonce for HW access abstraction in hwaccess.c. This patch unifies\nrelated files so that they can share the checks to improve\nmaintainability and reduce the chance of inconsistencies.\nFurthermore, it refines some of the definitions, which\n - adds \"support\" for AARCH64 and PPC64,\n - adds big-endian handling on arm as well as LE handling on PPC64,\n - fixes compilation of internal.c on AARCH64 and PPC64.\n\nAdditionally, this patch continues to unify all OS checks in\nflashrom by adding a new helper macro IS_WINDOWS.\n\nThe old header file for architecture checking is renamed to platform.h\nto reflect its broader scope and all new macros are add in there.\n\nCorresponding to flashrom svn r1864.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "b41d847d7292335ca5be8818a1ff0b6c2316c2d1",
      "tree": "7645efab7c6eb3a470e51ade1c88f62b00569eb9",
      "parents": [
        "ff9e6c32c37e685f25e5ba09611e6e7d1a556bd8"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Nov 01 22:56:06 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Nov 01 22:56:06 2014 +0000"
      },
      "message": "Move strtok_r implementation verbatim to helpers.c\n\nCorresponding to flashrom svn r1853.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "73f5bda01dbb1f6726593ab7a6139a1a8a1afb5a",
      "tree": "a8c3f64554ab03d54bacd86bde92d60844cf9d89",
      "parents": [
        "5e27b0bc1371a75ecf2e0b0224ca4e0137f87d46"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Oct 19 07:53:45 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Oct 19 07:53:45 2014 +0000"
      },
      "message": "Make read before write configurable (infrastructure part)\n\n - Introduce a variable in doit() that allows to influence\n   read-before-write and its consequences.\n - Modify build_new_image so that it still works even if the old content\n   is not read before.\n - Add copy_old_content() to ease the pain for future patches.\n\nCorresponding to flashrom svn r1851.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "2a1ed77f84e7cfc0a419c44edfbf41c78f211ac9",
      "tree": "1ce5908e88a7d94970f7f9fdd6a935db044599c5",
      "parents": [
        "4e32ec19b124a7431d1e3fd9f7e75196b7495a7e"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Aug 31 00:09:21 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Aug 31 00:09:21 2014 +0000"
      },
      "message": "Introduce generic shutdown_free() and remove redundant internal_shutdown()\n\nThe former will be useful in cases where cleanup equals a simple call to free().\n\nCorresponding to flashrom svn r1848.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "4e32ec19b124a7431d1e3fd9f7e75196b7495a7e",
      "tree": "5ca7051747f8161639957c37d984cbe8f878271a",
      "parents": [
        "583ea32911f67641daef9d05b3e65176b6923f94"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Aug 30 23:39:51 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Aug 30 23:39:51 2014 +0000"
      },
      "message": "Refine physical address mapping of flash chips\n\n - Create distinct functions for mapping and unmapping for flash chips.\n - Map only when needed: map before probing and unmap immediately\n   after it. Map again when a single chip was probed successfully before\n   taking any actual actions and clean up afterwards.\n - Map special function chip registers centrally together with flash space\n   instead of within (some) probing methods after successful probes.\n - Save the used base addresses of the mappings in struct flashctx as well.\n - Do not try to (un)map the zero-sized chip definitions that are merely hacks.\n   This also fixes the printing of wrong warnings for these chip definitions\n   introduced in r1765.\n\nCorresponding to flashrom svn r1847.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "9b32de94f5104cb7fa12816b7fa561b804df6ed8",
      "tree": "9501e463b76abf831d62bfd1a9a9ac2f8939476e",
      "parents": [
        "a8cf3620a42ca5927253822a813e3fbae1d6e7bf"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Fri Aug 08 23:52:33 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Fri Aug 08 23:52:33 2014 +0000"
      },
      "message": "Refactor some CLI-relevant parts\n\nBegin to move functions that clearly belong to the (command line)\nuser interface out of flashrom\u0027s core files like flashrom.c.\n\n - Refine messages within check_chip_supported(), rename it to\n   print_chip_support_status() and move it to newly created cli_common.c.\n - Move flashbuses_to_text() to cli_common.c as well.\n - Move global verbosity variables to cli_output.c.\n\nCorresponding to flashrom svn r1841.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "6697f71ade7b6428c7be6051c02dbb9768900e04",
      "tree": "23a2f8596d493396b7d9571ee91888e3f49c49f9",
      "parents": [
        "88b19257cb41c97123d832460c944abc588a8e89"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Wed Aug 06 15:09:15 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Wed Aug 06 15:09:15 2014 +0000"
      },
      "message": "Add a bunch of new/tested stuff and various small changes 21\n\nTested mainboards:\nOK:\n - ASUS F2A85-M\n   Reported by various corebooters\n - ASUS M2N-MX SE Plus\n   Reported by Antonio\n - ASUS P5LD2\n   Reported by François Revol\n - Lenovo ThinkPad T530\n   Reported and partially authored by Edward O\u0027Callaghan\n - MSI MS-7502 (Medion MD8833)\n   Reported by naq on IRC\n - Shuttle AB61\n   Reported by olofolleola4\n - ZOTAC IONITX-F-E\n   Reported by Bernardo Kuri\n\nFlash chips:\n - Atmel AT45DB021D to PREW (+PREW)\n   Reported by The Raven\n - Atmel AT25F4096 to PREW (+PREW)\n   Reported by 공준혁\n - GigaDevice GD25Q16(B) to PREW (+PREW)\n   Reported by luxflow@live.com using a GD25Q16BSIG\n - Catalyst CAT28F512\n   Mark erase and write as known bad (not implemented)\n\nMiscellaneous:\n - Various spelling corrections by Daniele Forsi.\n - Added and refined a bunch of chips originally investigated by Carl-Daniel.\n - Marked the ARM-USB-OCD-H programmer as tested\n   (reported by Ruud Schramp).\n - Tiny other stuff.\n\nCorresponding to flashrom svn r1839.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "a5bcbceb581f27cfc0055369d3dd9cfd1ae00bfa",
      "tree": "5daecd880a16b7011be28e064fb7550f3e6b7e58",
      "parents": [
        "82b6ec1df30d3fca55547f230c76718d6e613b2a"
      ],
      "author": {
        "name": "Carl-Daniel Hailfinger",
        "email": "c-d.hailfinger.devel.2006@gmx.net",
        "time": "Sat Jul 19 22:03:29 2014 +0000"
      },
      "committer": {
        "name": "Carl-Daniel Hailfinger",
        "email": "c-d.hailfinger.devel.2006@gmx.net",
        "time": "Sat Jul 19 22:03:29 2014 +0000"
      },
      "message": "Rename programmer registration functions\n\nRegister_programmer suggests that we register a programmer. However,\nthat function registers a master for a given bus type, and a programmer\nmay support multiple masters (e.g. SPI, FWH). Rename a few other\nfunctions to be more consistent.\n\nCorresponding to flashrom svn r1831.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "1b0e9fc8ea313cdffc4d38548cb0c8577481a467",
      "tree": "bcd073d982639a0e055f777a48154bf026b99d18",
      "parents": [
        "600576b43d7f76adc49913a7a7dd21e318b063cf"
      ],
      "author": {
        "name": "Carl-Daniel Hailfinger",
        "email": "c-d.hailfinger.devel.2006@gmx.net",
        "time": "Mon Jun 16 22:36:17 2014 +0000"
      },
      "committer": {
        "name": "Carl-Daniel Hailfinger",
        "email": "c-d.hailfinger.devel.2006@gmx.net",
        "time": "Mon Jun 16 22:36:17 2014 +0000"
      },
      "message": "EEPROM support: handle implicit erase\n\nAdd support for EEPROMs with 1 byte granularity and implicit erase on\nwrite. flashrom will not try to erase before write on these chips.\nExplicitly requested erase with -E is done by writing 0xff.\n\nCorresponding to flashrom svn r1822.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "6ad6e01e9b961fd5b25cc4d69319a7d29f110684",
      "tree": "5a7b62f60b10de6a9d9f4f862fdb9f1f8f500f3d",
      "parents": [
        "a60d408a78be0e0d34dda616977489a307cb98b6"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Thu Jun 12 00:04:32 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Thu Jun 12 00:04:32 2014 +0000"
      },
      "message": "Introduce helpers.c\n\nMove some suitable functions there, add it to the Makefile, but leave the\ndeclarations in flash.h for now.\n\nCorresponding to flashrom svn r1819.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "96658be4073aaa55101b17e95c7b704a2cc7c83a",
      "tree": "4240d774ca35015fb68fb32a2f2c2b0a2ca4b1ec",
      "parents": [
        "6455dff07b06e3b870f75e88652e0501810bd104"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Mon May 26 22:05:31 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Mon May 26 22:05:31 2014 +0000"
      },
      "message": "Fix selfcheck of various arrays\n\nStefan Reinauer has reported ridiculous NULL checks for arrays in our\nself_check function found by Coverity (CID1130005). This patch removes\nthe useless checks but keeps and fixes the one responsible for the\nflashchips array by exporting the array size in a new constant.\n\nCorresponding to flashrom svn r1799.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "6455dff07b06e3b870f75e88652e0501810bd104",
      "tree": "0ec4cf1c51ffbd549717d6c030422e37cddddca7",
      "parents": [
        "ffb0cf649c1c66c85441314434cd1cd57f89fe02"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Mon May 26 00:36:24 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Mon May 26 00:36:24 2014 +0000"
      },
      "message": "Add two new states to enum test_state and use it for flashchips\n\nThe new enum test_state looks like this:\nenum test_state {\n\tOK \u003d 0,\n\tNT \u003d 1,\t/* Not tested */\n\tBAD,\t/* Known to not work */\n\tDEP,\t/* Support depends on configuration (e.g. Intel flash descriptor) */\n\tNA,\t/* Not applicable (e.g. write support on ROM chips) */\n};\n\nThe second new state \u0027NA\u0027 is introduced, among other things, to indicate\nthe erase and write states of real ROMs correctly. This is also implemented\nby this patch and required to exchange the previous bit mask in struct\nflashchip with a new struct containing an enum test_state for each operation.\nThe -L output is changed accordingly to print \u0027-\u0027 in the case of an N/A state\nand the wiki output uses a new template producing a greyed out cell.\nPrevious users of enum test_state are not affected by this change (yet).\n\nCorresponding to flashrom svn r1798.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "f20b7beff054eb316088d590094d9efbc68dbee1",
      "tree": "6324be451385c9f9cea27381f35f300fbaa7f454",
      "parents": [
        "20da4aa82cc11f25a6a4a52fd2bed219e6e1d829"
      ],
      "author": {
        "name": "Mark Marshall",
        "email": "mark.marshall@omicron.at",
        "time": "Fri May 09 21:16:21 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Fri May 09 21:16:21 2014 +0000"
      },
      "message": "Add \u0027const\u0027 keyword to chip write and other function prototypes\n\nCorresponding to flashrom svn r1789.\n\nInspired by and mostly based on a patch\nSigned-off-by: Mark Marshall \u003cmark.marshall@omicron.at\u003e\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "4e7f36ec30bbc428beace0c99e83708e45274287",
      "tree": "3d6d66452d111de88a0e691f639a313b77f73f9c",
      "parents": [
        "c2eec2c92015785ead5a5bcba4ce3a42501084c8"
      ],
      "author": {
        "name": "Michael Coppola",
        "email": "michael.n.coppola@gmail.com",
        "time": "Sat May 03 23:01:18 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat May 03 23:01:18 2014 +0000"
      },
      "message": "Add support for Macronix MX23L3254 mask ROM\n\nCorresponding to flashrom svn r1784.\n\nSigned-off-by: Michael Coppola \u003cmichael.n.coppola@gmail.com\u003e\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "f80419c75a344b303275e380add3b8cb750bab9d",
      "tree": "124a732dd0d8c171b28649986c716af0477ca746",
      "parents": [
        "b66ed84d193b8c0eddf5d946c6d2d94a8e8360ee"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Fri May 02 15:41:42 2014 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Fri May 02 15:41:42 2014 +0000"
      },
      "message": "Make delay values unsigned\n\nThere is no reason for negative delays in our use cases:\n - We don\u0027t need it (to work around any quirks).\n - sleep() (POSIX) uses an unsigned argument.\n - usleep() (POSIX) uses an unsigned argument.\n - Sleep() (Windows) uses an unsigned argument.\n\nChange all callees as well (without any complications).\n\nCorresponding to flashrom svn r1782.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "8268fdb90227af0293d2fbfcf92f971af44cb001",
      "tree": "4a5f50d844a729a5806abfed35e79169ca9fd6d2",
      "parents": [
        "a6a0d2000a1197e90faaf8d9e7697c96f1deb934"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Mon Sep 23 14:21:06 2013 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Mon Sep 23 14:21:06 2013 +0000"
      },
      "message": "layout: Verify layout entries before building a new image using them\n\nThis fixes a SEGFAULT if a layout entry is included that addresses memory\noutside the current chip\u0027s address range. flashrom will only abort if the\noffending region(s) is/are included else it will just warn.\n\nIt will print warnings for regions with negative or zero-length address ranges\nand bail out after checking all of them.\n\nAlso, abort for non-write operations if a layout file is given because there is\nno layout support for other operations yet.\n\nCorresponding to flashrom svn r1751.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "949ccc8a7ed2a7ad075103e064ad92483ffa8720",
      "tree": "8aaa82d92b1b7366c53552da0b089bf83f37e55f",
      "parents": [
        "88ee040ab98a1ffa0c7d8faf6aac1187500e4974"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Sep 15 14:01:06 2013 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Sep 15 14:01:06 2013 +0000"
      },
      "message": "layout: Add a method to cleanup layout data structures\n\nAdd layout_cleanup() to layout.c and hook it up in cli_classic.c.\n\nCorresponding to flashrom svn r1749.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "0554ca5cd33fe2cc599cfdbe91fff03c8fa752c5",
      "tree": "1d37d76b5b3d810c6b2a1286a5de7c2b60ce69a0",
      "parents": [
        "305e0b999a7d452a845709d5558c17a31afe178c"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Thu Jul 25 22:54:25 2013 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Thu Jul 25 22:54:25 2013 +0000"
      },
      "message": "Add a bunch of new/tested stuff and various small changes 18\n\nTested mainboards:\nOK:\n - ASUS C60M1-I\n   http://www.flashrom.org/pipermail/flashrom/2013-February/010578.html\n - ASUS P8H77-I\n   http://www.flashrom.org/pipermail/flashrom/2013-March/010607.html\n - ASUS P8H77-M\n   http://www.flashrom.org/pipermail/flashrom/2013-May/010994.html\n - ASUS P8P67 LE (B2)\n   http://www.flashrom.org/pipermail/flashrom/2013-May/010972.html\n - Elitegroup GeForce6100PM-M2 (V3.0)\n   http://www.flashrom.org/pipermail/flashrom/2013-July/011177.html\n - GIGABYTE GA-P55A-UD7\n   http://www.flashrom.org/pipermail/flashrom/2013-July/011302.html\n - MSI B75MA-E33 (MS-7808)\n   http://www.flashrom.org/pipermail/flashrom/2013-March/010659.html\n - MSI H77MA-G43 (MS-7756)\n   http://www.flashrom.org/pipermail/flashrom/2013-April/010853.html\n - MSI KA780G (MS-7551)\n   http://paste.flashrom.org/view.php?id\u003d1617\n - SAPPHIRE IPC-E350M1\n   Reported by xvilka on IRC\n - Supermicro X8DTG-D\n   http://www.flashrom.org/pipermail/flashrom/2013-July/011305.html\nNOT OK:\n - ASRock Fatal1ty Z77 Performance\n   http://www.flashrom.org/pipermail/flashrom/2013-January/010467.html\n - ASRock Z68 Extreme4\n   http://www.flashrom.org/pipermail/flashrom/2013-May/010984.html\n - ASUS P8B75-M LE\n   http://www.flashrom.org/pipermail/flashrom/2013-April/010867.html\n - ASUS P8P67-M PRO\n   http://www.flashrom.org/pipermail/flashrom/2013-February/010541.html\n - ASUS P8Z68-V LE\n   http://www.flashrom.org/pipermail/flashrom/2013-February/010582.html\n - Intel DQ77MK\n   http://paste.flashrom.org/view.php?id\u003d1603\n - Supermicro X9DRD-7LN4F\n   http://paste.flashrom.org/view.php?id\u003d1582\n - Supermicro X9SCE-F\n   http://www.flashrom.org/pipermail/flashrom/2013-February/010588.html\n - Supermicro X9SCM-F\n   http://www.flashrom.org/pipermail/flashrom/2013-February/010527.html\n - Tyan S7066\n   http://www.flashrom.org/pipermail/flashrom/2013-March/010630.html\n\nChipsets:\n - Marked Intel B75 as tested\n   http://www.flashrom.org/pipermail/flashrom/2013-March/010659.html\n - Marked Intel H77 as tested\n   http://www.flashrom.org/pipermail/flashrom/2013-March/010607.html\n - Removed 10de:03e2 because it is apparently the MCP61 host bridge.\n   It was reclassified to Host Bridge in the PCI device ID database and there\n   is at least one report suggesting this configuration too:\n   http://www.flashrom.org/pipermail/flashrom/2012-August/009716.html\n - Added MCP89 which hopefully works with the code for previous versions.\n   Thanks to James Laird for submitting this change.\n\nTested flash chips:\n - Atmel AT25DF641(A) to PREW (+PREW)\n   http://www.flashrom.org/pipermail/flashrom/2013-June/011113.html\n - Atmel AT25F512 to PREW (+PREW)\n   http://www.flashrom.org/pipermail/flashrom/2013-April/010904.html\n   Also, change its ID according to Modification of PCN SC040401A:\n   \"There has been a change in the returned value of the Product Identification\n   (RDID) command, the AT25F512A RDID code is 65h compared to 60h from\n   the AT25F512 product.\"\n   It seems to be quite likely that all AT25F512 are fully functional relabeled\n   AT25F1024 chips. There are even some hints in the datasheet:\n   in table 6 they stress that address pin 16 needs to be low under all circum-\n   stances; while continuous reads can wrap around on the AT25F1024 the DS\n   notes \"For the AT25F512, the read command must be terminated when the\n   highest address (00FFFF) is reached.\" OTOH the lock bit semantics are\n   different, but this has not been tested thoroughly\n - Atmel AT25F512A to PREW (+PREW)\n   http://paste.flashrom.org/view.php?id\u003d1569\n - Eon EN25F05 to PREW (+PREW)\n   http://paste.flashrom.org/view.php?id\u003d1571\n - Macronix MX25L12805(D) to PREW (+REW)\n   http://www.flashrom.org/pipermail/flashrom/2013-April/010913.html\n - Spansion S25FL256S......0 and S25FL512S to P/!R!E!W (+P)\n   Tested by Stefan Tauner\n - Micron/Numonyx/ST M25PX80 to PREW (+PREW)\n   Tested by Stefan Tauner\n - Micron/Numonyx/ST N25Q032..3E and N25Q128..3E to PREW (+PREW)\n   Tested by Stefan Tauner\n - Micron/Numonyx/ST N25Q256..3E and N25Q512..3G to P/!R!E!W (+P)\n   Tested by Stefan Tauner\n - SST SST25VF040B to PREW (+PREW)\n   http://paste.flashrom.org/view.php?id\u003d1574\n - SST SST25VF040B.REMS to PREW (+EW)\n   http://paste.flashrom.org/view.php?id\u003d1575\n - ST M25P05-A to PREW (+PREW)\n   http://paste.flashrom.org/view.php?id\u003d1576\n - ST M29W512B to PREW (+W)\n   http://www.flashrom.org/pipermail/flashrom/2013-March/010635.html\n - Winbond W25Q64.W to PREW (+PREW)\n   Tested by the chromiumos guys.\n - Winbond W25Q128.V to PREW (+REW)\n   http://www.flashrom.org/pipermail/flashrom/2013-June/011108.html\n - Winbond W25X20 to PREW (+PREW)\n   http://www.flashrom.org/pipermail/flashrom/2013-May/010990.html\n\nMiscellaneous:\n - Add Lenovo X201 to the laptop whitelist.\n - Add chip IDs for the ESMT F25L..QA family.\n - Add chip IDs for a few Macronix MX25 models.\n - The list of flashchips is not sorted strictly alphabetically and should not be\n   either. Refine the comment explaining the scheme on top of the list.\n - Support -L output of chip sizes with up to 6 decimal places (up to 4 Gb).\n - Use z length modifier in (more) prints for size_t types.\n - Remove chips \u003e16MB again because our current implementation of memory mapping\n   the flash chip violates common rules by mapping a window as large as the chip.\n   This leads to failing mmaps as can be seen here:\n   http://paste.flashrom.org/view.php?id\u003d1695\n - Document spispeed parameter of linux_spi (and fix some leaks).\n - Rephrase the \"multiple chips detected\" message because it was confusing.\n - Skip verification step if the image is equal to the flash contents.\n - Tiny other stuff.\n\nCorresponding to flashrom svn r1702.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "305e0b999a7d452a845709d5558c17a31afe178c",
      "tree": "3b65c3cd627ff55d683f26bf0819913a3e63c5d8",
      "parents": [
        "4a03865cd9b192e6e65b5dbc5a928af87322385d"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Wed Jul 17 23:46:44 2013 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Wed Jul 17 23:46:44 2013 +0000"
      },
      "message": "Uintptr_t-ify map_flash_region functions\n\nUnsigned long is not the right type for manipulating pointer values.\nSince C99 there are suitable unsigned and signed types available, namely\nuintptr_t and intptr_t respectively.\n\nUse them in functions assigned to programmers\u0027 map_flash_region fields and\ntheir callers where applicable.\n\nThis patch also changes the display width of all associated address values in\nphysmap.c to 16/8 hex characters depending on the actual size by\nintroducing a macro PRIxPTR_WIDTH and exploiting printf\u0027s * field width\nspecifier.\n\nCorresponding to flashrom svn r1701.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "c2333751c411b5265326d866f810017cd561643c",
      "tree": "574e4a82e15854b6bc4393c5f56005fe2b4bda9c",
      "parents": [
        "11990da1d3a4ca913ed5b85888a37188c4a621db"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Jul 13 23:31:37 2013 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Jul 13 23:31:37 2013 +0000"
      },
      "message": "Use uintptr_t for chipaddr instead of unsigned long\n\nCorresponding to flashrom svn r1698.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "11990da1d3a4ca913ed5b85888a37188c4a621db",
      "tree": "5c905e082327d5714b6a09d30ae38e210d610ca9",
      "parents": [
        "6bf5fe78f1064b56275056b2a90ea4e1c34e42be"
      ],
      "author": {
        "name": "Carl-Daniel Hailfinger",
        "email": "c-d.hailfinger.devel.2006@gmx.net",
        "time": "Sat Jul 13 23:21:05 2013 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Jul 13 23:21:05 2013 +0000"
      },
      "message": "Various cross-platform fixes\n\nImprove compilation with libpayload (compiling flashrom.c and\nlinking is still broken):\n - disable Ponyprog (which enforced serial.c compilation)\n - make errno available where it is needed\n\nFix internal.c for non-x86 and enable cb parsing on ARM.\n\nFix mingw builds by using its __USE_MINGW_ANSI_STDIO macro\nand gnu_printf definition for printf format style checking.\nSee http://sourceforge.net/apps/trac/mingw-w64/wiki/gnu%20printf\nThis requires inclusion of stdio.h in flash.h.\n\nFix order of libraries in the Makefile:\nFEATURE_LIBS needs to come *after* PCILIBS in case ZLIB is needed by it.\n\nCorresponding to flashrom svn r1697.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "682122bce7714e285d196be09d4c97666458c487",
      "tree": "026de7f194bea13e2792bdd28e5edb8242bc93c1",
      "parents": [
        "cecb2c56d07ac45cde56cadc6416e653b0cfafb7"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Jun 23 22:15:39 2013 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Jun 23 22:15:39 2013 +0000"
      },
      "message": "Warn if we skipped all blocks while writing\n\nQuick hack to print a warning if we skip all blocks in a write\nprocess because they are already equal to the requested image. We\nwant something like this to make users aware... and some developers\nwho regularly fall for this too *coughcough*. There might be more\nelegant solutions for this... patches welcome.\n\nThis does not work for erasing because we do that unconditionally.\n\nCorresponding to flashrom svn r1680.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Idwer Vollering \u003cvidwer@gmail.com\u003e\n"
    },
    {
      "commit": "0466c819e248881e03a6ec98db5297565816859b",
      "tree": "ef4b7b69bdbe80c9a3177341811dce516e7bbd74",
      "parents": [
        "b13d4e699249838babfc37a1d77b8ee27f6d72d9"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Jun 16 10:30:08 2013 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Jun 16 10:30:08 2013 +0000"
      },
      "message": "sbxxx: spibar[0] debug print refinements\n\nNewer models support a 66 MHz clock and fast reads.\nWe should probably distinguish the models better (as we do in ichspi)\nand add support for frequency selection etc. For now this has to\nsuffice.\n\nCorresponding to flashrom svn r1678.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "02437458a603c112e503abc63ad32b09cfbc23f3",
      "tree": "5d6795f391efd74229f1b88de4639157fbec5563",
      "parents": [
        "52b6e9dc546d1c0958e03634eff47c71f460f8ac"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Mon Apr 01 19:34:53 2013 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Mon Apr 01 19:34:53 2013 +0000"
      },
      "message": "Refine granularity handling in preparation of AT45DB series support\n\nThis adds a number of new granularitie and refines the handling of\nn-byte granularities by extracting the respective code into a helper\nfunction which reduces the pain of the above significantly.\n\nCorresponding to flashrom svn r1666.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "f800f55b05428c8050dbeb8e1b34696968297992",
      "tree": "7ae7fbb065ba03e6b787467db8d7e07583ad7035",
      "parents": [
        "bf97bdc420bbf2c787c63a6a1c9bf9d3c5d4ac80"
      ],
      "author": {
        "name": "Vincent Palatin",
        "email": "vpalatin@chromium.org",
        "time": "Fri Mar 15 02:03:16 2013 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Fri Mar 15 02:03:16 2013 +0000"
      },
      "message": "Add support for Macronix MX25U1635E, MX25U3235E/F and MX25U6435E/F\n\nMacronix MX25U3235 is a 4MB (32Mbits) 1.8v SPI flash supporting QPI.\nCode for it was refined after merging it from chromium:\nChange-Id: I62c7db070254ba3ec68090e783f57b25a6e8d15a\nReviewed-on: https://gerrit.chromium.org/gerrit/44395\nTested-by: Vincent Palatin \u003cvpalatin@chromium.org\u003e\nReviewed-by: Randall Spangler \u003crspangler@chromium.org\u003e\nCommit-Queue: Vincent Palatin \u003cvpalatin@chromium.org\u003e\n\nBased on that support for MX25U1635E and MX25U6435E/F was added\nby Stefan Tauner.\nAlso, add a feature flag for QPI-enabled chips: FEATURE_QPI.\n\nCorresponding to flashrom svn r1655.\n\nSigned-off-by: Vincent Palatin \u003cvpalatin@chromium.org\u003e\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "50d67aaa79441e8043aa1de32bb40ae94fcc51b2",
      "tree": "f1b620f41753f30ca126947b6e634156fea996cb",
      "parents": [
        "352e50b79e084c8f5f768d7b6f2ba6b6bd2ea8ce"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Mar 03 23:49:48 2013 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Mar 03 23:49:48 2013 +0000"
      },
      "message": "Make write granularity a chip attribute\n\nCorresponding to flashrom svn r1651.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n"
    },
    {
      "commit": "c6fa32d2b5c08d2fcc92fee2974a3fc02a3ca1f7",
      "tree": "7ac561c734007cfe88577cdad895f87524e3184f",
      "parents": [
        "5561955b1158e8bd29299735abef1e26a5a9cdbc"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Fri Jan 04 22:54:07 2013 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Fri Jan 04 22:54:07 2013 +0000"
      },
      "message": "Introduce msg_*warn\n\nAlso, unify all outputs of \"Warning:\" and \"Error:\" to use normal\ncapitalization instead of mixing it with all capitals.\n\nCorresponding to flashrom svn r1643.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Idwer Vollering \u003cvidwer@gmail.com\u003e\n"
    },
    {
      "commit": "bcb2e5a7080cbe0ff21c8ffa5f77b5ba1ea0c472",
      "tree": "a20f41f2259da0fb66c67af221ff3e9ab00015e3",
      "parents": [
        "6282966cc04525828b96273f373e3b105632776b"
      ],
      "author": {
        "name": "Nico Huber",
        "email": "nico.huber@secunet.com",
        "time": "Sun Dec 30 01:23:17 2012 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sun Dec 30 01:23:17 2012 +0000"
      },
      "message": "Constify parameters and globals\n\nThis makes some stuff const (partially to get a more convenient\nlibflashrom interface).\n\nCorresponding to flashrom svn r1639.\n\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    },
    {
      "commit": "6ee37e28365f2a8ea498d03b08def0dcb1cc6494",
      "tree": "3328db4647bba505d32ebc5755c511728cec438e",
      "parents": [
        "2c421199ab37e691a83ad09b542ed43ee5811603"
      ],
      "author": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Dec 29 15:03:51 2012 +0000"
      },
      "committer": {
        "name": "Stefan Tauner",
        "email": "stefan.tauner@alumni.tuwien.ac.at",
        "time": "Sat Dec 29 15:03:51 2012 +0000"
      },
      "message": "Improve SPI status register pretty printing\n\n - Move all functions related to SPI status registers to a new file\n   spi25_statusreg.c. This includes the generic as well as the\n   SST-specific functions from spi25.c and the chip-specific functions\n   from a25.c and at25.c.\n - introduce helper functions\n    * spi_prettyprint_status_register_hex()\n    * spi_prettyprint_status_register_bpl()\n    * spi_prettyprint_status_register_plain()\n   Use the latter on every compatible flash chip that has no better printlock\n   function set and get rid of the implicit pretty printing in the SPI probing\n   functions.\n - remove\n    * spi_prettyprint_status_register_common()\n    * spi_prettyprint_status_register_amic_a25lq032() because it can be fully\n      substituted with spi_prettyprint_status_register_amic_a25l032().\n    * spi_prettyprint_status_register() (old switch, no longer needed)\n - promote and export\n    * spi_prettyprint_status_register_amic_a25l05p() as spi_prettyprint_status_register_default_bp1().\n    * spi_prettyprint_status_register_amic_a25l40p() as spi_prettyprint_status_register_default_bp2().\n    * spi_prettyprint_status_register_st_m25p() as spi_prettyprint_status_register_default_bp3().\n - add #define TEST_BAD_REW and use it for a number of Atmel chips which\n   had only TEST_BAD_READ set even though they dont have erasers or a write\n   function set.\n\nCorresponding to flashrom svn r1634.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n"
    }
  ],
  "next": "78ffbeaa029fb827dcdf9c02262adbda4673e5eb"
}