)]}' { "log": [ { "commit": "89569d60e3aeeec651496b2e7a2e6064d782ab3b", "tree": "bf0c3951886de60086d32ff6e1a850adad926da6", "parents": [ "929d2e1b17a448d3352dbecb6a620ee0c1e65a58" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 12 23:31:40 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "memory_mapped: Reduce `decode_sizes` to a single `max_rom_decode`\n\nWe used to store the maximum decode size, i.e. the maximum memory-mapped\nrange of the flash chip, per bus type (Parallel, LPC, FWH, SPI). There\nwas no programmer in the tree that really made use of it, though:\n* The chipset drivers usually focus on a single bus type. And even if\n they advertise the whole default set (PAR, LPC, FWH), they only pro-\n vide a maximum decode size for one of them. The latter is probably\n wrong, should really more than one bus type be supported.\n* PCI and external programmers all support only a single bus type, with\n the exception of `serprog` which doesn\u0027t set a maximum decode size.\n\nWhat made the distinction even less useful is that for some chips that\nsupport multiple bus types, i.e. LPC+FWH, we can\u0027t even detect which\ntype it is. The existing code around this also only tried to provide\nthe best possible warning message at the expense of breaking the pro-\ngrammer abstraction.\n\nHence, unify the set of sizes into a single `max_rom_decode` property.\nWe store it inside the `registered_master` struct right away, to avoid\nany more use of globals.\n\nChange-Id: I2aaea18d5b4255eb843a625b016ee74bb145ed85\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72531\n" }, { "commit": "e3a26888e14d16592c2c79d1516828d3d32961a4", "tree": "02d401e60defd27fe7bee194978bac782284cb39", "parents": [ "2b66ad9c4465432e6f2aff2e95f1e7a556bfc3f0" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Jan 11 21:45:51 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "Pass programmer context to programmer-\u003einit()\n\nChange-Id: I064eb4e25c3d382e4e5bde802306698fafe5e1d0\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72526\n" }, { "commit": "621208c341cb400b9b13b5874da49504818a9f49", "tree": "1a851dd54e96add7fe6e30de98fe3b5e4424a775", "parents": [ "56684d9a2ed8a0f878472d5aa0518a3200526812" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Wed Sep 07 22:21:39 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "drivers/: Make \u0027fallback_{un}map\u0027 the default unless defined\n\nDrop the explicit need to specify the default \u0027fallback_{un}map\u0027\ncallback function pointer from the \u0027programmer_entry\u0027 struct.\nThis is a reasonable default for every other driver in the tree\nwith only a select few exceptions [atavia, serprog, dummyflasher\nand internal].\n\nThus this simplifies driver development and paves way\nto remove the \u0027programmer\u0027 global handle.\n\nflashrom-stable: Updated `dirtyjtag_spi` which was added earlier.\n\nChange-Id: I5ea7bd68f7ae2cd4af9902ef07255ab6ce0bfdb3\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67404\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72360\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "56684d9a2ed8a0f878472d5aa0518a3200526812", "tree": "020c2d8db0e05a74981b5b381c37febd46fb796d", "parents": [ "78ed668a924db5dd78c3530655127f895728fe59" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Wed Sep 07 10:47:45 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "drivers/: Make \u0027internal_delay\u0027 the default unless defined\n\nDrop the explicit need to specify the default \u0027internal_delay\u0027\ncallback function pointer in the programmer_entry struct.\nThis is a reasonable default for every other driver in the\ntree with only the two exceptions of ch341a_spi.c and serprog.c.\n\nThus this simplifies driver development.\n\nflashrom-stable: Updated `dirtyjtag_spi` which was added earlier.\n\nChange-Id: I17460bc2c0aebcbb48c8dfa052b260991525cc49\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67391\nOriginal-Reviewed-by: Peter Marheine \u003cpmarheine@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nOriginal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72359\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "3f4d35daf4533650e75fcabb8f1ed9085e1fcf77", "tree": "ae3340f0a563d1d9ed48285cc861e7e90e2343ef", "parents": [ "a6b45c4516e15aeb405028e5095e86259fcd9e34" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Mon Jan 17 15:11:43 2022 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "hwaccess: move mmio functions into hwaccess_physmap\n\nThe mmio_le/be_read/writex functions are used for raw memory access.\nBundle them with the physmap functions.\n\nChange-Id: I313062b078e89630c703038866ac93c651f0f49a\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/61160\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72278\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "a6b45c4516e15aeb405028e5095e86259fcd9e34", "tree": "d76c147420e4b5ecd3fc5caceb76a8178491c1d9", "parents": [ "ca195dca145673a6cd216c52392e153e601c9072" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Thu Jan 06 15:07:18 2022 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "it8212: remove unused rget_io_perms()\n\nThe it8212 programmer does not use x86 IO Ports. Remove the dependency\nto it.\n\nChange-Id: Iab859fb6be6cab094c9c6ce4b3e8eac0e5ff84ab\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/60869\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nOriginal-Reviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72277\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "74b4aa0b15439a2ab2474889a7abed978439757a", "tree": "a3e6d01052b04bbae7c71af7c1148d3619ba1ab1", "parents": [ "b3287b43dc2fc90913686eb7ca9adfdedac2fdb4" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Tue Dec 14 17:52:30 2021 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "physmap: rename to hwaccess_physmap, create own header\n\nLine up physmap with the other hwaccess related code.\n\nChange-Id: Ieba6f4e94cfc3e668fcb8b3c978de5908aed2592\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/60113\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72267\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "a065520a7c7eedcca961de1fc891cc0b04e6df77", "tree": "f7a4c280f6d3114b98a52e147f988c4ae293271b", "parents": [ "d96c97c77309f1cf1ff1cbe9fa521a75fc9d5698" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Tue Dec 14 16:36:05 2021 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "hwaccess: move x86 port I/O related code into own files\n\nAllow port I/O related code to be compiled independent from memory\nmapping functionality. This enables for a better selection of needed\nhardware access types.\n\nChange-Id: I372b4a409f036da766c42bc406b596bc41b0f75a\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/60110\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72265\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "d96c97c77309f1cf1ff1cbe9fa521a75fc9d5698", "tree": "2ca206a0bb2873472e243eb2138c7f1e0345abf2", "parents": [ "b7c6a66d5167a9cb6d83081f4c84b7a6c0d28046" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Tue Nov 02 21:03:00 2021 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "pci.h: move include into own wrapper\n\nSplit the include of hwaccess and libpci. There is no need to have pci.h\nincluded in hwaccess.\n\nChange-Id: Ibf00356f0ef5cc92e0ec99f8fe5cdda56f47b166\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/58883\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72264\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "c1f2a47c9b7b909542a65d2138e9c3c95227bac6", "tree": "2423f24cf00b4ea1bac6ce60845e22e716216d00", "parents": [ "d66dded9e302ae471f1069ab439d763418501ff1" ], "author": { "name": "Anastasia Klimchuk", "email": "aklm@chromium.org", "time": "Fri Aug 27 15:47:46 2021 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "par_master: Fix propagation of register_par_master() return values\n\nThis patch checks return value of register_par_master()\nso that in case of an error this error is not ignored anymore.\n\nTested: builds and ninja test\n\nChange-Id: I377afae41708c7433a56615e2f096bce9c5349f1\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/57192\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72234\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "b91a203091fc43824bc57f3c8e2db0bcc311da59", "tree": "8fffff062afae6b9ce853c69a6636bc33bcabbbc", "parents": [ "03f3a6d13e8bd62ef84ef6a4a6f21d6fb8b2a7b8" ], "author": { "name": "Anastasia Klimchuk", "email": "aklm@chromium.org", "time": "Fri May 21 09:40:58 2021 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "programmer: Smoothen register_par_master API\n\nIt was impossible to register a const struct par_master that would\npoint to dynamically allocated `data`. Fix that so that we won\u0027t\nhave to create more mutable globals.\n\nChange-Id: I95bc92f6c54c5bcdac1c522ca87054aaffed0f40\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54169\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72201\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "43040f297e68cd4d826d58f57566581ef902d179", "tree": "a8357aba5a8dbfd43f3e7949c865f2682bf5962d", "parents": [ "4203a47a102e2622f404ee6567b240882d584116" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Thu Jun 23 14:38:35 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 05 16:35:01 2023 +0000" }, "message": "tree: indent struct *_master consistently with tabs\n\nUse `\u003ctab\u003e.key\u003ctab\u003e*\u003d \u003cvalue\u003e,`\n\nTEST: `make VERSION\u003d0 MAN_DATE\u003d0` returns the same flashrom binary\nbefore and after the patch\n\nChange-Id: I1c45ea9804ca09e040d7ac98255042f58b01f8ef\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/65363\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71466\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "cc853d84ed2f8ecafc1f6daa443f8baa4c871805", "tree": "8e5f3e0b7a75d272a109e20af5aeeeec11dfebf7", "parents": [ "7e1345602641114c8eeb5cfef992bf1da8d7fa6a" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.de", "time": "Tue May 04 15:32:17 2021 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 05 16:15:22 2023 +0000" }, "message": "programmer_table: move each entry to the associated programmer source\n\nChange-Id: I3d02bd789f0299e936eb86819b3b15b5ea2bb921\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.de\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/52946\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71373\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "83c56b870bcf0d241993813b9f695c2118532f7a", "tree": "81af4dcd1d8c6b94343b8b230e18a6f802e47382", "parents": [ "93737bcaf5e9c54501eb411b84c3b32e2dff944a" ], "author": { "name": "Evgeny Zinoviev", "email": "me@ch1p.com", "time": "Tue Nov 05 17:47:43 2019 +0300" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Nov 14 22:47:32 2019 +0000" }, "message": "Fix building with GCC 4.9\n\nIt doesn\u0027t like empty initializers.\n\nChange-Id: If2988e60401155f87ee3369c77f00ccf9332012c\nSigned-off-by: Evgeny Zinoviev \u003cme@ch1p.io\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom/+/36629\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "e083880279119677e443fc16b4694f8c81bf2c40", "tree": "03413b996779bc4c86ec41590f3e7bcdd97d0ef5", "parents": [ "124ef38f7afc61ad7c713c22aad7c5c7f79bdb9b" ], "author": { "name": "Elyes HAOUAS", "email": "ehaouas@noos.fr", "time": "Mon Apr 02 11:14:02 2018 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Apr 24 20:21:41 2018 +0000" }, "message": "Remove address from GPLv2 headers\n\nChange-Id: I7bfc339673cbf5ee2d2ff7564c4db04ca088d0a4\nSigned-off-by: Elyes HAOUAS \u003cehaouas@noos.fr\u003e\nReviewed-on: https://review.coreboot.org/25381\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "6697f71ade7b6428c7be6051c02dbb9768900e04", "tree": "23a2f8596d493396b7d9571ee91888e3f49c49f9", "parents": [ "88b19257cb41c97123d832460c944abc588a8e89" ], "author": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Wed Aug 06 15:09:15 2014 +0000" }, "committer": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Wed Aug 06 15:09:15 2014 +0000" }, "message": "Add a bunch of new/tested stuff and various small changes 21\n\nTested mainboards:\nOK:\n - ASUS F2A85-M\n Reported by various corebooters\n - ASUS M2N-MX SE Plus\n Reported by Antonio\n - ASUS P5LD2\n Reported by François Revol\n - Lenovo ThinkPad T530\n Reported and partially authored by Edward O\u0027Callaghan\n - MSI MS-7502 (Medion MD8833)\n Reported by naq on IRC\n - Shuttle AB61\n Reported by olofolleola4\n - ZOTAC IONITX-F-E\n Reported by Bernardo Kuri\n\nFlash chips:\n - Atmel AT45DB021D to PREW (+PREW)\n Reported by The Raven\n - Atmel AT25F4096 to PREW (+PREW)\n Reported by 공준혁\n - GigaDevice GD25Q16(B) to PREW (+PREW)\n Reported by luxflow@live.com using a GD25Q16BSIG\n - Catalyst CAT28F512\n Mark erase and write as known bad (not implemented)\n\nMiscellaneous:\n - Various spelling corrections by Daniele Forsi.\n - Added and refined a bunch of chips originally investigated by Carl-Daniel.\n - Marked the ARM-USB-OCD-H programmer as tested\n (reported by Ruud Schramp).\n - Tiny other stuff.\n\nCorresponding to flashrom svn r1839.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n" }, { "commit": "a5bcbceb581f27cfc0055369d3dd9cfd1ae00bfa", "tree": "5daecd880a16b7011be28e064fb7550f3e6b7e58", "parents": [ "82b6ec1df30d3fca55547f230c76718d6e613b2a" ], "author": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jul 19 22:03:29 2014 +0000" }, "committer": { "name": "Carl-Daniel Hailfinger", "email": "c-d.hailfinger.devel.2006@gmx.net", "time": "Sat Jul 19 22:03:29 2014 +0000" }, "message": "Rename programmer registration functions\n\nRegister_programmer suggests that we register a programmer. However,\nthat function registers a master for a given bus type, and a programmer\nmay support multiple masters (e.g. SPI, FWH). Rename a few other\nfunctions to be more consistent.\n\nCorresponding to flashrom svn r1831.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n" }, { "commit": "0ccec8f21228fab9e5e57c9392f6feafbf296ef1", "tree": "acd2e0d426a3ec0b7829df72f6a0cbb8a9c232e2", "parents": [ "72d42f87a9a01a1d27fba593ce4569331e079cbe" ], "author": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Sun Jun 01 23:49:03 2014 +0000" }, "committer": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Sun Jun 01 23:49:03 2014 +0000" }, "message": "Move global io_base_addr into compilation units\n\nCorresponding to flashrom svn r1813.\n\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" }, { "commit": "72d42f87a9a01a1d27fba593ce4569331e079cbe", "tree": "b5850f2c7961641b0fbb0447be298ded5c3db3c6", "parents": [ "4f094750fa38f442d575f9cd2f7ce144ae3218cb" ], "author": { "name": "Kyösti Mälkki", "email": "kyosti.malkki@gmail.com", "time": "Sun Jun 01 23:48:31 2014 +0000" }, "committer": { "name": "Stefan Tauner", "email": "stefan.tauner@alumni.tuwien.ac.at", "time": "Sun Jun 01 23:48:31 2014 +0000" }, "message": "Add IT8212F as programmer\n\nThis PCI PATA controller can use 3V parallel flash up to 128 kB.\n\nMy card was identified as:\n PCI 1283:8212, subsystem 1283:0001.\n\nand labelled as:\n Innovision Multimedia LTD.\n EIO ATA133 RAID\n (DM-8401 Ver A)\n\nThis particular card did not require setting of any GPIO signals to\nenable flash writing. My card has Pm39LV512 in PLCC32 package without\nsocket.\n\nRebased by Stefan (automatic cleanup, some PCI changes, changed\nenable bit handling). Committed with test state NT because the\nrebased version was not tested on real hardware (yet).\n\nCorresponding to flashrom svn r1812.\n\nSigned-off-by: Kyösti Mälkki \u003ckyosti.malkki@gmail.com\u003e\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n" } ] }