)]}' { "log": [ { "commit": "06e0264aa076bb9359274692850bf9010a1fe5c7", "tree": "c72b5d6086fe5de5c64730bdcc144521c7099d58", "parents": [ "fe21b43203c08f597c1295dba556323e63b3f209" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Oct 26 00:46:11 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Puya PY25Q..H family up to PY25Q128H\n\nThese are all the 3.3V parts of the family with only 24-bit\naddresses (3BA). First two (PY25Q40HB, PY25Q80HB) don\u0027t have\na configuration register and no WPS bit. From PY25Q64HA on,\nthe voltage range starts from 2.7V (instead of the 2.3V they\nhad before). There are versions with fixed quad-enable bits.\nAlas, they use different IDs, so we need duplicate database\nentries again.\n\nDatasheets used:\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q80HB_Datasheet_V1.7.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q16HB_Datasheet_V1.6.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q32HB_Datasheet_V1.7.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q64HA_Datasheet_V1.9.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F64HA_Datasheet_V1.1.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25Q128HA_Datasheet_V2.0.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25R128HA_Datasheet_V1.0.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F128HA_Datasheet_V1.2.pdf\n\nChange-Id: I9f97e686604cf722af36c799dc0c5c1e7e942a26\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/295\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "fe21b43203c08f597c1295dba556323e63b3f209", "tree": "05161bf0efd4ca85f8483a92d8d014e457332c67", "parents": [ "1c5d8296f9997e6b773352688fce59c24c1aafd5" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Oct 25 23:51:05 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add remaining P25Q..H family 3.3V chips\n\nThey all support QPI, and WPS for individual sector protection.\nHowever, the original P25Q32H and P25Q64H have a different de-\nfault setting for the dummy cycles in QPI mode. Hence, we need\nduplicate database entries once more.\n\nDatasheets used:\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q32H_Datasheet_V1.4.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q32SH_Datasheet_V1.9.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q64H_Datasheet_V1.4.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q64SH_Datasheet_V1.5.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q128H_Datasheet_V1.6.pdf\n\nChange-Id: I700747a6bc1762f113846aa62f55681fa2c8cfbb\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/294\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "b0cae5e30ef780f73b89b8c4ff43c651a3612698", "tree": "6321ef6d3dbe4140a4094bb63f26fe66dd26d6b3", "parents": [ "b09136b0971913cf7f984355c1005f65575aba44" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Oct 25 23:03:40 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Puya P25Q06H, P25Q11H, P25Q21H 3.3V parts\n\nThese look like an update to the original quad-i/o chips. They\nhave a configuration register that is read/written like a third\nstatus register. Otherwise, they seem very much compatible, but\nhave different IDs.\n\nDatasheet used:\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q21H_11H_06H_Datasheet_V2.1.pdf\n\nChange-Id: I984c574bcfd7275a2234c1db13935c01d12fab72\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/292\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "b09136b0971913cf7f984355c1005f65575aba44", "tree": "c11416105bf9ff3bb8a8a8b2a1ade79f9e63278c", "parents": [ "ed8b82c17e285de43437325fe7c402186719da8c" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Oct 25 22:52:30 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Puya P25Q05..16H 3.3V parts\n\nAll quad-i/o chips with block-protection similar to Winbond. One\nspecialty is a page-erase operation. At the upper end (P25Q08H,\nP25Q16H), they have a configuration register that is read like a\nthird status register however written like a second (31h, accor-\nding to the datasheets).\n\nDatasheets used:\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q40H_20H_10H_05H_Datasheet_V2.0.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q80H_Datasheet_V1.7.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q16H_Datasheet_V2.1.pdf\n\nChange-Id: I8ca43d19603cd11fd9cf06d2afc930b1096548d3\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/291\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "ed8b82c17e285de43437325fe7c402186719da8c", "tree": "e252a99cb8978e5fc27eda846dc8c92de9058024", "parents": [ "4a351349eb0e2156adc06cb628f4db64d7857d40" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Oct 22 00:12:03 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Fudan FM25Q128 3.3V part\n\nThis chip has non-volatile DC bits that control the number of dummy\ncycles for all fast-read commands in all modes. As we don\u0027t check\nsuch bits, we don\u0027t enable any fast reads for now. Otherwise it\nlooks well featured. Block protection seems to follow Winbonds\nscheme, however without SEC and SRL bits.\n\nDatasheet used:\nhttp://eng.fmsh.com/nvm/FM25Q128_ds_eng.pdf\n\nChange-Id: I9cda2fdbc13c20eda999555d09c9a847d0192536\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/290\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "7f7bffa8b4c71d0cf652d94c1386284cdd5a012a", "tree": "01c190da882dd96fd5563396a8dba41039ae8ba8", "parents": [ "c591518dca2c097d907787858d177707158bc10e" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Oct 21 23:57:11 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Fudan FM25Q64, update FM25Q08..Q32\n\nFor all bits that matter to us, these chips seem to have the same\nstatus-register layout. The FM25Q64 differs in a few bits that are\nout-of-scope, and additionally supports a WRSR2.\n\nDatasheets used:\nhttp://eng.fmsh.com/nvm/FM25Q08_ds_eng.pdf\nhttp://eng.fmsh.com/nvm/FM25Q16_ds_eng.pdf\nhttp://eng.fmsh.com/nvm/FM25Q32_ds_eng.pdf\nhttp://eng.fmsh.com/nvm/FM25Q64_ds_eng.pdf\n\nChange-Id: I820ed60366d19ab4d87f8c02b4018ffb5591ca5f\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/288\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "c591518dca2c097d907787858d177707158bc10e", "tree": "0bdc1e5ece5d1fc5935c50f845a82a928723ea71", "parents": [ "fea6e16e177fc7a9fd5acd75f812272bcadab163" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Oct 21 23:40:10 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Fudan FM25Q02/Q04 3.3V parts\n\nThese smallest two in the series seem to have the same status-\nregister layout. They look almost feature-complete, with only\na SEC-bit missing.\n\nDatasheets used:\nhttp://eng.fmsh.com/nvm/FM25Q02_ds_eng.pdf\nhttp://eng.fmsh.com/nvm/FM25Q04_ds_eng.pdf\n\nChange-Id: Ic267ddd2b33b63e72ad923f2bbe0af29aaa6bf93\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/287\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "fea6e16e177fc7a9fd5acd75f812272bcadab163", "tree": "1a00a179b4076d6b6e885f47547b439c5c87b64d", "parents": [ "56d727e3829923c01b21d4f8d2a281acbb2c83bf" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 23:11:57 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Winbond W25Q16JV_M (DTR version)\n\nFully featured 3.3V version of Winbond\u0027s 16Mbit chip.\n\nDatasheet used:\nhttps://www.winbond.com/resource-files/w25q16jv_dtr%20reve%2002092018%20plus.pdf\n\nChange-Id: I3150b4690c73c1118b6819b83b9dfab55ddf3c8f\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/286\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "c64a80362eabce9bbdc44c79b9d2fbd1e77389c2", "tree": "14a32474129ea9057efa2c3c471b6267edad21ca", "parents": [ "46e42096032e85265b0740b47c86f4975cf365ef" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 19:14:19 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add XTX Tech. XT25F..B 3.3V family\n\nThese are old versions of the 3.3V family, that don\u0027t seem to be\nmanufactured anymore. Except for the smallest 16Mbit chip, they\nhave QPI support which newer versions lack. The block-protection\nseems to follow Winbond\u0027s model.\n\nDatasheets used:\nhttps://xonstorage.blob.core.windows.net/pdf/xtx_xt25f16bsoigu_xonjuly20_20_link.pdf\nhttps://www.lcsc.com/datasheet/lcsc_datasheet_2410121518_XTX-XT25F32BSOIGU-S_C558851.pdf\nhttps://www.lcsc.com/datasheet/lcsc_datasheet_2411220126_XTX-XT25F64BSSIGU_C3202692.pdf\nhttps://www.lcsc.com/datasheet/lcsc_datasheet_2410121527_XTX-XT25F128BSSIGU_C558845.pdf\n\nChange-Id: Ifc5607674fabf1466155d821e7d5e88886d3b21b\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/284\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "46e42096032e85265b0740b47c86f4975cf365ef", "tree": "c4d77e4da37ec5b45fc3aafdff84c5c5a76c8095", "parents": [ "6bc88e72d97a140cf657571a2f4a4f3e1c643954" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 18:21:43 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add XTX Tech. XT25F02E/04D/08B 3.3V parts\n\nThese are old chips with rather limited capabilities. Their\nblock-protection ranges are rather special, hence not added\nat the moment.\n\nDatasheets used:\nhttps://en.xtxtech.com/download/?AId\u003d118\nhttps://en.xtxtech.com/download/?AId\u003d136\nhttps://en.xtxtech.com/download/?AId\u003d51\n\nChange-Id: I28ec5087be63b394b0f387ca01e2391823680272\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/283\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "6bc88e72d97a140cf657571a2f4a4f3e1c643954", "tree": "58bb0483d5951b1648707ff651a318ffe27b7623", "parents": [ "3cddff471a7c5ada2770bd5c3e928e85fe2d037d" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 16:32:08 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Boya/BoHong BY25Q32/64/128 3.3V variants\n\nAdd all remaining 3BA, 3.3V parts of the BY25Q family. Once more,\ndatasheets look very similar. The whole family supports volatile\nstatus-register writes, three status registers, and all the usual\ndual- and quad-i/o instructions. Also, they use the common, Win-\nbond-like block protection bits.\n\nDatasheets used:\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q32BS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q32CS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q32ES.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q64AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q64ES.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q128AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q128ES.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q128FS.pdf\n\nChange-Id: Iff9c0459d215669025bc2af8b619fcf17c56f528\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/282\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "3cddff471a7c5ada2770bd5c3e928e85fe2d037d", "tree": "2a2b5b44965fbbf695ee172d9bd0ac032b841fb5", "parents": [ "34e3de6f9e89801eb34927bc372a084e934042f2" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 15:18:53 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Complete Boya/BoHong BY25D family\n\nExcept for the sizes, the datasheets look the same. All chips support\ndual-output fast reads. There is some overlap with the BY25Q family,\nbut given the small sizes (2MiB max.), it doesn\u0027t seem worthwhile to\nadd additional entries for these chips.\n\nThe block protection of the BY25Ds is rather peculiar, hence not con-\nfigured: It looks like hardcoded CMP\u003d1, SEC\u003d1 with 8KiB sectors and\nno 32KiB limit.\n\nDatasheets used:\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D05AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D10AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D20AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D40AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D40ES.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D80AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25D16AS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q80BS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q80ES.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q16BS.pdf\nhttp://en.boyamicro.com/download/SPI_NOR_Flash/BY25Q16ES.pdf\n\nChange-Id: Ie3f8578c152fcedd3ccb60873018d92e1dc80876\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/281\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "34e3de6f9e89801eb34927bc372a084e934042f2", "tree": "11a9b565564d0290c0cacd20f18e89313ceceaf9", "parents": [ "f050370395afb0f4658458697984075dce551123" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Oct 20 13:00:12 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add Zetta Device ZD25LQ64/128 1.8V parts\n\nDatasheets for both look very much the same. Block protection and\nQPI implementations seem to follow Winbond.\n\nDatasheets used:\nhttp://www.zettadevice.com/upload/file/pdf/DS_Zetta_25LQ64_RevA_20180801.pdf\nhttp://www.zettadevice.com/upload/file/20150821/DS_Zetta_25LQ128_RevA_20180815.pdf\n\nChange-Id: Iea8c4076105910b4e0975b02a92f287ded745eae\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/280\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "d4e41d353604cb19938305590efbc81642152422", "tree": "50d1ec87c227b58de5c56723bfb86b6c09b1e305", "parents": [ "04c1cf789b0468de5fd1368469d90b6fc75b3c46" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Oct 18 14:59:54 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 23 12:05:52 2025 +0000" }, "message": "flashchips: Add SST26VF080A\n\nSimple 8Mbit SPI flash, with one caveat though: SFDP reports 0xd8 as\nboth 32KiB and 64KiB eraser. The datasheet[1] lists this too in the\nSFDP table, however otherwise consistently states that erase blocks\nare uniform, and lists 0x52 as the 32KiB eraser. For now, we\u0027ll try\nthe latter.\n\n[1] https://ww1.microchip.com/downloads/aemDocuments/documents/MPD/ProductDocuments/DataSheets/SST26VF080A-2.5V-3.0V-8-Mbit-Serial-Quad-IO-%28SQI%29-Flash-Memory-20006203C.pdf\n\nChange-Id: I7d66ff23ef9ded7365e9c75a1aff0a68678a4ba0\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/263\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "6ce26a72f721461d3de48c12cd1dc09a96b5519c", "tree": "7ca4f4b528dd04b73af42d05b721d4c30c00ca7a", "parents": [ "612519b2c54a008744891540407f2c8ff251083d" ], "author": { "name": "Alexandru M Stan", "email": "ams@frame.work", "time": "Fri Oct 11 22:47:24 2024 -0700" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 14:00:40 2024 +0000" }, "message": "flashchips: add Winbond W25R512NW / W74M51NW\n\nI used W25Q256JW as a template and just increased every erase size\ncalculation.\n\nDatasheet can be found by form contact only via\nhttps://www.winbond.com/hq/product/code-storage-flash-memory/serial-nor-flash/?__locale\u003den_TW\u0026partNo\u003dW25R512NW\n\nI tested it by running:\ndd if\u003d/dev/urandom of\u003d/tmp/random.bin bs\u003d1M count\u003d64\nsudo /tmp/flashrom/build/flashrom -p ft2232_spi:type\u003d2232H -w /tmp/random.bin --progress\nsudo /tmp/flashrom/build/flashrom -p ft2232_spi:type\u003d2232H -v /tmp/random.bin\nAnd I saw \"Verifying flash... VERIFIED.\"\n\nChange-Id: Ibf670e4014a22e4636789768b759cb51f75cd046\nSigned-off-by: Alexandru M Stan \u003cams@frame.work\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/84752\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/272\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "612519b2c54a008744891540407f2c8ff251083d", "tree": "f264bf5339ab332436dfd9acaa86d76b7492c1cf", "parents": [ "d5a61efe4e73675570eba7d537b4ec7e476946cb" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Nov 06 23:37:11 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ichspi: Add Intel Arrow Lake support\n\nARL looks much like a desktop version of Meteor Lake. Hardware registers\nseem to be the same, and the descriptor mostly differs in strap settings\n(as far as we are concerned).\n\nOdd enough, the old (pre 500 series) format for processor straps is used\nagain. For the descriptor detection, we shuffle the old default for Ibex\nPeak around, and make Arrow Lake the default for everything with over 80\nPCH traps.\n\nTested `ich_descriptors_tool\u0027 output for a GIGABYTE Z890M GAMING X BIOS.\n\nDocuments used:\n * Intel® Core™ Ultra 200S Series Processors Datasheet, Volumes 1 and 2\n * Arrow Lake-S and Arrow Lake-HX Client Platform\n SPI Programming Guide\n\nChange-Id: Ibaaeb896273eed3806561ba8c01d89770d27ff18\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/270\n" }, { "commit": "d5a61efe4e73675570eba7d537b4ec7e476946cb", "tree": "615c8bc476cf847c2d0bea4f7f1f154eede67e5a", "parents": [ "5e0d9b04a07f5646038020e1a45dd04c0b14e8f3" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Nov 06 23:55:44 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ichspi: Add Intel Lunar Lake support\n\nHardware looks much the same as Meteor Lake. The descriptor, however,\nknows 7 masters and regions are named a bit differently. Hence, add a\nnew enum entry for Lunar Lake.\n\nTested `ich_descriptors_tool\u0027 output for an MSI Prestige 13 A2VMG BIOS.\n\nDocuments used:\n * Intel® Core™ Ultra 200V Series Processors Datasheet, Volumes 1 and 2\n * Lunar Lake Client Platform\n SPI Programming Guide\n\nChange-Id: Ia377872cba56a3db6d853b7ce1bd495e5a03a868\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/271\n" }, { "commit": "5e0d9b04a07f5646038020e1a45dd04c0b14e8f3", "tree": "70386babe868ba7282cbbb0d8bc53880286025e8", "parents": [ "0ef2eb8f041ad6918dd41f4837d39be8811889c9" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jul 19 21:44:52 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ichspi: Add Intel Meteor Lake SoC\n\nHardware looks the same as C740 series / Emmitsburg. The descriptor\nis somewhere between the latter and latest desktop platforms.\n\nOutput of `ich_descriptors_tool\u0027 with an image from Google/Rex looks\nreasonable.\n\nTested probing and reading on a Lenovo L16 ThinkPad.\n\nDocuments used:\n * Intel® Core™ Ultra Processor Datasheet, Volumes 1 and 2\n * Meteor Lake/Arrow Lake-U / H Client Platform\n SPI Programming Guide\n\nChange-Id: I7f1d162622a141fadcad715b064f92b1ccf7c72a\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/189\n" }, { "commit": "0ef2eb8f041ad6918dd41f4837d39be8811889c9", "tree": "978d212a6cc5031e589162c49a36e4353e91c937", "parents": [ "42daab10a7704bfbe4a0af1a07748b8858649301" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jul 19 21:38:17 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ichspi: Add Intel Snow Ridge SoC\n\nHardware looks the same as C740 series / Emmitsburg. The descriptor,\nhowever, has very different frequency settings and different regions\nand masters.\n\nThe output of `ich_descriptors_tool\u0027 tested with an image from Intel\nlooks reasonable.\n\nChange-Id: I9f9dc4414af63cbe48d22ef2955df28e297d7e4c\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/188\n" }, { "commit": "42daab10a7704bfbe4a0af1a07748b8858649301", "tree": "9a9aa5465db9f58aa9d0c55f9807a2f694a98e05", "parents": [ "af26008fbabdd780bc6966acca4ad2481520b304" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Jul 16 00:27:27 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ichspi: Properly add Emmitsburg PCH\n\nThe Emmitsburg or C740 series PCH is actually ahead of all the other,\ncurrently supported chipsets. Finally, Intel added new registers that\ncarry the read and write access permissions for all 16 regions.\n\nThe old FRAP register seems to be still around, so we print both new\nand old registers. For the detailed report we use the new registers,\nthough.\n\nWe also adapt the descriptor detection slightly: We check for `NM \u003d\u003d 6`\njust like we did for Lewisburg. This way we won\u0027t treat a huge range of\nISL (ICH/PCH strap length) values as Emmitsburg, which should result in\nless false positives.\n\nThe output of `ich_descriptors_tool\u0027 tested on some Supermicro firmware\nlooks reasonable. Also tested read/erase/write in `swseq\u0027 and `hwseq\u0027\nmodes with 7 series PCH, reading with ADL-P. All logs still report FRAP\nsettings correctly.\n\nChange-Id: Ibf5ebe2e2edfe5e5ae26bf1136648bf6354b0aa9\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/187\n" }, { "commit": "b3cc2c6d3b39cc3c97d4130257b805a152a79b4c", "tree": "a8175496af3d776dcd5b528a045bc8853d5f3455", "parents": [ "8e4151ddb5b4533aa004594e5009ad92159b0651" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 15 00:45:17 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 10 13:58:05 2024 +0000" }, "message": "ich_descriptors: Unify pretty printing of PCH100+ masters\n\nThe newer platforms mostly differ in names and numbers of masters and\nregions. Make that obvious, and write a generic printing loop. Hope-\nfully this will make future additions easier.\n\nChange-Id: I3e616064743e9558f799159ef8b702f2bbd8ec89\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/182\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n" }, { "commit": "8f7122cd1183a4224b14131483d549df497b22a6", "tree": "29a124ddc5e06cab3eb3f4f71d4b21b2f642c04d", "parents": [ "eed122d401a9da5fb438e73e8c7d905092481110" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 11 18:28:33 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "cli: Add new write-protect CLI\n\nAdd a new write-protect CLI that is based on the classic-CLI feature\nin flashrom/master. The syntax is slighty different: With the new\nCLI wrapper, we can either call it as `flashprog write-protect` or\n`flashprog wp`. To keep the CLI code clean, we allow only one write-\nprotection operation per call.\n\nFor instance, the write-protection status can then be queried like\nthis:\n\n $ flashprog wp status -p ch341a_spi\n\nChange-Id: I32818b58c9db939719913fc63063c41a27876554\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72991\n" }, { "commit": "eed122d401a9da5fb438e73e8c7d905092481110", "tree": "6c6f292ec515f21aab5b78db29b197004b2b918b", "parents": [ "1f693db7ecb074c42172a3914ed63f4e08de7560" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 11 02:05:07 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "layout: Implement flashprog_layout_get_region_range()\n\nSimilar to the function found in flashrom/master, implement a\nlibflashprog API to query the range of a layout region.\n\nChange-Id: Idb3b1a4d24a34847102d66ee0e2cb4d93ae99eac\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72990\n" }, { "commit": "1f693db7ecb074c42172a3914ed63f4e08de7560", "tree": "a76bbbbd7bed2281f677bef1b2e3ce957e63ecb1", "parents": [ "85c2cf81ffae0d1ef65d25652dd5422162d38187" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 11 18:28:33 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "cli: Add new `config\u0027 CLI for status/config registers\n\nAdd a new CLI mode to query and update status and configuration\nregisters of SPI NOR chips. Programmer initialization and chip\ninitialization works the same as with the classic CLI (`-p\u0027 and\n`-c\u0027 options). There are two commands `get\u0027 and `set\u0027 where the\nformer is implied if no command is given. For a start, only the\n`quad-enable\u0027 bit can be accessed (for chips that advertise it\nin the database).\n\nThe `--temporary\u0027 option allows to use a volatile write status\nregister command if the flash chip supports it. So changes made\nwith this option will not be written to flash and are lost when\nthe chip is reset.\n\nFor instance, the quad-enable bit can then be queried like this\n\n $ flashprog config get -p ch341a_spi quad-enable\n\nor written with\n\n $ flashprog config set -p ch341a_spi quad-enable 1\n\nor\n\n $ flashprog config set -p ch341a_spi --temporary quad-enable 1\n\nChange-Id: I6b9d26c67e6ad65be5df367d2db7942bb98f27ac\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/195\n" }, { "commit": "85c2cf81ffae0d1ef65d25652dd5422162d38187", "tree": "0227041853e65605f3464240ac48c435a724edbd", "parents": [ "24c0977a70cf5e135434dad466024505f8965f66" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Nov 02 13:47:06 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "cli: Implement \"command\" option parser\n\nAdd a new helper getopt_command() that works like a POSIX-compliant\n(i.e. no `argv` permutating) getopt_long(), except that it doesn\u0027t\nsearch for options with a `--\u0027 prefix but those without.\n\nChange-Id: I18b63ee4e5b523e2f4cfcd0c8764ea9353927236\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/268\n" }, { "commit": "24c0977a70cf5e135434dad466024505f8965f66", "tree": "c219d3dbad6ebdc697bcfa3923772a497e7bb62e", "parents": [ "b82aadcbbf173fcaf6c93c7d8cc664bf33b0dd21" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Nov 02 13:46:21 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "cli: Add print function for generic CLI options\n\nChange-Id: I3d5d73c6184dd65c9eacbb2f69c6e1a565d41ab0\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/267\n" }, { "commit": "b82aadcbbf173fcaf6c93c7d8cc664bf33b0dd21", "tree": "f2038c52d252f78ee97adaf56d614b10eb92884f", "parents": [ "a705043179ab641794f497c2ebf6a60d7f3d9b3e" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 11 18:27:30 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "cli: Move some declarations into `cli.h`\n\nThis will help to keep new CLIs clean from internal headers.\n\nChange-Id: I3e5515ae5645fcdce56c13df1ff23de829bbbdb9\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72989\n" }, { "commit": "a705043179ab641794f497c2ebf6a60d7f3d9b3e", "tree": "1ade082eb16bd84ba9685fe4a1c7275b47e2561d", "parents": [ "d39c7d6ca6d7adacc07b98e4d0e3efe476d649e6" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 11 18:01:26 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "cli: Add a new CLI wrapper\n\nThis new CLI wrapper introduces a command mode, like we are used from\nGit for instance. The first argument specifies the command mode, which\nis `prog` for the classic flashprog CLI. As an alternative to a first\nargument, it can be called as `flashprog-cmd`, `flashcmd`, or `fcmd`,\nvia symbolic links for instance. Splitting CLI functions will allow us\nto add more CLI features, that can be developed independently from the\nclassic CLI.\n\nFor instance, flashprog could then be called like this:\n\n $ flashprog -p ch341a_spi\n $ fprog -p ch341a_spi\n\nFor the future \"config\" CLI, more aliases are possible, e.g.:\n\n $ flashprog config -p ch341a_spi\n $ flashprog-config -p ch341a_spi\n $ flashcfg -p ch341a_spi\n $ fconfig -p ch341a_spi\n\nChange-Id: I98cb110b47ebce52daf2e0972fc4565ef9d40242\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72988\n" }, { "commit": "d39c7d6ca6d7adacc07b98e4d0e3efe476d649e6", "tree": "f8b3a36e914800b81b1b314e781b20e95e768736", "parents": [ "df6ce9ff64e5e005ddd51353e519ec87388e47d9" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 11 00:53:08 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "cli: Extract basic CLI init into cli_common\n\nMove the first initialization steps (log callback setting,\nversion/banner printing, and libflashprog init) into a new\nfunction cli_init(). This will be shared by other CLIs.\n\nChange-Id: I9f19006aac18ffcdc05159957d58a2668c41e2b1\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72987\n" }, { "commit": "df6ce9ff64e5e005ddd51353e519ec87388e47d9", "tree": "a1baf7268de195c3c4f21de183b3dc9c870ba034", "parents": [ "0da839bac81da604cc7102c4dabf97efb6bda57c" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 11 16:16:04 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "cli: Extract log argument parsing into cli_common\n\nMove log argument parsing into `cli_common.c` as it\u0027s also useful for\nother CLIs. Also add a NULL-check for the strdup() return value.\n\nChange-Id: I9b1c9ae2e490edd3560b11b84fddd79e4d396e1d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72986\n" }, { "commit": "0da839bac81da604cc7102c4dabf97efb6bda57c", "tree": "bce2cb7a129f42b86402ae2e4fd4523704238ff6", "parents": [ "d91822a91d179e0b27629341a3d1a436110b8028" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 11 01:40:07 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "cli: Extract layout argument processing\n\nMove the processing of layout arguments (i.e. actual reading\nof layout files / data from flash) into a shared function,\ncli_process_layout_args().\n\nThis changes the sequence in `cli_classic.c` slightly: A layout\nfile is now read and parsed after the programmer init / chip\nprobing.\n\nChange-Id: Ibb6574a27bcabc923a53ec355afd384da0665e4c\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72985\n" }, { "commit": "d91822a91d179e0b27629341a3d1a436110b8028", "tree": "cc466b329f29b6ca819b9b059c67419fc0c087d1", "parents": [ "e7899a9c40624eab4cd68595fbcaed91c0ace29a" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 11 00:43:54 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "cli: Extract layout argument parsing into cli_common\n\nMove the parsing logic for layout sources into the new function\ncli_parse_layout_args(). This way it can be shared with other CLIs.\n\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\n\nChange-Id: Idcbb136d31477cdb0aebec4af0c4cbc873f26011\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72984\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "e7899a9c40624eab4cd68595fbcaed91c0ace29a", "tree": "6a330fcc1fb75b8c9112994c16698ba758d41c54", "parents": [ "34e783ad1d2fded9fecef4c623d95ad96ee6dada" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 11 00:39:47 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "cli: Move all long-option keys into cli.h\n\nGather all long-option key values in `cli.h` so we can have a single\nenum that counts the numbers up and thus provides unique values.\n\nChange-Id: Id9fb27b442308ee7a7d59282f6db1f8f18ef20f2\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72983\n" }, { "commit": "34e783ad1d2fded9fecef4c623d95ad96ee6dada", "tree": "bf713cf732a504a0aa2018b46e9f44699bb5c51a", "parents": [ "e68b08b386631f5a44dfa30bf437e0b4dfdd3350" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 11 00:30:27 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "cli: Extract flash argument parsing into cli_common\n\nMove the parsing logic for `-c` and `-p` into the new function\ncli_parse_flash_args(). This way it can be shared with other CLIs.\n\nWe start a new header file `cli.h` for common CLI functions.\n\nChange-Id: If3f5eff0a2f56a1235038b19b3c1d6586536fd5d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72982\n" }, { "commit": "55e788491607997ca93c86e58a38f2ac5dc73afe", "tree": "90be6d93bedff5fc983054de1e474d31aff6f559", "parents": [ "fbba4545dd9ec5ea7f3416370d6b71ccc85e3f7e" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jul 21 00:46:19 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Nov 03 17:54:48 2024 +0000" }, "message": "Introduce FLASHPROG_FLAG_NON_VOLATILE_WRSR\n\nAdd a new flag to our flash context that tells us if we should use\nvolatile or non-volatile status-register writes by default. Use it\nin the write-protection API. The logic to disable block protection\nautomatically stays as is for now, until we have established tools\nto manually control the protection.\n\nChange-Id: Ie9a41b6404991075e2bf76bcffbd4e9887c62c79\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/193\n" }, { "commit": "768cfc461105e11852706154c85a312831821f4d", "tree": "1a77bf477fca555ea53b38e4fc9e9b7c5fbf8a7e", "parents": [ "d128a0ae87086b37c0e5d7a8d934bcdee173402f" ], "author": { "name": "Naresh Solanki", "email": "naresh.solanki@9elements.com", "time": "Fri Oct 04 20:17:34 2024 +0530" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Oct 14 18:42:03 2024 +0000" }, "message": "flashchips: Add GigaDevice GD25LR512ME\n\nTested on Birman+ board.\n\nChange-Id: I056d9245809c6fddae0123b8ed667deb5d00d6f6\nSigned-off-by: Naresh Solanki \u003cnaresh.solanki@9elements.com\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/262\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "dfd064759b416463244aafea80a5b7120ef8e4e1", "tree": "b1b636199d652391f66e7af12b306877d77b1aee", "parents": [ "b2ad9fd9186a0f6fea3e5b64415c1e5d1a19baa4" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jul 14 23:45:05 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jul 28 15:02:49 2024 +0000" }, "message": "ich_descriptors: Refactor component density handling\n\nIntroduce a new marker CHIPSET_HAS_NEW_COMPONENT_DENSITY and order\nthe actual chipset values around it. This move Bay Trail up before\nall 8-series PCHs.\n\nChange-Id: I1f4d724e2e2ef038aa6a56feb1578208afbbcd99\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/181\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "fda324bfc3c09cce47fe1947f6a2883b357d7f1d", "tree": "f2411a115e7d4a7d8222aa9c90aba3243c80921e", "parents": [ "a1f6476a65bda5262d46430724a3af4b49bcd9e7" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jul 14 20:36:21 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jul 28 15:02:49 2024 +0000" }, "message": "ichspi: Introduce SPI_ENGINE_PCH100 marker\n\nUse a new SPI_ENGINE_PCH100 marker in ich9_spi_init(). Suddenly this\nfunctions becomes more readable again.\n\nTested read/erase/write in `swseq\u0027 and `hwseq\u0027 modes with 7 series \u0026\nreading with ADL-P. Log output stays consistent.\n\nChange-Id: Iff03354ee886eb1ea80e37e50914b8afff08a29e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/174\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "a1f6476a65bda5262d46430724a3af4b49bcd9e7", "tree": "4c03ecc180e60864fcbf59952c01c58390921eed", "parents": [ "3f75d4476da015ae1ee033c1de1ad4dc08f66b0d" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jul 14 20:23:28 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jul 28 15:02:49 2024 +0000" }, "message": "ichspi: Split ICH7 init out\n\nThe original, ICH7 init only shared about three lines with the newer,\never growing ICH9+ init. That\u0027s not worth an indentation level in an\nendlessly long function, so split it out.\n\nWe introduce a kind of \"breakpoint\" into the `ich_chipset\u0027 enum:\n\n SPI_ENGINE_ICH9\n\nThis marks all chipset entries below it as supporting this code path\nand should help to avoid long `case\u0027 lists.\n\nTested read/erase/write on ThinkPad T60 (ICH7).\n\nChange-Id: I41e46d12e02c1343e636b47b2378db86e76af95e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/173\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "2862011212da1745e4238381bfe16f0dab3fd7c1", "tree": "c650132ba159d9fa5693afd667768f86956645e4", "parents": [ "4ac536bde43a1d64e11034cab34aabd7a6efd5dc" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jul 21 15:43:59 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi25: Try to set volatile quad-enable (QE) automatically\n\nSome chips have a volatile QE bit. Setting this won\u0027t wear the status/\nconfiguration register, so we\u0027ll try to do so automatically.\n\nChange-Id: I6a4b864d7af1f3ecedd95524f127b5486f999933\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/191\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "4ac536bde43a1d64e11034cab34aabd7a6efd5dc", "tree": "ceb3d304075fadbe31ed8d0d25dc8d4b8b8e60fb", "parents": [ "b1d2baea270c1177a78d1672b4f8dd42ed246eb4" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jul 21 00:22:29 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi25_statusreg: Allow to write (non-)volatile bits specifically\n\nThere\u0027s a subtle difference between prepending a write-status-register\ncommand with a write enable (WREN) or an enable write status register\n(EWSR): The former targets non-volatile bits, while the latter targets\nvolatile bits, i.e. register bits that do not survive a reset.\n\nSometimes bits are implemented as both volatile and non-volatile. Then,\nthe non-volatile state is loaded into the volatile registers after chip\nreset, and writes with a WREN target both. So far, we simply used WREN\nwhen possible. This can, however, lead to unnecessary wear of the non-\nvolatile bits. Flash datasheets do not mention any maximum write cycles\nfor them. However, it is unclear if this is an academic issue, i.e. the\nmanufacturers account for the wear and implement redundancy, or if they\nsimply don\u0027t expect that many configuration changes.\n\nFor a start, allow to specify explicitly which kind of register bits we\nwant to write. We keep the current behavior. However, the logic to dis-\nable block protections automatically should be revised to prefer vola-\ntile writes.\n\nChange-Id: I807a2c48f4eaa85d5a10b37362e71818359a4c93\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/190\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "1b1deda80bbd7f56b8047fad32badb749eeefffb", "tree": "e7058d9d175d08ed2542f6e34be0842a7ade8f57", "parents": [ "a1b7f3521f66a19a2d4c9a6a373c5a7ab36e1473" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Apr 18 00:35:48 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "Implement QPI support\n\nWith the quad-i/o support in place, this is actually straight-\nforward:\n* we check for compatibility of the flash chip and programmer,\n* select an appropriate fast-read function, and\n* always set the respective io-mode when passing a SPI command\n to the programmer.\n\nTested with FT4222H + W25Q128FV and linux_gpio_spi + MX25L25645G.\n\nChange-Id: I2287034f6818f24f892d66d1a505cb719838f75d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/165\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "a1b7f3521f66a19a2d4c9a6a373c5a7ab36e1473", "tree": "fd996296810ab45fe99d29d8dc254f6d496f3091", "parents": [ "008a44fa1c33b8a77c90b4e9dba267ae23c01056" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 25 18:32:11 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "dediprog: Implement multi-i/o reads\n\nThis implements i/o-mode switches and opcode handling for multi-i/o\nreads with protocol versions 2 and 3. The mode switching is done by\na simple command that takes an enum just as our internal `io_mode`\nas argument.\n\nThe opcode handling differs between protocol versions. For protocol\nv2, we keep the current behavior for single-i/o operations and only\nset the matching opcode. Tests with an SF600Plus-G2 have shown that\nthe programmer automatically chooses the address length and number\nof dummy cycles. It is unknown, however, if it chooses these para-\nmeters based on the opcode or the configured i/o mode. For dual-out\nreads, it seems to choose the wrong number of dummy cycles. Hence,\nwe mask the respective support bit for the v2 case.\n\nFor protocol v3, a new `read mode\u0027 was discovered in traces of the\nDediprog Windows application. It allows to explicitly specify the\nopcode, the address length, and the number of dummy cycles. We call\nthis READ_MODE_CONFIGURABLE. As this is the only way to make use of\nthe additional command bytes of the v3 protocol, we can assume that\nthis mode always works with v3.\n\nFor partial reads, i.e. not multiples of 512B blocks, that have to\ngo through dediprog_spi_send_command(), we temporarily disable the\nchosen `.spi_fast_read` function. This is necessary, because multi-\nio is not supported on this path.\n\nWe enable dual i/o by default for protocol v3 devices. This should\nwork out of the box with many compatible flash chips. The command-\nline logic is a little convoluted this way, but can be refactored\nonce protocol v2 devices are tested.\n\nChange-Id: Ib07b1b61eccc19c7ead9f64c980b37feabfa70a8\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/114\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "4760b6ec1f7fbcee1bf238a25e3df56a86327a5a", "tree": "a4c3762b1228f901f62d40b53ed1a953b25926b4", "parents": [ "0c9af0a639bf9180839d548f91547b58de921ca9" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Jan 06 23:45:28 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi25: Implement multi-i/o reads\n\nWe describe a read operation in a new `struct spi_read_op`. It\u0027s\ncomprised of the i/o mode, its opcode, an optional mode byte, and\nthe number of dummy bytes.\n\nBased on this information about the various read operations, and\nthe flash and master feature flags, we select the read operation\nwith the highest throughput.\n\nThe following assumption is made about 4BA chips: When it supports\nnative-4BA fast reads and a multi-i/o version of the regular fast\nread, then it should also support the respective native-4BA, multi-\ni/o version (yes, JEDEC, there are too many read commands!). So far\nthis seems to hold for the chips in our database.\n\nChange-Id: I3c93e71d85f769831d637c14d3571f7ddb54d8b2\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/49\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "0c9af0a639bf9180839d548f91547b58de921ca9", "tree": "a0656e015b5a647cb81d8a85d427687b03a2f246", "parents": [ "930d421385aae5ca93d5963fba7926970d7702e8" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun May 05 12:20:22 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi25: Check quad-enable (QE) bit\n\nWhen a chip has a quad-enable bit, check its status and disable\nquad i/o if the bit isn\u0027t set. Note, some chips have a volatile\nQE bit that we could set/reset automatically without wear. This\nwould require more work on the register infrastructure and chip\ndatabase, though.\n\nChange-Id: I8a0b9b3dee14f344d4794c91d7d6fb962a8bea87\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/164\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "930d421385aae5ca93d5963fba7926970d7702e8", "tree": "199e15c17260fabb8e422075230621a21e064531", "parents": [ "8d0f4650c73eb7bcda0b71e514c0effdf37d90b5" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat May 04 18:59:15 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi25: Introduce generic spi_prepare_io()/spi_finish_io()\n\nIntroduce two new functions to be hooked up in the chip database:\n* spi_prepare_io(), and\n* spi_finish_io().\n\nThese will be used to prepare multi-i/o and QPI operations. Hence,\nhook them up to all the chips that support those. spi_prepare_4ba()\nis wrapped to account for overlaps with 4BA support.\n\nChange-Id: I444f6322b6d6a26a040cb0ca972b2c411838d702\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/163\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "8d0f4650c73eb7bcda0b71e514c0effdf37d90b5", "tree": "f27db276221972c6451278fa41806260ebfa7046", "parents": [ "044c9dc9290565ab7b9866bb26a8d077d9c3a5d7" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat May 04 18:52:51 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi25: Extract 4BA preparations into new `spi25_prepare.c`\n\nWe will have more preparation steps for fast-read operations and\nQPI in the future. Better start a new file, as `spi25.c` already\nis rather long.\n\nChange-Id: I253b270ce6796fb09e6d74903bd65a6fbc06c7d6\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/162\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "044c9dc9290565ab7b9866bb26a8d077d9c3a5d7", "tree": "b0d6ab8fc2df6d8ff7a91a3d197e213a7ca2a320", "parents": [ "fc7c13c882067b3ad7f2f5d3846d64164b8c8c87" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Dec 29 23:26:57 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "Add FT4222H support\n\nThe FT4222H features a very different engine compared to what we are\nused to from other FTDI USB/serial chips. It doesn\u0027t do UART (at least\nnot officially), doesn\u0027t have the MPSSE engine, but has a quad-SPI\nmaster, and SPI/I2C slave support.\n\nA few similarities exist, though, so this could probably make use of\nlibftdi in the future.\n\nThere are two config-mode straps that select one of four modes:\n0. 1 data interface + 1 GPIO interface\n1. 3 data interfaces + 1 GPIO interface\n2. 4 data interfaces\n3. 1 data interface\n\nWith multiple data interfaces, GPIO pins are muxed as additional CS\nlines. The advantage of mode 0 and 3 is that apparently a bigger buffer\nis available for the data interface. Only in these modes, it gets to\nits full speed (52.8MBps according to the datasheet[1]). The CS line is\nautomatically selected based on the USB interface used. No test using\nmultiple interfaces at once were performed, though.\n\nAll the USB commands and transfer protocols were derived from traces\ngathered with the proprietary LibFT4222. The results are summarized\nin the flashprog wiki[2].\n\n[1] https://www.ftdichip.com/old2020/Support/Documents/DataSheets/ICs/DS_FT4222H.pdf\n[2] https://flashprog.org/wiki/FT4222H\n\nChange-Id: I9ee1287e13113ccf8b5ea2be4a25866413a94844\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/50\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "5fc31545c979bc345c2016852bc1597b9272daec", "tree": "4fba6e4c333706ab11ed4c02f7922e3ace55cd43", "parents": [ "d16a911a77220d7cd600c749675070d204543b5d" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 07 15:58:34 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "bitbang_spi: Implement multi-i/o\n\nAdd some optional functions to the bitbang_spi API that will allow\nus to transfer multiple bits at once. With these, implement the\nspi_send_multicommand() API, completely with all known transfer\nmodes.\n\nChange-Id: I38346de37809118e13a059e90b9f3fff6456db15\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/82\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "d16a911a77220d7cd600c749675070d204543b5d", "tree": "4fd0c463d1f352b79bac82d2bb84ab99e887532b", "parents": [ "226bb87b96c21fbd54061d043aca67e9a02f0aca" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 07 00:11:44 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "bitbang_spi: Move API into its own header file\n\nWe\u0027re going to extent it for multi-i/o.\n\nChange-Id: Ifead97d7a8f848b82a4d21c557f5d364066d5d6a\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/81\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "f7e2d9739b8ccbc841081337c1d7c46407b5f0cf", "tree": "0bd800c641b7930e096e74408e292df2017a51b1", "parents": [ "1412d9f435ead84d612086bf0051a4c3464bd079" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 18 20:28:34 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi: Allow to define a quad-enable (QE) configuration bit\n\nChange-Id: Ia6c927aeaab8de6e81313e285351ba14b3c6aa25\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/111\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "1412d9f435ead84d612086bf0051a4c3464bd079", "tree": "7d1e2050d97f8e12b280d267fac9a49dbab7939e", "parents": [ "d518563f197241cc72f5da4b2108b2df10f00372" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Jan 06 18:25:49 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi: Rework FEATURE_QPI\n\nAlas, a single feature flag is not enough. QPI requires enter/exit\ncommands and there are at least two competing sets of opcodes. More-\nover, the current flag was sometimes accidentally used for chips\nthat can only do quad-i/o for address/data phases but not full QPI.\n\nSo, add a lot of new flags and go through all the entries that have\ncurrently FEATURE_QPI set. Additionally, note the amount of dummy\ncycles required by read commands in QPI mode, and whether and how\nthese can be configured.\n\nChange-Id: Id7310af07b2fdbedb7b051e9395ea967cb345d16\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/45\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "d518563f197241cc72f5da4b2108b2df10f00372", "tree": "8ec807be43adf3b5c9f66a2701b7bf0ea3a4a11f", "parents": [ "bd72a470b9b58386b52ca4568313be71b4d2c472" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jan 05 18:44:41 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi: Prepare for multi i/o and dummy bytes\n\nMulti-i/o commands split SPI transactions into multiple phases that\ncan be transferred over 1, 2 or 4 wires. For this, we adapt `struct\nspi_command` with a new enum, specifying the transfer mode, and ad-\nditional size fields. While we are at it, move everything related\ninto a new header file `spi_command.h` so we won\u0027t further clutter\n`flash.h`.\n\nOn the master side, we add respective feature flags for the multi-\ni/o modes.\n\nSee also the comment in `spi_command.h` about multi-i/o commands.\n\nChange-Id: I79debb845f1c8fec77e0556853ffb01735e73ab8\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/44\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "bd72a470b9b58386b52ca4568313be71b4d2c472", "tree": "078afe70db3836ef41b37ce2c64fb6de67c38747", "parents": [ "3d728e7524fe086e90779ea76bf2f9bd02cdf6de" ], "author": { "name": "Sergii Dmytruk", "email": "sergii.dmytruk@3mdeb.com", "time": "Sun Jul 24 17:11:05 2022 +0300" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi25_statusreg: support reading/writing configuration register\n\nOne more variation of registers.\n\nThis one is read via a separate RDCR command, but written as if it\u0027s\nSR2 using WRSR_EXT2.\n\nPorted to flashprog w/o the FEATURE_CFGR flag, we\u0027ll already have that\ninformation in the register description.\n\nChange-Id: I45f9afcc31f1928ef6263a749596380082963de4\nSigned-off-by: Sergii Dmytruk \u003csergii.dmytruk@3mdeb.com\u003e\nOrignal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66211\nOrignal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOrignal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/71007\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "3d728e7524fe086e90779ea76bf2f9bd02cdf6de", "tree": "74d3bec50d87ac2fc45c1c2beaf5d780e6acda4a", "parents": [ "a358b14d2e7e93e317499a687223ada2d221a36a" ], "author": { "name": "Sergii Dmytruk", "email": "sergii.dmytruk@3mdeb.com", "time": "Sat Nov 27 15:14:27 2021 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jul 22 10:08:47 2024 +0000" }, "message": "spi25_statusreg.c: support reading security register\n\nNot to be confused with \"secure registers\" of OTP.\n\nSecurity register is a dedicated status register for security-related\nbits. You don\u0027t write its value directly, issuing special write commands\nwith no data set separate OTP bits to 1 automatically (WRSCUR, WPSEL\ncommands). No WREN is necessary, but at least some datasheets indicate\nBUSY state after those write commands.\n\nUnlike cases where OTP bit is part of SR and can only be written while\nin OTP mode, security register can only be written outside of the mode.\n\nThe register is found in at least these chips by Macronix:\n * MX25L6436E\n * MX25L6445E\n * MX25L6465E\n * MX25L6473E\n\nPorted to flashprog w/o the FEATURE_SCUR flag, we\u0027ll already have that\ninformation in the register description.\n\nChange-Id: Iae1753ca4cb051127a5bcbeba7f064053adb8dae\nSigned-off-by: Sergii Dmytruk \u003csergii.dmytruk@3mdeb.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/59709\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/71006\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "0d4354eee32c834a602f5bec05803bd36977cfaa", "tree": "b21a5e04456629a1da344c0965ed90e1a31f09e8", "parents": [ "5b4fdd11dd74c7f018cb04f7a27a2badc02fe182" ], "author": { "name": "Angel Pons", "email": "th3fanbus@gmail.com", "time": "Sun May 26 16:33:51 2024 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jun 02 10:01:10 2024 +0000" }, "message": "flashchips: Add W25Q32JV-.M\n\nTested by `cobra` on IRC, on a ThinkPad R500.\n\nChange-Id: If1bffe0f09802f136636035f0f4ed31c3e33a7c4\nSigned-off-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/150\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "7679b5ccf987e4999fefed6c6100a7a8f50d4350", "tree": "d904cf0a8e68feb831380054ce5956cb3b96fdca", "parents": [ "ca1c7fdd6bd6f61029492fb7a194bd47119e465f" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Apr 28 21:48:53 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Mar 27 08:32:15 2024 +0000" }, "message": "spi25: Replace spi_read_chunked() with more abstract version\n\nThe new flashprog_read_chunked() takes a low-level reading function as\nargument. This allows us to make use of the chunking with non-SPI read\nfunctions.\n\nChange-Id: Ica1b616e75e4e7682120928588e231c82cf4cf70\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/74865\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "ca1c7fdd6bd6f61029492fb7a194bd47119e465f", "tree": "6e0063b18b7b8e9b3b1ddc4da95620213331efb6", "parents": [ "e36e3dc90f81fc2a718e4b367eebff900af21126" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Apr 28 21:44:41 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Mar 27 08:32:15 2024 +0000" }, "message": "spi25: Normalize parameters of spi_nbyte_read()\n\nMost other reading functions have the destination buffer\nas second parameter.\n\nChange-Id: Id3f91f3d23132b0706b3b33bbf156356c9bf5ebc\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/74864\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "842d678f07439e133e69fc775a848dcd66369446", "tree": "c01716fbc4220c1211749772d6a566e6d70701d7", "parents": [ "aa714dd3dd7090e1fa7175f3a32a252b04817261" ], "author": { "name": "Richard Hughes", "email": "richard@hughsie.com", "time": "Fri Jan 15 09:48:12 2021 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Mar 27 08:32:15 2024 +0000" }, "message": "libflashrom: Return progress state to the library user\n\nProjects using libflashrom like fwupd expect the user to wait for the\noperation to complete. To avoid the user thinking the process has\n\"hung\" or \"got stuck\" report back the progress complete of the erase,\nwrite and read operations.\n\nAdd a new --progress flag to the CLI to report progress of operations.\n\nInclude a test for the dummy spi25 device.\n\nTested: ./test_build.sh; ./flashrom -p lspcon_i2c_spi:bus\u003d7 -r /dev/null --progress\n\nflashrom-stable:\n* Closer to original libflashrom API.\n* Split update_progress() into progress_start/_set/_add/_finish:\n Simplifies progress calls scattered through the code base. We let\n the core code in `flashprog.c` handle the total progress. Only API\n is flashprog_progress_add(). Erase progress is completely handled\n in `flashprog.c`. Fine grained read/write progress can be reported\n at the chip/programmer level.\n* Add calls to all chip read/write paths and opaque programmers\n except for read_memmapped() (which is handled in follow ups).\n* At least one wrinkle left: Erasing unaligned regions will slightly\n overshoot total progress.\n\nChange-Id: I7197572bb7f19e3bdb2bde855d70a0f50fd3854c\nSigned-off-by: Richard Hughes \u003crichard@hughsie.com\u003e\nSigned-off-by: Daniel Campello \u003ccampello@chromium.org\u003e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/49643\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/74731\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "9a11cbf21a5078bcdb8db7584c44a9ee17020db4", "tree": "e67a9eadfdb7a71f81df36c7e97180474a8c59df", "parents": [ "aabb3e0ff54e87c0136c91f105e506ed19184cc6" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jan 13 01:19:07 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:40:04 2024 +0000" }, "message": "Let the flash context directly point to the used master\n\nWe used to have a pointer to a full `registered_master` struct in\nour flash context. Beside the used master, this contained a bit\nmask of supported buses. Oddly convenient, this bit mask invited\nto bypass the chip driver and break the abstraction. It allowed\nto place bus-specific details virtually anywhere in flashprog,\nmaking it harder to find a good place for them.\n\nSo, get rid of the `buses_supported` bit mask by pointing directly\nto the master. Only the chip driver will implicitly know which type\nof master is used.\n\nChange-Id: I9ce13d8df0e7ccc67519d888dd9cb2e2ff8d6682\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72533\n" }, { "commit": "aabb3e0ff54e87c0136c91f105e506ed19184cc6", "tree": "d53c2df274e9550b1f251a94b80add2d7285c5c4", "parents": [ "89569d60e3aeeec651496b2e7a2e6064d782ab3b" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Jan 13 00:22:30 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "writeprotect: Hook wp functions into the chip driver\n\nChange-Id: I17a06210ec329aba337cf459d581463827182108\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72532\n" }, { "commit": "89569d60e3aeeec651496b2e7a2e6064d782ab3b", "tree": "bf0c3951886de60086d32ff6e1a850adad926da6", "parents": [ "929d2e1b17a448d3352dbecb6a620ee0c1e65a58" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 12 23:31:40 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "memory_mapped: Reduce `decode_sizes` to a single `max_rom_decode`\n\nWe used to store the maximum decode size, i.e. the maximum memory-mapped\nrange of the flash chip, per bus type (Parallel, LPC, FWH, SPI). There\nwas no programmer in the tree that really made use of it, though:\n* The chipset drivers usually focus on a single bus type. And even if\n they advertise the whole default set (PAR, LPC, FWH), they only pro-\n vide a maximum decode size for one of them. The latter is probably\n wrong, should really more than one bus type be supported.\n* PCI and external programmers all support only a single bus type, with\n the exception of `serprog` which doesn\u0027t set a maximum decode size.\n\nWhat made the distinction even less useful is that for some chips that\nsupport multiple bus types, i.e. LPC+FWH, we can\u0027t even detect which\ntype it is. The existing code around this also only tried to provide\nthe best possible warning message at the expense of breaking the pro-\ngrammer abstraction.\n\nHence, unify the set of sizes into a single `max_rom_decode` property.\nWe store it inside the `registered_master` struct right away, to avoid\nany more use of globals.\n\nChange-Id: I2aaea18d5b4255eb843a625b016ee74bb145ed85\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72531\n" }, { "commit": "929d2e1b17a448d3352dbecb6a620ee0c1e65a58", "tree": "dcbad4698ce5741a1080fc7ba89d4bd5c5804417", "parents": [ "7c717c36c533f56ddc7fbac2ff944870fa0249f8" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 12 00:47:05 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "internal: Pass programmer context down into chipset enables\n\nChipset enables potentially need access to programmer data, e.g.\nto process parameters, register masters etc.\n\nChange-Id: Iad211ff97e92d1973f981156bfa3154d1ba71d45\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72528\n" }, { "commit": "7c717c36c533f56ddc7fbac2ff944870fa0249f8", "tree": "b91afaf1498cde1de33e7222632ec05999bf0b73", "parents": [ "e3a26888e14d16592c2c79d1516828d3d32961a4" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 12 00:28:15 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "internal: Pass programmer context down into board enables\n\nBoard enables potentially need access to programmer data, e.g. to\nprocess parameters, register masters etc.\n\nChange-Id: I1531a6e1be9866adc5dce74c6f62bbbeae1bd274\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72527\n" }, { "commit": "e3a26888e14d16592c2c79d1516828d3d32961a4", "tree": "02d401e60defd27fe7bee194978bac782284cb39", "parents": [ "2b66ad9c4465432e6f2aff2e95f1e7a556bfc3f0" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Jan 11 21:45:51 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "Pass programmer context to programmer-\u003einit()\n\nChange-Id: I064eb4e25c3d382e4e5bde802306698fafe5e1d0\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72526\n" }, { "commit": "2b66ad9c4465432e6f2aff2e95f1e7a556bfc3f0", "tree": "187edbfe8e16593df21b2c4cb9c392e1011fd339", "parents": [ "4517e9242e8d871db5159ff8afd215f015832c7d" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Jan 11 20:15:15 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "Start implementing struct flashprog_programmer\n\nOur libflashprog API was already prepared for a programmer level context\nstored in an opaque `struct flashprog_programmer`. We start filling this\nstruct with a pointer to the programmer driver (entry in the programmer\ntable) and a mutable copy of the parameter string.\n\nChange-Id: If9a795627b1e50ea6006569e723f400ff337be20\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72525\n" }, { "commit": "b197402042a065554234700b69057e9b6eedc39a", "tree": "62e4b15dff887d157ad18dd09b3d47dd2d7f8c1a", "parents": [ "0e76d99a7c0eda11515923c5457f0b5a4af9893f" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 12 13:13:12 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "memory_bus: Split register mapping into own function\n\nNow that we have a hook for the memory mapping, we don\u0027t need\nFEATURE_REGISTERMAP anymore and can clean up around it.\n\nChange-Id: If11ece9ce81ddf214b75764007a1006d271dc8af\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72523\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "0e76d99a7c0eda11515923c5457f0b5a4af9893f", "tree": "c914d5266909dad441bece2705593131f032c19c", "parents": [ "9eec40780207a110f3ba7ea70d11c042c6d86abf" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 12 20:22:55 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "memory_bus: Move (un)map_flash_region into par master\n\nNow that the map/unmap_flash functions are only called from memory-\nmapped chip drivers, we can safely move the hooks into the parallel\nmasters.\n\nThis also allows us to move the code away from the globals in\n`flashprog.c` into a new `memory_bus.c`.\n\nChange-Id: Ic476cf4d96200232900537b997e1d07bb4e8b809\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72522\nReviewed-by: Riku Viitanen \u003criku.viitanen@protonmail.com\u003e\n" }, { "commit": "9eec40780207a110f3ba7ea70d11c042c6d86abf", "tree": "f48e0860e967bd720901e9cf12faaa82363bf2c8", "parents": [ "56b53dd4c892c6f400f6b05797eb6ed4b96179db" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 12 01:17:30 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "Perform default mapping only for respective chips\n\nThe default memory mapping for the whole flash chip only makes sense\nfor chips that are directly connected to a bus serving memory cycles,\ni.e. parallel, LPC and FWH chips. Use the new `.prepare_access` and\n`.finish_access` hooks to map/unmap respective chips.\n\nGoing through the chip driver for this allows us to free the core\nflashprog code from this peculiarity.\n\nChange-Id: I54d1554b44b7e21fc18ef066103a9a26a2783b36\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72521\n" }, { "commit": "46449b4d17c549a68d0b8ce287f20e4b46f13333", "tree": "14b936a26e05bd97eb60223dd1f9c1bec94b4899", "parents": [ "ab6b18f0e0d4f4b2b8348306576b701b63372bd2" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Thu Jan 12 23:58:19 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "spi25: Drop stale `bus \u003d\u003d SPI` guards\n\nThese guards were necessary workarounds because we used to call\nthe functions from core flashprog code. Now that the related code\nis contained in the chip driver, we can drop them.\n\nChange-Id: Ib06044a716e2d1c295d902877d0342deb2d78908\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72518\n" }, { "commit": "ab6b18f0e0d4f4b2b8348306576b701b63372bd2", "tree": "f9adeb7ab53e6fed6d940f852979b5da86dd7de1", "parents": [ "901fb957742edef9307948c397bdd28c8b5ebfac" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Jan 11 23:38:20 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "spi25: Move 4BA preparations into spi_prepare_4ba() hook\n\nThese preparations are specific to 4BA SPI chips and don\u0027t have to\nclutter `flashprog.c`.\n\nChange-Id: I842244c57e575f93b9c505e16f1f20c7afd23733\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72517\n" }, { "commit": "901fb957742edef9307948c397bdd28c8b5ebfac", "tree": "c69fc13d64764e08ce22df9a08772cb4eb9cde20", "parents": [ "a96aaa3c716e13c62e1a7d93b5e6580e817cd2f5" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Wed Jan 11 23:24:23 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 09 10:30:24 2024 +0000" }, "message": "Add prepare/finish_access() hooks for chip drivers\n\nSome of the arrangements we perform in prepare_flash_access()\nare actually specific to the flash chip. Allow to clean that\nup by adding respective hooks into `struct flashchip`.\n\nChange-Id: Iff79ba3d190dba04ecf58c5c53faa428bf592bdf\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72516\n" }, { "commit": "1338936efbd5301880063461b74eaf883db6e363", "tree": "ec0fd82dbaafd435bd3784d13378b1c4334f9e93", "parents": [ "8d36db619b5bca0d5a1ddf05c26926b460605e31" ], "author": { "name": "Nico Huber", "email": "nico.huber@secunet.com", "time": "Tue Mar 05 18:35:30 2024 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Mar 08 18:09:43 2024 +0000" }, "message": "Consider 4BA support when filtering erase functions\n\nWhen we decide which erase functions to use, we need to know exactly\nwhich functions are supported by the used programmer. We missed that\nsome programmers can\u0027t send 4-byte adddresses. As we already have a\nfeature flag for this, check it right away for all 4BA erase opcodes.\n\nThis affects mostly rare combinations of external programmers with\nmodern 4BA flash chips. For instance early versions of the Dediprog\nSF100.\n\nTests confirmed that this fixes the combination of a first protocol\ngeneration SF100 with a Winbond W25Q256JV.\n\nChange-Id: I51da2832a6a703058da57cdc0335b214653453ed\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/99\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "5455786bfb4b09af11f4354a6bb4842d37d78419", "tree": "4444295adb9d0e6f9e13e08a16bc5c88a0b14352", "parents": [ "c3b02dce51aad2766512d1939a1b7447c2d526b8" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon May 15 12:01:04 2023 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Fri Dec 08 19:56:50 2023 +0000" }, "message": "spi95: Avoid automatic probing\n\nIt turned out that the read ID command for the ST/M95 family (0x83)\nis a write command for AT45DB chips. We\u0027ll tag respective chips as\nusing a SPI95 command set, like we did for EDI, to avoid automatic\nprobing.\n\nChange-Id: Ibdf364424ac9cd8a734507a05fe769f008f8178e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/75218\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n" }, { "commit": "c3b02dce51aad2766512d1939a1b7447c2d526b8", "tree": "58069f464bb8a777ef06e93767813a4c5a042cb0", "parents": [ "a02df33fbf1c196395a61049e60895d4ae0e0a5b" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Aug 12 01:13:45 2023 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Sep 18 19:24:39 2023 +0000" }, "message": "Rebrand to flashprog and update URLs\n\nMostly automated `sed` work. As of now, URLs to the old wiki are broken\neither way, so changing them shouldn\u0027t hurt. Other URLs (e.g. to mailing\nlist archives) were hopefully filtered correctly.\n\nChange-Id: I9d43bfd0e675eff2fcbad05f304b9ce9f5006b08\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashrom-stable/+/21\n" }, { "commit": "3ac761c3c47a6476b8b0f9ce613b32914b163c46", "tree": "146db2e06439bf76f4c66fd48facb10ec3c0bf79", "parents": [ "b77607f048e5cdfbf8fb1e9ad3b110c9a67e80e0" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Jan 16 02:43:17 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Apr 04 10:12:02 2023 +0000" }, "message": "layout: Verify that regions to be written are granularity aligned\n\nThis will be important with the new erase/write strategy when we don\u0027t\nwrite per erase block anymore.\n\nChange-Id: Ie3c74ff4313c9d72ac92d3226804e0407088c17d\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72546\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "2f75379fa20f5415c70b837001473ff8ba070ab7", "tree": "0f549c33c16f70f1c619926d91ce217e95eccd6a", "parents": [ "b1d4b1d6b8a7876496af6b8af422d1c8058d5f4e" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Mar 28 00:46:50 2023 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Apr 04 09:59:35 2023 +0000" }, "message": "internal: Don\u0027t try linux_mtd on x86\n\nWe assume that the first MTD device found represents the \"internal\"\nfirmware flash. This is true on many architectures, and assumed to\nbe working. On x86, however, there is traditionally no MTD device.\nOne exception is the `spi-intel` driver, but this one is tagged\n\"DANGEROUS\" and often makes trouble if a Linux distribution enabled\nit nevertheless.\n\nSo, let\u0027s disable the internal/MTD automatism on x86. Flashrom has\nbetter drivers, and if somebody runs into a situation where the MTD\ndriver would work but the internal one doesn\u0027t, they can still use\n`linux_mtd` explicitly.\n\nChange-Id: I813980786a09fe64f541906e1963b0abd8b93cb5\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73987\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Matt DeVillier \u003cmatt.devillier@gmail.com\u003e\n" }, { "commit": "b078ec67e6fbfe21bf1b3700c3351bc30c1b4626", "tree": "1a64c7842a131c05b6df1b514d28dd4408d91af1", "parents": [ "272b07327250e88385fd34ba10c7ece342153d06" ], "author": { "name": "Peter Stuge", "email": "peter@stuge.se", "time": "Sun Dec 11 04:02:10 2022 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Mon Mar 06 23:36:26 2023 +0000" }, "message": "serial: Call set_custom_baudrate() thrice\n\nCall the function before tcsetattr() settings are known, then again\nwith settings prepared but not yet applied and finally a third time\nafter tcsetattr().\n\nDarwin support needs this change; there custom_baud code must be\ncalled to modify the settings passed to tcsetattr() and then again\nafter tcsetattr() returns.\n\nThe change should be non-functional on all currently supported systems;\ncurrent code calls set_custom_baudrate() before any tcsetattr()\nsettings are prepared, so we have three stages in total.\n\nThis change originates from discussion of the macOS patch proposed by\nDenis Ahrens in https://review.coreboot.org/c/flashrom/+/67822\n\nChange-Id: I40cc443cfb7bf6b212b31826d437b898cc13c427\nSigned-off-by: Peter Stuge \u003cpeter@stuge.se\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70569\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73479\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "618994707d5ba556704ad9555191379cf46df6ae", "tree": "ad771fb01ca88cbf4ed3e93da0576f4a831a3929", "parents": [ "28790a23f71d942f7ec9aa03c5ec90fb90503d0f" ], "author": { "name": "Steve Markgraf", "email": "steve@steve-m.de", "time": "Mon Jan 09 23:06:52 2023 +0100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:33:03 2023 +0000" }, "message": "programmer: Add bitbanging programmer driver for Linux libgpiod\n\nWith this driver, any single board computer, old smartphone, etc. with\na few spare GPIOs can be used for flashrom.\n\nTested by reading of a 2048 kB flash chip on a Qualcomm MSM8916 SoC\n@800 MHz, ran the following command:\n\ntime flashrom -p linux_gpiod:gpiochip\u003d0,cs\u003d18,sck\u003d19,mosi\u003d13,miso\u003d56 -r test.bin\n\nThis command uses /dev/gpiochip0 with the specified GPIO numbers for the\nSPI lines. All arguments are mandatory.\n\nOutput:\n[...]\nFound GigaDevice flash chip \"GD25LQ16\" (2048 kB, SPI) on linux_gpiod.\n[...]\nreal 1m 33.96s\n\nChange-Id: Icad3eb7764f28feaea51bda3a7893da724c86d06\nSigned-off-by: Steve Markgraf \u003csteve@steve-m.de\u003e\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73290\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "0e78818c2c818aa860a976524cfdf552792cfeba", "tree": "0bd2c0ba9086639ba4c49259bfef7777ce95a82a", "parents": [ "a447c12ecf71954f40a2b07817b3933b7bd3e495" ], "author": { "name": "Anastasia Klimchuk", "email": "aklm@chromium.org", "time": "Wed May 26 09:54:08 2021 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:33:03 2023 +0000" }, "message": "bitbang: Extend bitbang_spi_master functions to accept spi data\n\nThis way every bitbang spi master has access to its own spi data,\nand can use this data in all its functions.\n\nThis patch only changes the signatures of functions.\n\nflashrom-stable: Adapted new function signatures in `nicintel_spi`.\n\nChange-Id: Id5722a43ce20feeed62630ad80e14df7744f9c02\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54991\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73268\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "a447c12ecf71954f40a2b07817b3933b7bd3e495", "tree": "073037c43b3dc9b5f6c0204cc5ea8ef0161b7271", "parents": [ "cbc5ba049f7d6ce4744eae836221b0fb35a9ac69" ], "author": { "name": "Anastasia Klimchuk", "email": "aklm@chromium.org", "time": "Mon May 31 11:20:01 2021 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Mar 04 12:33:03 2023 +0000" }, "message": "bitbang: Extend register_spi_bitbang_master() API with spi data\n\nThis allows the users of register_spi_bitbang_master() API to pass\ntheir spi data into the API, and then the data can go further, into\nregister_spi_master() API.\n\nflashrom-stable: Removed unnecessary if.\n\nChange-Id: I13e83ae74dbc3a3e79c84d1463683d360ff47bc0\nSigned-off-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54990\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73267\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "4d51e07242459f86d00eaf522786695e46ec2511", "tree": "a513666f34cc601d6a9e9bf4f506383dbf69bcb2", "parents": [ "e3c305dfd234503faa23c5491962db8f52d0134c" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 17:56:29 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 28 23:42:48 2023 +0000" }, "message": "amd_imc/sb600spi: Move handle_imc() into amd_imc.c\n\nMove handle_imc() to make it easier to share it with other drivers.\n\nChange-Id: I72dff5feda199e1d258c067e230abdf33c451249\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72575\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "e3c305dfd234503faa23c5491962db8f52d0134c", "tree": "b86a019224a05586e18b98eae8ff0c9b51a1c701", "parents": [ "070587892b4af723bf8f1f423d0b26e12e061084" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 21:45:56 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 28 23:42:48 2023 +0000" }, "message": "amd_spi100: Implement memory-mapped reads\n\nQuery the RomRange2 register for the memory range (usually top below 4G)\nand try to map that. Reads outside this range will still be served via\nthe command engine.\n\nChange-Id: I21aa67d550ccda0f55a9cf3ff14545a881624d11\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72583\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "d81637c3d7c2bf25f1709b6f28a423e074d906f3", "tree": "d1a34eaafa5030d10b787d51c84421cb02fa1943", "parents": [ "735b186eeffb997a957075d7e610b9700b53cbe1" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 19:45:44 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 28 23:42:48 2023 +0000" }, "message": "physmap: Implement source-aligned version of mmio_readn()\n\nImplement readn() with explicit alignment of the source pointer.\n\nChange-Id: Ic754c552c826ec06ea209a039c3035265ca61c9a\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72581\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "735b186eeffb997a957075d7e610b9700b53cbe1", "tree": "1e27f0dc7f2cae492459530df208859221a1d3ca", "parents": [ "197b7c7b03bc2bbfa6a706812fa69897a3eb7cdb" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 18:28:45 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 28 23:42:48 2023 +0000" }, "message": "amd_spi100: Add new driver for AMD SPI100 controllers\n\nStart with a very simple PIO driver. Reads are slow this way, but\nwe can optimize that later. A factor of 2 is possible simply by\naligning the FIFO reads, and another factor of 3 (at least) with\nmemory-mapped reads.\n\nWe override the SPI speed but choose a conservative value to be\non the safe side. Flashrom only supports normal read commands,\nhence we won\u0027t go over 33MHz. Also, if the firmware set a lower\nspeed for normal reads, we use that. We can\u0027t use dual/quad I/O\nwith the SPI command engine, and tests have shown that increasing\nthe SPI speed lifts the read speed only marginally. It seems to\nbe limited by the FIFO reads.\n\nChange-Id: I403d5f103b3ae72f3a91829d562984c54c2e2d00\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72577\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "197b7c7b03bc2bbfa6a706812fa69897a3eb7cdb", "tree": "bf6b57efe06c818f4dbec5d54466930930fa52c0", "parents": [ "dafd51e22b30b7e13e79567c065e55d30c788fa2" ], "author": { "name": "Nicholas Chin", "email": "nic.c3.14@gmail.com", "time": "Sun Oct 23 13:10:31 2022 -0600" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sat Feb 25 00:42:12 2023 +0000" }, "message": "ch347_spi: Add initial support for the WCH CH347\n\nAdd support for the WCH CH347, a high-speed USB to bus converter\nsupporting multiple protocols interfaces including SPI. Currently only\nmode 1 (vendor defined communication interface) is supported, mode 2\n(USB HID communication interface) support will be added later. The code\nis currently hard coded to use CS1 and a SPI clock of 15 MHz, though\nthere are 2 CS lines and 6 other GPIO lines available, as well as a\nconfigurable clock divisor for up to 60MHz operation. Support for these\nwill be exposed through programmer parameters in later commits.\n\nThis currently uses the synchronous libusb API. Performance seems to be\nalright so far, if it becomes an issue I may switch to the asynchronous\nAPI.\n\nTested with a MX25L1606E flash chip\n\nSigned-off-by: Nicholas Chin \u003cnic.c3.14@gmail.com\u003e\nChange-Id: I31b86c41076cc45d4a416a73fa1131350fb745ba\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73106\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "019810f3fd083df5f6f61d19dda2d252709d02fe", "tree": "d9f2f1e6f8e10b6bb1d4b7f56f431f9073942fbc", "parents": [ "6d98aece44f6f3458c79160adf4dddc7f8500378" ], "author": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 17:11:24 2023 +0000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Tue Feb 21 22:52:42 2023 +0000" }, "message": "chipset_enable: Optionally check PCI revision field\n\nWe used to match compatible chipset devices by vendor and device ID\nonly. On some chipsets, e.g. AMD southbridges / SoCs, this is not\nenough, though, as the device IDs are rarely updated.\n\nIn the case of AMD chipsets, we can identify the chipset with the\nrevision ID of the SMBus device. So we add that field to the chipset\nenable list.\n\nChange-Id: I4021cf8e83c605fde4360c274b39481b1e0ff070\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72573\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "e7a41e3cec25165b6564b62b6aa64f90bd2dab71", "tree": "a635e566992d379fa1acca5de7fd7517e5c13580", "parents": [ "b0be3200954bebf2431c4d7bd441096f157f621e" ], "author": { "name": "Nikolai Artemiev", "email": "nartemiev@google.com", "time": "Mon Nov 28 17:40:56 2022 +1100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "tree/: Make probe_opcode() flashctx argument const\n\nProbing an opcode generally shouldn\u0027t involve mutating the flashctx\nstate and currently no probe_opcode functions do that.\n\nMake the flashctx arg const so that call sites don\u0027t need to have a\nnon-const pointer.\n\nTested: ninja test\n\nChange-Id: I19e98be50d682de2d2715417f8b7b8c62b871617\nSigned-off-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/70030\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72543\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "b0be3200954bebf2431c4d7bd441096f157f621e", "tree": "f77f849073a8e0a8d0f6105c55ef06b969d3c982", "parents": [ "3561451faed250ced4a55e15d1abe5e3d94abfc4" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Tue Sep 20 00:07:23 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi.c: Add AT45 erasefn opcode mapping\n\nflashrom-stable: Dropped spurious/wrong function description.\n\nChange-Id: I798a91f1e20b63662715c68e6d43d03fc6005d51\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67717\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72542\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "3561451faed250ced4a55e15d1abe5e3d94abfc4", "tree": "dd5c68bd13dee2adfb609540c64bac463848b941", "parents": [ "e2ff4e90125680a48623a2a908bff38d5b91e44e" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Mon Sep 19 23:46:58 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi25.c: Rename spi_get_erasefn_from_opcode to spi25_get_erasefn_from_opcode\n\nThis function works only with spi25 chips\n\nChange-Id: Ie054160b0fdd34bcb128285c6a047e3a3fa8be0c\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/67716\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72541\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "0cea753aff33b78051febadf8786df83144b5ee7", "tree": "8972ea6cf44e249659ddad7ea3d9aa2dedffc0b6", "parents": [ "ab9f25893f1fa87cbbaf656869e346391eccdb31" ], "author": { "name": "Aarya Chaumal", "email": "aarya.chaumal@gmail.com", "time": "Mon Jul 04 18:21:50 2022 +0530" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi: Add function to probe erase command opcode for all spi_master\n\nAdd a field, probe_opcode, to struct spi_master which points to a\nfunction returning a bool by checking if a given command is supported by\nthe programmer in use. This is used for getting a whitelist of commands\nsupported by the programmer, as some programmers like ichspi don\u0027t\nsupport all opcodes.\n\nMost programmers use the default function, which just returns true.\nICHSPI and dummyflasher use their specialized function.\n\nflashrom-stable: Added `.probe_opcode` for `dirtyjtag_spi`, `ich7`.\n\nChange-Id: I6852ef92788221f471a859c879f8aff42558d36d\nSigned-off-by: Aarya Chaumal \u003caarya.chaumal@gmail.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/65183\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72539\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "ab9f25893f1fa87cbbaf656869e346391eccdb31", "tree": "f21fc6e6e4541cd6905a17bcf3ace937a6e9b5ac", "parents": [ "b725c0cd0e1c3fb56807c197b965620ac37b996b" ], "author": { "name": "Aarya Chaumal", "email": "aarya.chaumal@gmail.com", "time": "Thu Jun 23 16:21:23 2022 +0530" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Feb 19 13:50:18 2023 +0000" }, "message": "spi25.c: Add function to return opcode of passed erase fucntion pointer\n\nThere is a function, spi_get_erasefn_from_opcode, which returns the\nerase function for given opcode. Add a function which does the opposite\ni.e. returns the opcode for given erase function.\n\nChange-Id: Ia3aefc9b9465efdd16b1678bb2ada9a23f00d316\nSigned-off-by: Aarya Chaumal \u003caarya.chaumal@gmail.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/65355\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72538\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n" }, { "commit": "aba3658513da245a61ba59cfab9dba5facdb1054", "tree": "5924d8009154e6b59aa2e10a2f66a263fcf2d358", "parents": [ "00ea3898669aa35bb3f208c1d17f34e3a5c50795" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Mon Sep 05 11:09:28 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "flashrom.c: Move count_max_decode_exceeding() to cli\n\nThe count_max_decode_exceeding() function is only ever called\nwithin the cli_classic logic so move it there and make it\nstatic. This further cleans up the flashrom.c symbol namespace.\n\nChange-Id: If050eab7db8560676c03d5005a2b391313a0d642\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/68438\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72362\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "b8db74a9b2bc91bb43942f7487c151bd598483b1", "tree": "8e2fdcf8c3bb95124ae1870bd7830fab6f415ee1", "parents": [ "f2a1e073434485d54172e95fc88845a2bd917636" ], "author": { "name": "Felix Singer", "email": "felixsinger@posteo.net", "time": "Fri Aug 19 00:19:26 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "internal.c: Retype appropriate variables with bool\n\nUse the bool type instead of an integer for the variables\n`force_laptop`, `not_a_laptop`, `force_boardenable` and\n`force_boardmismatch` since this represents their purpose much better.\n\nSigned-off-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\nChange-Id: I159d789112d7a778744b59b45133df3928b8445e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66870\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72353\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "3b64d8107b56dc437cde606e17abaae435d7ba35", "tree": "3971e382111e87d2dc6d00e38e4198d78ec46eb7", "parents": [ "23b2b864777a09b4d9a9024675670a7d694c1e06" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Fri Aug 12 13:07:51 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "flashrom.c: Move print logic to print.c\n\nThis free\u0027s up flashrom.c from namespace pollution.\n\nChange-Id: I2724f7910fa3e01bcf49b8093260a4f1643df777\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66652\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72351\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "63f6a37984cf361229b433343ea9146c57a87f18", "tree": "0ebdaca6bbf8168b6bbb93da3b3be9dcc0336fe3", "parents": [ "ee3fbd7c7c05efbdea2ded8484bcfe96238f0124" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Fri Aug 12 12:56:43 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "parallel.c: Consoldiate parallel master registration logic\n\nThis is analogous to spi.c and opaque.c however parallel\nlogic was previously never consoldiated.\n\nThis free\u0027s up flashrom.c from namespace pollution.\n\nTested: builds with both make and meson.\n\nChange-Id: Ie08e2e6c51ccef5281386bf7e3df439b91573974\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66651\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72349\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "dd9d0c58d601a003ebc1918c53edc16aab607080", "tree": "2daac025bb07ce348b414cb9c6e7957419ca3102", "parents": [ "4bd966c8099b64ebb665b6f40786bb21d59a9363" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Sat Jun 04 20:23:57 2022 +1000" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "tree: Consolidate BIT() macro\n\nChange-Id: I7e61f7671b70ca5ed751d99405714436bcd18d5a\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/64962\nOriginal-Reviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nOriginal-Reviewed-by: Elyes Haouas \u003cehaouas@noos.fr\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72338\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "2d17041c5e170b42785e99d2aaedb98abb9bf040", "tree": "b60bbb992860f4c8d5bca7ff2c67ebcba2f26647", "parents": [ "f6a273b353355fd3817a00135019fd71e3543683" ], "author": { "name": "Edward O\u0027Callaghan", "email": "quasisec@google.com", "time": "Mon Nov 15 15:47:15 2021 +1100" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "flashrom: Drop read_flash_to_file() usage\n\nAspire towards a goal of making cli_classic more of just\na user of libflashrom than having quasi-parallel paths in\nflashrom.c\n\nThis converts remaining read_flash_to_file() usage to the\ndo_read() provider wrapper around libflashrom.\n\nTested: `\nsudo ./flashrom -p ft2232_spi:type\u003d232H,divisor\u003d1000 -f -r out -c W25X05\nFlashrom output:\n\nNo EEPROM/flash device found.\nForce read (-f -r -c) requested, pretending the chip is there:\nAssuming Winbond flash chip \"W25X05\" (64 kB, SPI) on ft2232_spi.\nPlease note that forced reads most likely contain garbage.\nBlock protection could not be disabled!\nReading flash... done.\nData read:\n\nxxd out-1khz\n00000000: 0000 07ff ffff e000 0000 7fff fffe 0000 ................\n00000010: 0007 ffff ffe0 0000 007f ffff fe00 0000 ................\n00000020: 07ff ffff e000 0000 7fff fffe 0000 0007 ................\n00000030: ffff ffe0 0000 007f ffff fe00 0000 0fff ................\nxxd out-100khz\n00000000: b6db 6db6 db6d b6db 6db6 db6d b6db 6db6 ..m..m..m..m..m.\n00000010: db6d b6db 6db6 db6d b6db 6db6 db6d b6db .m..m..m..m..m..\n00000020: 6db6 db6d b6db 6db6 db24 9249 2492 4924 m..m..m..$.I$.I$\n00000030: 9249 2492 4924 9249 2492 4924 9249 2492 .I$.I$.I$.I$.I$.\n`\n\nChange-Id: I4b690b688acf9d5deb46e8642a252a2132ea8c73\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Tested-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/59291\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72336\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "d2174c5a1b5412ae9080b08050a3049b8bba92ce", "tree": "010e2f29498f8e4ed18aa236e18a27b5a39779ac", "parents": [ "758dc86db46fae9caf83ba3170ba8743d04770fa" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Thu Apr 21 13:29:33 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "platform/swap: move swap inline functions \u0026 macros into an own header\n\nThese inline functions and macros are only used in\nplatform/endian_(big|little).c and do not need to be compiled into every\nobject which includes `platform.h`.\n\nChange-Id: Ib2326e6a4eb5e000a0eace857d040372e2e9e561\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/63825\nOriginal-Reviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72328\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n" }, { "commit": "58015c25eb05fa77966d1c53261a83b56a3cf6b3", "tree": "a1df11881a074c8c66de756f846be9030ce0443a", "parents": [ "e276765eca031c6900d37b22b89e686283f39c91" ], "author": { "name": "Thomas Heijligen", "email": "thomas.heijligen@secunet.com", "time": "Thu Apr 14 13:50:55 2022 +0200" }, "committer": { "name": "Nico Huber", "email": "nico.h@gmx.de", "time": "Sun Jan 29 12:29:02 2023 +0000" }, "message": "Introduce an `include` directory for header files\n\nMove all header files to the new `include` directory.\nAdapt include directives and build systems to the new directory.\n\nChange-Id: Iaddd6bbfa0624b166d422f665877f096983bf4cf\nSigned-off-by: Felix Singer \u003cfelix.singer@secunet.com\u003e\nSigned-off-by: Thomas Heijligen \u003cthomas.heijligen@secunet.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/58622\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72322\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Felix Singer \u003cfelixsinger@posteo.net\u003e\n" } ] }