blob: 39b293f21784ea5fd363a59f3dfd1afdffad397a [file] [log] [blame]
Nico Huber735b1862023-01-29 18:28:45 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <stdint.h>
16#include <stdlib.h>
17#include <string.h>
18
19#include "flash.h"
20#include "hwaccess_physmap.h"
21#include "programmer.h"
22#include "spi.h"
23
24#define SPI100_FIFO_SIZE 71
25
26struct spi100 {
27 uint8_t *spibar;
28 unsigned int altspeed;
29};
30
31static void spi100_write8(const struct spi100 *spi100, unsigned int reg, uint8_t val)
32{
33 mmio_writeb(val, spi100->spibar + reg);
34}
35
36static void spi100_write16(const struct spi100 *spi100, unsigned int reg, uint16_t val)
37{
38 mmio_writew(val, spi100->spibar + reg);
39}
40
41static void spi100_writen(const struct spi100 *spi100, unsigned int reg, const uint8_t *data, size_t len)
42{
43 for (; len > 0; --len, ++reg, ++data)
44 mmio_writeb(*data, spi100->spibar + reg);
45}
46
47static uint8_t spi100_read8(const struct spi100 *spi100, unsigned int reg)
48{
49 return mmio_readb(spi100->spibar + reg);
50}
51
52static uint16_t spi100_read16(const struct spi100 *spi100, unsigned int reg)
53{
54 return mmio_readw(spi100->spibar + reg);
55}
56
57static uint32_t spi100_read32(const struct spi100 *spi100, unsigned int reg)
58{
59 return mmio_readl(spi100->spibar + reg);
60}
61
62static void spi100_readn(const struct spi100 *spi100, unsigned int reg, uint8_t *data, size_t len)
63{
Nico Huber07058782023-01-29 19:56:39 +000064 mmio_readn_aligned(spi100->spibar + reg, data, len, 4);
Nico Huber735b1862023-01-29 18:28:45 +000065}
66
67static int spi100_check_readwritecnt(const unsigned int writecnt, const unsigned int readcnt)
68{
69 if (writecnt < 1) {
70 msg_perr("ERROR: SPI controller needs to send at least 1 byte.\n");
71 return SPI_INVALID_LENGTH;
72 }
73
74 if (writecnt - 1 > SPI100_FIFO_SIZE) {
75 msg_perr("ERROR: SPI controller can not send %u bytes, it is limited to %u bytes.\n",
76 writecnt, SPI100_FIFO_SIZE + 1);
77 return SPI_INVALID_LENGTH;
78 }
79
80 const unsigned int maxreadcnt = SPI100_FIFO_SIZE - (writecnt - 1);
81 if (readcnt > maxreadcnt) {
82 msg_perr("ERROR: SPI controller can not receive %u bytes for this command,\n"
83 "it is limited to %u bytes write+read count.\n",
84 readcnt, SPI100_FIFO_SIZE + 1);
85 return SPI_INVALID_LENGTH;
86 }
87 return 0;
88}
89
90static int spi100_send_command(const struct flashctx *const flash,
91 const unsigned int writecnt, const unsigned int readcnt,
92 const unsigned char *const writearr, unsigned char *const readarr)
93{
94 const struct spi100 *const spi100 = flash->mst->spi.data;
95
96 int ret = spi100_check_readwritecnt(writecnt, readcnt);
97 if (ret)
98 return ret;
99
100 spi100_write8(spi100, 0x45, writearr[0]); /* First "command" byte is sent separately. */
101 spi100_write8(spi100, 0x48, writecnt - 1);
102 spi100_write8(spi100, 0x4b, readcnt);
103 if (writecnt > 1)
104 spi100_writen(spi100, 0x80, &writearr[1], writecnt - 1);
105
106 /* Trigger command */
107 spi100_write8(spi100, 0x47, BIT(7));
108
109 /* Wait for completion */
110 int timeout_us = 10*1000*1000;
111 uint32_t spistatus;
112 while (((spistatus = spi100_read32(spi100, 0x4c)) & BIT(31)) && timeout_us--)
113 programmer_delay(1);
114 if (spistatus & BIT(31)) {
115 msg_perr("ERROR: SPI transfer timed out (0x%08x)!\n", spistatus);
116 return SPI_PROGRAMMER_ERROR;
117 }
118 msg_pspew("%s: spistatus: 0x%08x\n", __func__, spistatus);
119
120 if (readcnt)
121 spi100_readn(spi100, 0x80 + writecnt - 1, readarr, readcnt);
122
123 return 0;
124}
125
126static int spi100_shutdown(void *data)
127{
128 struct spi100 *const spi100 = data;
129
130 const uint16_t speed_cfg = spi100_read16(spi100, 0x22);
131 spi100_write16(spi100, 0x22, (speed_cfg & ~0xf0) | spi100->altspeed << 4);
132
133 free(spi100);
134 return 0;
135}
136
137static struct spi_master spi100_master = {
138 .max_data_read = SPI100_FIFO_SIZE - 4, /* Account for up to 4 address bytes. */
139 .max_data_write = SPI100_FIFO_SIZE - 4,
140 .command = spi100_send_command,
141 .multicommand = default_spi_send_multicommand,
142 .read = default_spi_read,
143 .write_256 = default_spi_write_256,
144 .probe_opcode = default_spi_probe_opcode,
145 .shutdown = spi100_shutdown,
146};
147
148const char *const spimodes[] = {
149 "Normal read (up to 33MHz)",
150 "Reserved",
151 "Dual IO (1-1-2)",
152 "Quad IO (1-1-4)",
153 "Dual IO (1-2-2)",
154 "Quad IO (1-1-4)",
155 "Normal read (up to 66MHz)",
156 "Fast Read",
157};
158
159const struct {
160 unsigned int khz;
161 const char *speed;
162} spispeeds[] = {
163 { 66666, "66.66 MHz" },
164 { 33333, "33.33 MHz" },
165 { 22222, "22.22 MHz" },
166 { 16666, "16.66 MHz" },
167 { 100000, "100 MHz" },
168 { 800, "800 kHz" },
169 { 0, "Reserved" },
170 { 0, "Reserved" },
171};
172
173static void spi100_print(const struct spi100 *const spi100)
174{
175 const uint32_t spi_cntrl0 = spi100_read32(spi100, 0x00);
176 msg_pdbg("(0x%08" PRIx32 ") ", spi_cntrl0);
177 msg_pdbg("SpiArbEnable=%u, ", spi_cntrl0 >> 19 & 1);
178 msg_pdbg("IllegalAccess=%u, ", spi_cntrl0 >> 21 & 1);
179 msg_pdbg("SpiAccessMacRomEn=%u, ", spi_cntrl0 >> 22 & 1);
180 msg_pdbg("SpiHostAccessRomEn=%u,\n", spi_cntrl0 >> 23 & 1);
181 msg_pdbg(" ");
182 msg_pdbg("ArbWaitCount=%u, ", spi_cntrl0 >> 24 & 7);
183 msg_pdbg("SpiBridgeDisable=%u, ", spi_cntrl0 >> 27 & 1);
184 msg_pdbg("SpiClkGate=%u,\n", spi_cntrl0 >> 28 & 1);
185 msg_pdbg(" ");
186 msg_pdbg("SpiReadMode=%s, ", spimodes[(spi_cntrl0 >> 28 & 6) | (spi_cntrl0 >> 18 & 1)]);
187 msg_pdbg("SpiBusy=%u\n", spi_cntrl0 >> 31 & 1);
188
189 const uint8_t alt_spi_cs = spi100_read8(spi100, 0x1d);
190 msg_pdbg("Using SPI_CS%u\n", alt_spi_cs & 0x3);
191
192 const uint16_t speed_cfg = spi100_read16(spi100, 0x22);
193 msg_pdbg("NormSpeed: %s\n", spispeeds[speed_cfg >> 12 & 0xf].speed);
194 msg_pdbg("FastSpeed: %s\n", spispeeds[speed_cfg >> 8 & 0xf].speed);
195 msg_pdbg("AltSpeed: %s\n", spispeeds[speed_cfg >> 4 & 0xf].speed);
196 msg_pdbg("TpmSpeed: %s\n", spispeeds[speed_cfg >> 0 & 0xf].speed);
197}
198
199static void spi100_set_altspeed(struct spi100 *const spi100)
200{
201 const uint16_t speed_cfg = spi100_read16(spi100, 0x22);
202 const unsigned int normspeed = speed_cfg >> 12 & 0xf;
203 spi100->altspeed = speed_cfg >> 4 & 0xf;
204
205 /* Set SPI speed to 33MHz but not higher than `normal read` speed */
206 unsigned int altspeed;
207 if (spispeeds[normspeed].khz != 0 && spispeeds[normspeed].khz < 33333)
208 altspeed = normspeed;
209 else
210 altspeed = 1;
211
212 if (altspeed != spi100->altspeed) {
213 msg_pinfo("Setting SPI speed to %s.\n", spispeeds[altspeed].speed);
214 spi100_write16(spi100, 0x22, (speed_cfg & ~0xf0) | altspeed << 4);
215 }
216}
217
218int amd_spi100_probe(void *const spibar)
219{
220 struct spi100 *const spi100 = malloc(sizeof(*spi100));
221 if (!spi100) {
222 msg_perr("Out of memory!\n");
223 return ERROR_FATAL;
224 }
225 spi100->spibar = spibar;
226
227 spi100_print(spi100);
228
229 spi100_set_altspeed(spi100);
230
231 return register_spi_master(&spi100_master, spi100);
232}