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Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef __FLASHCHIPS_H__
25#define __FLASHCHIPS_H__ 1
26
27/*
28 * Please keep this list sorted alphabetically by manufacturer. The first
29 * entry of each section should be the manufacturer ID, followed by the
30 * list of devices from that manufacturer (sorted by device IDs).
31 *
32 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
33 * continuation code.
34 * SPI parts have 16-bit device IDs if they support RDID.
35 */
36
Carl-Daniel Hailfinger01d49ed2009-11-20 01:12:45 +000037#define GENERIC_MANUF_ID 0xffff /* Check if there is a vendor ID */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000038#define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
39
40#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
41
42#define AMD_ID 0x01 /* AMD */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +000043#define AM_29DL400BT 0x0C
44#define AM_29DL400BB 0x0F
45#define AM_29DL800BT 0x4A
46#define AM_29DL800BB 0xCB
47#define AM_29F002BB 0x34 /* Same as Am29F002NBB */
48#define AM_29F002BT 0xB0 /* Same as Am29F002NBT */
49#define AM_29F004BB 0x7B
50#define AM_29F004BT 0x77
51#define AM_29F016D 0xAD
Uwe Hermanna8b37272009-06-19 15:54:39 +000052#define AM_29F010B 0x20 /* Same as Am29F010A */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000053#define AM_29F040B 0xA4
54#define AM_29F080B 0xD5
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +000055#define AM_29F200BB 0x57
56#define AM_29F200BT 0x51
57#define AM_29F400BB 0xAB
58#define AM_29F400BT 0x23
59#define AM_29F800BB 0x58
60#define AM_29F800BT 0xD6
61#define AM_29LV002BB 0xC2
62#define AM_29LV002BT 0x40
63#define AM_29LV004BB 0xB6
64#define AM_29LV004BT 0xB5
65#define AM_29LV008BB 0x37
66#define AM_29LV008BT 0x3E
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000067#define AM_29LV040B 0x4F
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +000068#define AM_29LV080B 0x38 /* Same as Am29LV081B */
69#define AM_29LV200BB 0xBF
70#define AM_29LV200BT 0x3B
71#define AM_29LV800BB 0x5B /* Same as Am29LV800DB */
72#define AM_29LV400BT 0xB9
73#define AM_29LV400BB 0xBA
74#define AM_29LV800BT 0xDA /* Same as Am29LV800DT */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000075
76#define AMIC_ID 0x7F37 /* AMIC */
77#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
78#define AMIC_A25L40P 0x2013
79#define AMIC_A29002B 0x0d
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +000080#define AMIC_A29002T 0x8C /* Same as A290021T */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000081#define AMIC_A29040B 0x86
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +000082#define AMIC_A29400T 0xB0 /* Same as 294001T */
83#define AMIC_A29400U 0x31 /* Same as A294001U */
84#define AMIC_A29800T 0x0E
85#define AMIC_A29800U 0x8F
86#define AMIC_A29L004T 0x34 /* Same as A29L400T */
87#define AMIC_A29L004U 0xB5 /* Same as A29L400U */
88#define AMIC_A29L008T 0x1A /* Same as A29L800T */
89#define AMIC_A29L008U 0x9B /* Same as A29L800U */
90#define AMIC_A29L040 0x92
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000091#define AMIC_A49LF040A 0x9d
92
93/* This chip vendor/device ID is probably a misinterpreted LHA header. */
94#define ASD_ID 0x25 /* ASD, not listed in JEP106W */
95#define ASD_AE49F2008 0x52
96
97#define ATMEL_ID 0x1F /* Atmel */
98#define AT_25DF021 0x4300
99#define AT_25DF041A 0x4401
100#define AT_25DF081 0x4502
101#define AT_25DF161 0x4602
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000102#define AT_25DF321 0x4700 /* Same as 26DF321 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000103#define AT_25DF321A 0x4701
104#define AT_25DF641 0x4800
105#define AT_25F512A 0x65 /* Needs special RDID. AT25F512A_RDID 15 1d */
106#define AT_25F512B 0x6500
107#define AT_25FS010 0x6601
108#define AT_25FS040 0x6604
109#define AT_26DF041 0x4400
110#define AT_26DF081 0x4500 /* guessed, no datasheet available */
111#define AT_26DF081A 0x4501
112#define AT_26DF161 0x4600
113#define AT_26DF161A 0x4601
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000114#define AT_26DF321 0x4700 /* Same as 25DF321 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000115#define AT_26F004 0x0400
116#define AT_29C040A 0xA4
117#define AT_29C010A 0xD5
118#define AT_29C020 0xDA
119#define AT_29C512 0x5D
120#define AT_45BR3214B /* No ID available */
121#define AT_45CS1282 0x2920
122#define AT_45D011 /* No ID available */
123#define AT_45D021A /* No ID available */
124#define AT_45D041A /* No ID available */
125#define AT_45D081A /* No ID available */
126#define AT_45D161 /* No ID available */
127#define AT_45DB011 /* No ID available */
128#define AT_45DB011B /* No ID available */
129#define AT_45DB011D 0x2200
130#define AT_45DB021A /* No ID available */
131#define AT_45DB021B /* No ID available */
132#define AT_45DB021D 0x2300
133#define AT_45DB041A /* No ID available */
134#define AT_45DB041D 0x2400
135#define AT_45DB081A /* No ID available */
136#define AT_45DB081D 0x2500
137#define AT_45DB161 /* No ID available */
138#define AT_45DB161B /* No ID available */
139#define AT_45DB161D 0x2600
140#define AT_45DB321 /* No ID available */
141#define AT_45DB321B /* No ID available */
142#define AT_45DB321C 0x2700
143#define AT_45DB321D 0x2701 /* Buggy data sheet */
144#define AT_45DB642 /* No ID available */
145#define AT_45DB642D 0x2800
146#define AT_49BV512 0x03
147#define AT_49F002N 0x07 /* for AT49F002(N) */
148#define AT_49F002NT 0x08 /* for AT49F002(N)T */
149
150#define CATALYST_ID 0x31 /* Catalyst */
151
152#define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage */
153#define EMST_F49B002UA 0x00
154
155/*
156 * EN25 chips are SPI, first byte of device ID is memory type,
157 * second byte of device ID is log(bitsize)-9.
158 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
159 * is the continuation code for IDs in bank 2.
160 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
161 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
162 * Let's hope they are not manufacturing SPI flash chips as well.
163 */
164#define EON_ID 0x7F1C /* EON Silicon Devices */
165#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000166#define EN_25B05 0x2010 /* Same as P05, 2^19 kbit or 2^16 kByte */
Sean Nelson54596372010-01-09 05:30:14 +0000167#define EN_25B05T 0x25
168#define EN_25B05B 0x95
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000169#define EN_25B10 0x2011 /* Same as P10 */
Sean Nelson54596372010-01-09 05:30:14 +0000170#define EN_25B10T 0x40
171#define EN_25B10B 0x30
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000172#define EN_25B20 0x2012 /* Same as P20 */
Sean Nelson54596372010-01-09 05:30:14 +0000173#define EN_25B20T 0x41
174#define EN_25B20B 0x31
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000175#define EN_25B40 0x2013 /* Same as P40 */
Sean Nelson54596372010-01-09 05:30:14 +0000176#define EN_25B40T 0x42
177#define EN_25B40B 0x32
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000178#define EN_25B80 0x2014 /* Same as P80 */
Sean Nelson54596372010-01-09 05:30:14 +0000179#define EN_25B80T 0x43
180#define EN_25B80B 0x33
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000181#define EN_25B16 0x2015 /* Same as P16 */
Sean Nelson54596372010-01-09 05:30:14 +0000182#define EN_25B16T 0x44
183#define EN_25B16B 0x34
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000184#define EN_25B32 0x2016 /* Same as P32 */
Sean Nelson54596372010-01-09 05:30:14 +0000185#define EN_25B32T 0x45
186#define EN_25B32B 0x35
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000187#define EN_25B64 0x2017 /* Same as P64 */
Sean Nelson54596372010-01-09 05:30:14 +0000188#define EN_25B64T 0x46
189#define EN_25B64B 0x36
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000190#define EN_25D16 0x3015
191#define EN_25F05 0x3110
192#define EN_25F10 0x3111
193#define EN_25F20 0x3112
194#define EN_25F40 0x3113
195#define EN_25F80 0x3114
196#define EN_25F16 0x3115
197#define EN_25F32 0x3116
198#define EN_29F512 0x7F21
Russ Dill3cd5a122010-03-05 08:44:11 +0000199#define EN_29F010 0x20
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000200#define EN_29F040A 0x7F04
201#define EN_29LV010 0x7F6E
202#define EN_29LV040A 0x7F4F /* EN_29LV040(A) */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000203#define EN_29F002T 0x7F92 /* Same as EN29F002A */
204#define EN_29F002B 0x7F97 /* Same as EN29F002AN */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000205
206#define FUJITSU_ID 0x04 /* Fujitsu */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000207#define MBM29DL400BC 0x0F
208#define MBM29DL400TC 0x0C
209#define MBM29DL800BA 0xCB
210#define MBM29DL800TA 0x4A
211#define MBM29F002BC 0x34
212#define MBM29F002TC 0xB0
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000213#define MBM29F004BC 0x7B
214#define MBM29F004TC 0x77
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000215#define MBM29F040C 0xA4
216#define MBM29F080A 0xD5
217#define MBM29F200BC 0x57
218#define MBM29F200TC 0x51
219#define MBM29F400BC 0xAB
220#define MBM29F400TC 0x23
221#define MBM29F800BA 0x58
222#define MBM29F800TA 0xD6
223#define MBM29LV002BC 0xC2
224#define MBM29LV002TC 0x40
225#define MBM29LV004BC 0xB6
226#define MBM29LV004TC 0xB5
227#define MBM29LV008BA 0x37
228#define MBM29LV008TA 0x3E
229#define MBM29LV080A 0x38
230#define MBM29LV200BC 0xBF
231#define MBM29LV200TC 0x3B
232#define MBM29LV400BC 0xBA
233#define MBM29LV400TC 0xB9
234#define MBM29LV800BA 0x5B /* Same as MBM29LV800BE */
235#define MBM29LV800TA 0xDA /* Same as MBM29LV800TE */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000236
237#define HYUNDAI_ID 0xAD /* Hyundai */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000238#define HY_29F400T 0x23 /* Same as HY_29F400AT */
239#define HY_29F800B 0x58 /* Same as HY_29F800AB */
240#define HY_29LV800B 0x5B
241#define HY_29F040A 0xA4
242#define HY_29F400B 0xAB /* Same as HY_29F400AB */
243#define HY_29F002 0xB0
244#define HY_29LV400T 0xB9
245#define HY_29LV400B 0xBA
246#define HY_29F080 0xD5
247#define HY_29F800T 0xD6 /* Same as HY_29F800AT */
248#define HY_29LV800T 0xDA
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000249
250#define IMT_ID 0x7F1F /* Integrated Memory Technologies */
251#define IM_29F004B 0xAE
252#define IM_29F004T 0xAF
253
254#define INTEL_ID 0x89 /* Intel */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000255#define I_82802AB 0xAD
256#define I_82802AC 0xAC
Sean Nelsonf5ae4d42010-02-13 18:41:53 +0000257#define E_28F004S5 0xA7
258#define E_28F008S5 0xA6
259#define E_28F016S5 0xAA
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000260#define P28F001BXT 0x94 /* 28F001BX-T */
261#define P28F001BXB 0x95 /* 28F001BX-B */
Michael Karcherad0010a2010-04-03 10:27:08 +0000262#define P28F004BT 0x78 /* 28F004BV/BE-T */
263#define P28F004BB 0x79 /* 28F004BV/BE-B */
264#define P28F400BT 0x70 /* 28F400BV/CV/CE-T */
265#define P28F400BB 0x71 /* 28F400BV/CV/CE-B */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000266#define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */
267#define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000268
269#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
270
271/*
272 * MX25 chips are SPI, first byte of device ID is memory type,
273 * second byte of device ID is log(bitsize)-9.
274 * Generalplus SPI chips seem to be compatible with Macronix
275 * and use the same set of IDs.
276 */
277#define MX_ID 0xC2 /* Macronix (MX) */
Carl-Daniel Hailfinger40107122009-10-01 13:15:01 +0000278#define MX_25L512 0x2010 /* Same as MX25V512 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000279#define MX_25L1005 0x2011
280#define MX_25L2005 0x2012
281#define MX_25L4005 0x2013 /* MX25L4005{,A} */
Carl-Daniel Hailfinger40107122009-10-01 13:15:01 +0000282#define MX_25L8005 0x2014 /* Same as MX25V8005 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000283#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
284#define MX_25L3205 0x2016 /* MX25L3205{,A} */
285#define MX_25L6405 0x2017 /* MX25L3205{,D} */
286#define MX_25L12805 0x2018 /* MX25L12805 */
287#define MX_25L1635D 0x2415
288#define MX_25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */
Mark Panajotovic502a9132009-08-24 01:42:24 +0000289#define MX_29F001B 0x19
290#define MX_29F001T 0x18
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000291#define MX_29F002B 0x34 /* Same as MX29F002NB */
292#define MX_29F002T 0xB0 /* Same as MX29F002NT */
293#define MX_29F004B 0x46
294#define MX_29F004T 0x45
295#define MX_29F022T 0x36 /* Same as MX29F022NT */
296#define MX_29F040 0xA4 /* Same as MX29F040C */
297#define MX_29F080 0xD5
298#define MX_29F200B 0x57 /* Same as MX29F200CB */
299#define MX_29F200T 0x51 /* Same as MX29F200CT */
300#define MX_29F400B 0xAB /* Same as MX29F400CB */
301#define MX_29F400T 0x23 /* Same as MX29F400CT */
302#define MX_29F800B 0x58
303#define MX_29F800T 0xD6
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000304#define MX_29LV002CB 0x5A
305#define MX_29LV002CT 0x59
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000306#define MX_29LV004B 0xB6 /* Same as MX29LV004CB */
307#define MX_29LV004T 0xB5 /* Same as MX29LV004CT */
308#define MX_29LV008B 0x37 /* Same as MX29LV008CB */
309#define MX_29LV008T 0x3E /* Same as MX29LV008CT */
310#define MX_29LV040 0x4F /* Same as MX29LV040C */
311#define MX_29LV081 0x38
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000312#define MX_29LV128DB 0x7A
313#define MX_29LV128DT 0x7E
314#define MX_29LV160DB 0x49 /* Same as MX29LV161DB/MX29LV160CB */
315#define MX_29LV160DT 0xC4 /* Same as MX29LV161DT/MX29LV160CT */
316#define MX_29LV320DB 0xA8 /* Same as MX29LV321DB */
317#define MX_29LV320DT 0xA7 /* Same as MX29LV321DT */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000318#define MX_29LV400B 0xBA /* Same as MX29LV400CB */
319#define MX_29LV400T 0xB9 /* Same as MX29LV400CT */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000320#define MX_29LV640DB 0xCB /* Same as MX29LV640EB */
321#define MX_29LV640DT 0xC9 /* Same as MX29LV640ET */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000322#define MX_29LV800B 0x5B /* Same as MX29LV800CB */
323#define MX_29LV800T 0xDA /* Same as MX29LV800CT */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000324#define MX_29SL402CB 0xF1
325#define MX_29SL402CT 0x70
326#define MX_29SL800CB 0x6B /* Same as MX29SL802CB */
327#define MX_29SL800CT 0xEA /* Same as MX29SL802CT */
328
329/*
330 * Programmable Micro Corp is listed in JEP106W in bank 2, so it should
331 * have a 0x7F continuation code prefix.
332 */
333#define PMC_ID 0x7F9D /* PMC */
334#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
335#define PMC_25LV512 0x7B
336#define PMC_25LV010 0x7C
337#define PMC_25LV020 0x7D
338#define PMC_25LV040 0x7E
339#define PMC_25LV080B 0x13
340#define PMC_25LV016B 0x14
341#define PMC_29F002T 0x1D
342#define PMC_29F002B 0x2D
343#define PMC_39LV512 0x1B
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000344#define PMC_39F010 0x1C /* Same as Pm39LV010 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000345#define PMC_39LV020 0x3D
346#define PMC_39LV040 0x3E
347#define PMC_39F020 0x4D
348#define PMC_39F040 0x4E
349#define PMC_49FL002 0x6D
350#define PMC_49FL004 0x6E
351
Sean Nelson118e1d62009-11-24 02:08:11 +0000352/*
353 * The Sanyo chip found so far uses SPI, first byte is manufacture code,
354 * second byte is the device code,
355 * third byte is a dummy byte.
356 */
357#define SANYO_ID 0x62
358#define SANYO_LE25FW203A 0x1600
359
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000360#define SHARP_ID 0xB0 /* Sharp */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000361#define SHARP_LH28F008BJxxPT 0xEC
362#define SHARP_LH28F008BJxxPB 0xED
363#define SHARP_LH28F800BVxxBTL 0x4B
364#define SHARP_LH28F800BVxxBV 0x4D
365#define SHARP_LH28F800BVxxTV 0x4C
366#define SHARP_LHF00L02 0xC9 /* Same as LHF00L06/LHF00L07 */
367#define SHARP_LHF00L04 0xCF /* Same as LHF00L03/LHF00L05 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000368
369/*
370 * Spansion was previously a joint venture of AMD and Fujitsu.
371 * S25 chips are SPI. The first device ID byte is memory type and
372 * the second device ID byte is memory capacity.
373 */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000374#define SPANSION_ID 0x01 /* Spansion, same ID as AMD */
Michael Karcher23ff4602010-01-12 23:29:30 +0000375#define SPANSION_S25FL008A 0x0213
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000376#define SPANSION_S25FL016A 0x0214
377
378/*
379 * SST25 chips are SPI, first byte of device ID is memory type, second
380 * byte of device ID is related to log(bitsize) at least for some chips.
381 */
382#define SST_ID 0xBF /* SST */
383#define SST_25WF512 0x2501
384#define SST_25WF010 0x2502
385#define SST_25WF020 0x2503
386#define SST_25WF040 0x2504
387#define SST_25VF512A_REMS 0x48 /* REMS or RES opcode */
388#define SST_25VF010_REMS 0x49 /* REMS or RES opcode */
389#define SST_25VF020_REMS 0x43 /* REMS or RES opcode */
390#define SST_25VF040_REMS 0x44 /* REMS or RES opcode */
391#define SST_25VF040B 0x258D
392#define SST_25VF040B_REMS 0x8D /* REMS or RES opcode */
393#define SST_25VF080_REMS 0x80 /* REMS or RES opcode */
394#define SST_25VF080B 0x258E
395#define SST_25VF080B_REMS 0x8E /* REMS or RES opcode */
396#define SST_25VF016B 0x2541
397#define SST_25VF032B 0x254A
398#define SST_25VF032B_REMS 0x4A /* REMS or RES opcode */
399#define SST_26VF016 0x2601
400#define SST_26VF032 0x2602
401#define SST_27SF512 0xA4
402#define SST_27SF010 0xA5
403#define SST_27SF020 0xA6
404#define SST_27VF010 0xA9
405#define SST_27VF020 0xAA
406#define SST_28SF040 0x04
407#define SST_29EE512 0x5D
408#define SST_29EE010 0x07
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000409#define SST_29LE010 0x08 /* Same as SST29VE010 */
410#define SST_29EE020A 0x10 /* Same as SST29EE020 */
411#define SST_29LE020 0x12 /* Same as SST29VE020 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000412#define SST_29SF020 0x24
413#define SST_29VF020 0x25
414#define SST_29SF040 0x13
415#define SST_29VF040 0x14
Uwe Hermann48da3f92010-01-23 15:15:19 +0000416#define SST_39SF512 0xB4
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000417#define SST_39SF010 0xB5
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000418#define SST_39SF020 0xB6 /* Same as 39SF020A */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000419#define SST_39SF040 0xB7
420#define SST_39VF512 0xD4
421#define SST_39VF010 0xD5
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000422#define SST_39VF020 0xD6 /* Same as 39LF020 */
423#define SST_39VF040 0xD7 /* Same as 39LF040 */
424#define SST_39VF080 0xD8 /* Same as 39LF080/39VF080/39VF088 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000425#define SST_49LF040B 0x50
426#define SST_49LF040 0x51
427#define SST_49LF020 0x61
428#define SST_49LF020A 0x52
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000429#define SST_49LF030A 0x1C
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000430#define SST_49LF080A 0x5B
431#define SST_49LF002A 0x57
432#define SST_49LF003A 0x1B
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000433#define SST_49LF004A 0x60 /* Same as 49LF004B */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000434#define SST_49LF008A 0x5A
435#define SST_49LF004C 0x54
436#define SST_49LF008C 0x59
437#define SST_49LF016C 0x5C
438#define SST_49LF160C 0x4C
439
440/*
441 * ST25P chips are SPI, first byte of device ID is memory type, second
442 * byte of device ID is related to log(bitsize) at least for some chips.
443 */
444#define ST_ID 0x20 /* ST / SGS/Thomson */
445#define ST_M25P05A 0x2010
Carl-Daniel Hailfinger32961be2009-07-23 01:40:20 +0000446#define ST_M25P05_RES 0x10 /* Same code as M25P10. */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000447#define ST_M25P10A 0x2011
Carl-Daniel Hailfinger32961be2009-07-23 01:40:20 +0000448#define ST_M25P10_RES 0x10 /* Same code as M25P05. */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000449#define ST_M25P20 0x2012
450#define ST_M25P40 0x2013
451#define ST_M25P40_RES 0x12
452#define ST_M25P80 0x2014
453#define ST_M25P16 0x2015
454#define ST_M25P32 0x2016
455#define ST_M25P64 0x2017
456#define ST_M25P128 0x2018
457#define ST_M25PE10 0x8011
458#define ST_M25PE20 0x8012
459#define ST_M25PE40 0x8013
460#define ST_M25PE80 0x8014
461#define ST_M25PE16 0x8015
462#define ST_M50FLW040A 0x08
463#define ST_M50FLW040B 0x28
464#define ST_M50FLW080A 0x80
465#define ST_M50FLW080B 0x81
466#define ST_M50FW002 0x29
467#define ST_M50FW040 0x2C
468#define ST_M50FW080 0x2D
469#define ST_M50FW016 0x2E
470#define ST_M50LPW116 0x30
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000471#define ST_M29F002B 0x34 /* Same as M29F002BB */
472#define ST_M29F002T 0xB0 /* Same as M29F002BT/M29F002NT/M29F002BNT */
473#define ST_M29F040B 0xE2 /* Same as M29F040 */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000474#define ST_M29F080 0xF1
475#define ST_M29F200BT 0xD3
476#define ST_M29F200BB 0xD4
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000477#define ST_M29F400BT 0xD5 /* Same as M29F400T */
478#define ST_M29F400BB 0xD6 /* Same as M29F400B */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000479#define ST_M29F800DB 0x58
480#define ST_M29F800DT 0xEC
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000481#define ST_M29W010B 0x23
482#define ST_M29W040B 0xE3
Jeffrey A. Kentba7c9222010-02-01 05:49:46 +0000483#define ST_M29W512B 0x27
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000484
485#define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
486#define S29C51001T 0x01
487#define S29C51002T 0x02
488#define S29C51004T 0x03
489#define S29C31004T 0x63
490
491#define TI_ID 0x97 /* Texas Instruments */
492#define TI_OLD_ID 0x01 /* TI chips from last century */
493#define TI_TMS29F002RT 0xB0
494#define TI_TMS29F002RB 0x34
495
496/*
497 * W25X chips are SPI, first byte of device ID is memory type, second
498 * byte of device ID is related to log(bitsize).
499 */
500#define WINBOND_ID 0xDA /* Winbond */
501#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flashes */
502#define W_25X10 0x3011
503#define W_25X20 0x3012
504#define W_25X40 0x3013
505#define W_25X80 0x3014
506#define W_25X16 0x3015
507#define W_25X32 0x3016
508#define W_25X64 0x3017
509#define W_29C011 0xC1
Carl-Daniel Hailfinger37181be2009-08-24 01:34:48 +0000510#define W_29C020C 0x45 /* Same as W29C020 and ASD AE29F2008 */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000511#define W_29C040P 0x46 /* Same as W29C040 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000512#define W_29EE011 0xC1
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000513#define W_39L020 0xB5
514#define W_39L040 0xB6
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000515#define W_39V040FA 0x34
516#define W_39V040A 0x3D
517#define W_39V040B 0x54
518#define W_39V040C 0x50
519#define W_39V080A 0xD0
520#define W_39V080FA 0xD3
521#define W_39V080FA_DM 0x93
522#define W_49F002U 0x0B
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000523#define W_49F020 0x8C
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000524#define W_49V002A 0xB0
525#define W_49V002FA 0x32
526
527#endif /* !FLASHCHIPS_H */