blob: b7a7b218eebdba39c1cb15b6e25142cf0922f9e3 [file] [log] [blame]
Konstantin Grudnev3d8868c2019-07-23 00:48:54 +03001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2019 Konstantin Grudnev
5 * Copyright (C) 2019 Nikolay Nikolaev
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License,
10 * or any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17/*
18 * Contains SPI chip driver functions related to ST95XXX series (SPI EEPROM)
19 */
20#include <string.h>
21#include <stdlib.h>
Nico Huberfbc41d22026-02-22 23:04:01 +010022
23#include "flash.h"
Konstantin Grudnev3d8868c2019-07-23 00:48:54 +030024#include "flashchips.h"
Nico Huberfbc41d22026-02-22 23:04:01 +010025#include "chipdrivers/spi.h"
Nico Huberd5185632024-01-05 18:44:41 +010026#include "spi_command.h"
Konstantin Grudnev3d8868c2019-07-23 00:48:54 +030027#include "spi.h"
28
29/* For ST95XXX chips which have RDID */
30int probe_spi_st95(struct flashctx *flash)
31{
32 /*
33 * ST_M95_RDID_OUTSIZE depends on size of the flash and
34 * not all ST_M95XXX have RDID.
35 */
36 static const unsigned char cmd[ST_M95_RDID_OUTSIZE_MAX] = { ST_M95_RDID };
37 unsigned char readarr[ST_M95_RDID_INSIZE];
38 uint32_t id1, id2;
Patrick Georgib57f48f2020-05-02 16:07:11 +020039 int ret;
Konstantin Grudnev3d8868c2019-07-23 00:48:54 +030040
41 uint32_t rdid_outsize = ST_M95_RDID_2BA_OUTSIZE; // 16 bit address
42 if (flash->chip->total_size * KiB > 64 * KiB)
43 rdid_outsize = ST_M95_RDID_3BA_OUTSIZE; // 24 bit address
44
Patrick Georgib57f48f2020-05-02 16:07:11 +020045 ret = spi_send_command(flash, rdid_outsize, sizeof(readarr), cmd, readarr);
46 if (ret)
Nico Huber6be06552023-02-12 00:18:09 +010047 return 0;
Konstantin Grudnev3d8868c2019-07-23 00:48:54 +030048
49 id1 = readarr[0]; // manufacture id
50 id2 = (readarr[1] << 8) | readarr[2]; // SPI family code + model id
51
52 msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
53
Nico Huber11136c22023-05-01 12:00:09 +020054 if (id1 == flash->chip->id.manufacture && id2 == flash->chip->id.model)
Konstantin Grudnev3d8868c2019-07-23 00:48:54 +030055 return 1;
56
57 return 0;
58}
59
60/* ST95XXX chips don't have erase operation and erase is made as part of write command */
61int spi_block_erase_emulation(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
62{
63 uint8_t *erased_contents = NULL;
64 int result = 0;
65
66 erased_contents = (uint8_t *)malloc(blocklen * sizeof(uint8_t));
67 if (!erased_contents) {
68 msg_cerr("Out of memory!\n");
69 return 1;
70 }
71 memset(erased_contents, ERASED_VALUE(flash), blocklen * sizeof(uint8_t));
72 result = spi_write_chunked(flash, erased_contents, 0, blocklen, flash->chip->page_size);
73 free(erased_contents);
74 return result;
75}