| Thomas Heijligen | 328a64a | 2022-04-25 14:42:17 +0200 | [diff] [blame] | 1 | srcs += files( |
| 2 | ('endian_' + host_machine.endian() + '.c'), | ||||
| 3 | 'memaccess.c', | ||||
| 4 | ) | ||||
| 5 | |||||
| 6 | if host_machine.endian() == 'little' | ||||
| 7 | add_project_arguments('-D__FLASHROM_LITTLE_ENDIAN__=1', language : 'c') | ||||
| 8 | endif | ||||
| 9 | if host_machine.endian() == 'big' | ||||
| 10 | add_project_arguments('-D__FLASHROM_BIG_ENDIAN__=1', language : 'c') | ||||
| 11 | endif | ||||