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Ronald G. Minnich5b582f22006-02-23 17:16:44 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5b582f22006-02-23 17:16:44 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Ronald G. Minnich5b582f22006-02-23 17:16:44 +00005 *
Uwe Hermannd1107642007-08-29 17:52:32 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000010 *
Uwe Hermannd1107642007-08-29 17:52:32 +000011 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000015 *
Uwe Hermannd1107642007-08-29 17:52:32 +000016 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000019 */
20
21#include <stdio.h>
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000022#include <stdlib.h>
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000023#include "flash.h"
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000024
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000025// I need that Berkeley bit-map printer
26void print_lhf00l04_status(uint8_t status)
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000027{
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000028 printf("%s", status & 0x80 ? "Ready:" : "Busy:");
29 printf("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:");
30 printf("%s", status & 0x20 ? "BE ERROR:" : "BE OK:");
31 printf("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:");
32 printf("%s", status & 0x8 ? "VP ERR:" : "VPP OK:");
33 printf("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:");
34 printf("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:");
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000035}
36
37int probe_lhf00l04(struct flashchip *flash)
38{
Stefan Reinauerce532972007-05-23 17:20:56 +000039 volatile uint8_t *bios = flash->virtual_memory;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000040 uint8_t id1, id2;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000041
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000042#if 0
Stefan Reinauerce532972007-05-23 17:20:56 +000043 /* Enter ID mode */
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000044 writeb(0xAA, bios + 0x5555);
45 writeb(0x55, bios + 0x2AAA);
46 writeb(0x90, bios + 0x5555);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000047#endif
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000048
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000049 writeb(0xff, bios);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000050 myusec_delay(10);
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000051 writeb(0x90, bios);
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000052 myusec_delay(10);
53
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000054 id1 = readb(bios);
55 id2 = readb(bios + 0x01);
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000056
Stefan Reinauerce532972007-05-23 17:20:56 +000057 /* Leave ID mode */
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000058 writeb(0xAA, bios + 0x5555);
59 writeb(0x55, bios + 0x2AAA);
60 writeb(0xF0, bios + 0x5555);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000061
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000062 myusec_delay(10);
63
Peter Stuge5cafc332009-01-25 23:52:45 +000064 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000065
Uwe Hermanna8808852007-05-24 19:17:29 +000066 if (id1 != flash->manufacture_id || id2 != flash->model_id)
Stefan Reinauerff4f1972007-05-24 08:48:10 +000067 return 0;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000068
Stefan Reinauerff4f1972007-05-24 08:48:10 +000069 map_flash_registers(flash);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000070
Stefan Reinauerff4f1972007-05-24 08:48:10 +000071 return 1;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000072}
73
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000074uint8_t wait_lhf00l04(volatile uint8_t *bios)
75{
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000076 uint8_t status;
77 uint8_t id1, id2;
78
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000079 writeb(0x70, bios);
80 if ((readb(bios) & 0x80) == 0) { // it's busy
81 while ((readb(bios) & 0x80) == 0) ;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000082 }
83
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000084 status = readb(bios);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000085
86 // put another command to get out of status register mode
87
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000088 writeb(0x90, bios);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000089 myusec_delay(10);
90
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000091 id1 = readb(bios);
92 id2 = readb(bios + 0x01);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000093
94 // this is needed to jam it out of "read id" mode
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +000095 writeb(0xAA, bios + 0x5555);
96 writeb(0x55, bios + 0x2AAA);
97 writeb(0xF0, bios + 0x5555);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000098
Uwe Hermannffec5f32007-08-23 16:08:21 +000099 return status;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000100}
Uwe Hermannffec5f32007-08-23 16:08:21 +0000101
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000102int erase_lhf00l04_block(struct flashchip *flash, int offset)
103{
Stefan Reinauerce532972007-05-23 17:20:56 +0000104 volatile uint8_t *bios = flash->virtual_memory + offset;
105 volatile uint8_t *wrprotect = flash->virtual_registers + offset + 2;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000106 uint8_t status;
107
108 // clear status register
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000109 writeb(0x50, bios);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000110 printf("Erase at %p\n", bios);
Stefan Reinauerce532972007-05-23 17:20:56 +0000111 status = wait_lhf00l04(flash->virtual_memory);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000112 print_lhf00l04_status(status);
113 // clear write protect
114 printf("write protect is at %p\n", (wrprotect));
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000115 printf("write protect is 0x%x\n", readb(wrprotect));
116 writeb(0, wrprotect);
117 printf("write protect is 0x%x\n", readb(wrprotect));
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000118
119 // now start it
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000120 writeb(0x20, bios);
121 writeb(0xd0, bios);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000122 myusec_delay(10);
123 // now let's see what the register is
Stefan Reinauerce532972007-05-23 17:20:56 +0000124 status = wait_lhf00l04(flash->virtual_memory);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000125 print_lhf00l04_status(status);
126 printf("DONE BLOCK 0x%x\n", offset);
Uwe Hermannffec5f32007-08-23 16:08:21 +0000127
128 return 0;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000129}
Uwe Hermannffec5f32007-08-23 16:08:21 +0000130
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000131int erase_lhf00l04(struct flashchip *flash)
132{
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000133 int i;
134 unsigned int total_size = flash->total_size * 1024;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000135
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000136 printf("total_size is %d; flash->page_size is %d\n",
137 total_size, flash->page_size);
138 for (i = 0; i < total_size; i += flash->page_size)
139 erase_lhf00l04_block(flash, i);
140 printf("DONE ERASE\n");
Uwe Hermannffec5f32007-08-23 16:08:21 +0000141
142 return 0;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000143}
144
Uwe Hermanna7e05482007-05-09 10:17:44 +0000145void write_page_lhf00l04(volatile uint8_t *bios, uint8_t *src,
146 volatile uint8_t *dst, int page_size)
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000147{
148 int i;
149
150 for (i = 0; i < page_size; i++) {
151 /* transfer data from source to destination */
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000152 writeb(0x40, dst);
153 writeb(*src++, dst++);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000154 wait_lhf00l04(bios);
155 }
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000156}
157
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000158int write_lhf00l04(struct flashchip *flash, uint8_t *buf)
159{
160 int i;
Uwe Hermanna7e05482007-05-09 10:17:44 +0000161 int total_size = flash->total_size * 1024;
162 int page_size = flash->page_size;
Stefan Reinauerce532972007-05-23 17:20:56 +0000163 volatile uint8_t *bios = flash->virtual_memory;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000164
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000165 erase_lhf00l04(flash);
Carl-Daniel Hailfinger61a8bd22009-03-05 19:24:22 +0000166 if (readb(bios) != 0xff) {
Uwe Hermanna502dce2007-10-17 23:55:15 +0000167 printf("ERASE FAILED!\n");
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000168 return -1;
169 }
Uwe Hermanna502dce2007-10-17 23:55:15 +0000170 printf("Programming page: ");
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000171 for (i = 0; i < total_size / page_size; i++) {
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000172 printf("%04d at address: 0x%08x", i, i * page_size);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +0000173 write_page_lhf00l04(bios, buf + i * page_size,
Uwe Hermanna7e05482007-05-09 10:17:44 +0000174 bios + i * page_size, page_size);
175 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000176 }
177 printf("\n");
Uwe Hermannfd374142007-08-23 15:20:38 +0000178 protect_jedec(bios);
Uwe Hermannffec5f32007-08-23 16:08:21 +0000179
180 return 0;
Ronald G. Minnich5b582f22006-02-23 17:16:44 +0000181}