)]}'
{
  "commit": "fffc48d247cef5102113d97538054066546b2297",
  "tree": "cdb49567c3d7c2291fa33221989516afb1b03abf",
  "parents": [
    "3f3c1f3238dcede30d0d15d36da6326b428b8b12"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sat May 28 14:26:06 2022 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Fri Dec 30 01:16:51 2022 +0100"
  },
  "message": "flashchips: Add Spansion (today Infineon) S25FL128L and S25FL256L\n\nThese chips seem to be rather regular, supporting 2.7V..3.6V, the\ncommon erase block sizes 4KiB, 32KiB, 64KiB and the usual block-\nprotection bits.\n\nStatus/configuration register naming differs from other vendors,\nthough. These chips have 2 status registers plus 3 configuration\nregisters. Configuration registers 1 \u0026 2 match status registers\n2 \u0026 3 of what we are used from other vendors. Read opcodes match\ntoo, however writes are always done through the WRSR instruction\nwhich can write up to 4 bytes (SR1, CR1, CR2, CR3).\n\nS25FL256L supports native 4BA commands and entering a 4BA mode.\nHowever, it uses an unusual opcode (0x53) for the 32KiB 4BA block\nerase.\n\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nChange-Id: I356df6649f29e50879a4da4183f1164a81cb0a09\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/64747\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70989\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "776c8c335553de514394408308dded41914901e9",
      "old_mode": 33188,
      "old_path": "chipdrivers.h",
      "new_id": "149620a4103cccc739403bfbd78c041a105c4205",
      "new_mode": 33188,
      "new_path": "chipdrivers.h"
    },
    {
      "type": "modify",
      "old_id": "5cb71a8be7c54412ad3005cd9a23b3d1a1bd6659",
      "old_mode": 33188,
      "old_path": "flashchips.c",
      "new_id": "535b79ceb963e66033c8260ca306e83732c78c85",
      "new_mode": 33188,
      "new_path": "flashchips.c"
    },
    {
      "type": "modify",
      "old_id": "9b89355f80c83d63aa99f42526741c1431dfd639",
      "old_mode": 33188,
      "old_path": "flashchips.h",
      "new_id": "724a275dca1332e40a5123797ce7ac58a99700f7",
      "new_mode": 33188,
      "new_path": "flashchips.h"
    },
    {
      "type": "modify",
      "old_id": "c5832fb8baddf69e011ec4123eb693bf9dc67614",
      "old_mode": 33188,
      "old_path": "spi25.c",
      "new_id": "60ddb966065a48d65efe64f719c2d78fa5952bb6",
      "new_mode": 33188,
      "new_path": "spi25.c"
    }
  ]
}