| commit | fe21b43203c08f597c1295dba556323e63b3f209 | [log] [tgz] |
|---|---|---|
| author | Nico Huber <nico.h@gmx.de> | Fri Oct 25 23:51:05 2024 +0200 |
| committer | Nico Huber <nico.h@gmx.de> | Sun Feb 23 12:05:52 2025 +0000 |
| tree | 05161bf0efd4ca85f8483a92d8d014e457332c67 | |
| parent | 1c5d8296f9997e6b773352688fce59c24c1aafd5 [diff] |
flashchips: Add remaining P25Q..H family 3.3V chips They all support QPI, and WPS for individual sector protection. However, the original P25Q32H and P25Q64H have a different de- fault setting for the dummy cycles in QPI mode. Hence, we need duplicate database entries once more. Datasheets used: https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q32H_Datasheet_V1.4.pdf https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q32SH_Datasheet_V1.9.pdf https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q64H_Datasheet_V1.4.pdf https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q64SH_Datasheet_V1.5.pdf https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q128H_Datasheet_V1.6.pdf Change-Id: I700747a6bc1762f113846aa62f55681fa2c8cfbb Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/294 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/include/flashchips.h b/include/flashchips.h index 167799c..1af22d6 100644 --- a/include/flashchips.h +++ b/include/flashchips.h
@@ -643,6 +643,9 @@ #define PUYA_P25Q40H 0x6013 /* Same as P25Q40SH */ #define PUYA_P25Q80H 0x6014 /* Same as P25Q80SH */ #define PUYA_P25Q16H 0x6015 /* Same as P25Q16SH */ +#define PUYA_P25Q32H 0x6016 /* Same as P25Q32SH */ +#define PUYA_P25Q64H 0x6017 /* Same as P25Q64SH */ +#define PUYA_P25Q128H 0x6018 /* * The Sanyo chip found so far uses SPI, first byte is manufacturer code,