Add support for AT45DB321C

It seems like this model is one-of-a-kind... it shares some properties
with the older versions of the AT45DB series as well as with new ones.

Corresponding to flashrom svn r1724.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
diff --git a/at45db.c b/at45db.c
index 82196d0..ba2735d 100644
--- a/at45db.c
+++ b/at45db.c
@@ -34,6 +34,7 @@
 /* Opcodes */
 #define AT45DB_STATUS 0xD7 /* NB: this is a block erase command on most other chips(!). */
 #define AT45DB_DISABLE_PROTECT 0x3D, 0x2A, 0x7F, 0x9A
+#define AT45DB_READ_ARRAY 0xE8
 #define AT45DB_READ_PROTECT 0x32
 #define AT45DB_READ_LOCKDOWN 0x35
 #define AT45DB_PAGE_ERASE 0x81
@@ -141,6 +142,8 @@
 		return 1;
 	}
 
+	/* AT45DB321C does not support lockdown or a page size of a power of 2... */
+	const bool isAT45DB321C = (strcmp(flash->chip->name, "AT45DB321C") == 0);
 	msg_cdbg("Chip status register is 0x%02x\n", status);
 	msg_cdbg("Chip status register: Bit 7 / Ready is %sset\n", (status & AT45DB_READY) ? "" : "not ");
 	msg_cdbg("Chip status register: Bit 6 / Compare match is %sset\n", (status & AT45DB_CMP) ? "" : "not ");
@@ -151,12 +154,18 @@
 	const uint8_t dens = (status >> 3) & 0x7; /* Bit 2 is always 1, we use the other bits only */
 	msg_cdbg("Chip status register: Density is %u Mb\n", 1 << (dens - 1));
 	msg_cdbg("Chip status register: Bit 1 / Protection is %sset\n", (status & AT45DB_PROT) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 0 / \"Power of 2\" is %sset\n",
-		 (status & AT45DB_POWEROF2) ? "" : "not ");
+
+	if (isAT45DB321C)
+		spi_prettyprint_status_register_bit(status, 0);
+	else
+		msg_cdbg("Chip status register: Bit 0 / \"Power of 2\" is %sset\n",
+			 (status & AT45DB_POWEROF2) ? "" : "not ");
+
 	if (status & AT45DB_PROT)
 		at45db_prettyprint_protection_register(flash, AT45DB_READ_PROTECT, "protect");
 
-	at45db_prettyprint_protection_register(flash, AT45DB_READ_LOCKDOWN, "lock");
+	if (!isAT45DB321C)
+		at45db_prettyprint_protection_register(flash, AT45DB_READ_LOCKDOWN, "lock");
 
 	return 0;
 }
@@ -258,6 +267,45 @@
 	return 0;
 }
 
+/* Legacy continuous read, used where spi_read_at45db() is not available.
+ * The first 4 (dummy) bytes read need to be discarded. */
+int spi_read_at45db_e8(struct flashctx *flash, uint8_t *buf, unsigned int addr, unsigned int len)
+{
+	const unsigned int page_size = flash->chip->page_size;
+	const unsigned int total_size = flash->chip->total_size * 1024;
+	if ((addr + len) > total_size) {
+		msg_cerr("%s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u\n",
+			 __func__, addr, len, total_size);
+		return 1;
+	}
+
+	/* We have to split this up into chunks to fit within the programmer's read size limit, but those
+	 * chunks can cross page boundaries. */
+	const unsigned int max_data_read = flash->pgm->spi.max_data_read;
+	const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size;
+	while (addr < len) {
+		const unsigned int addr_at45 = at45db_convert_addr(addr, page_size);
+		const unsigned char cmd[] = {
+			AT45DB_READ_ARRAY,
+			(addr_at45 >> 16) & 0xff,
+			(addr_at45 >> 8) & 0xff,
+			(addr_at45 >> 0) & 0xff
+		};
+		/* We need to leave place for 4 dummy bytes and handle them explicitly. */
+		unsigned int chunk = min(max_chunk, len + 4);
+		uint8_t tmp[chunk];
+		int ret = spi_send_command(flash, sizeof(cmd), chunk, cmd, tmp);
+		if (ret) {
+			msg_cerr("%s: error sending read command!\n", __func__);
+			return ret;
+		}
+		/* Copy result without dummy bytes into buf and advance address counter respectively. */
+		memcpy(buf + addr, tmp + 4, chunk - 4);
+		addr += chunk - 4;
+	}
+	return 0;
+}
+
 /* Returns 0 when ready, 1 on errors and timeouts. */
 static int at45db_wait_ready (struct flashctx *flash, unsigned int us, unsigned int retries)
 {
diff --git a/chipdrivers.h b/chipdrivers.h
index e669f00..d82ba80 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -115,6 +115,7 @@
 int spi_prettyprint_status_register_at45db(struct flashctx *flash);
 int spi_disable_blockprotect_at45db(struct flashctx *flash);
 int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int spi_read_at45db_e8(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int spi_write_at45db(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int spi_erase_at45db_page(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_erase_at45db_block(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
diff --git a/flashchips.c b/flashchips.c
index 527fb82..deff618 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -2550,11 +2550,37 @@
 		.total_size	= 4224 /* No power of two sizes */,
 		.page_size	= 528 /* No power of two sizes */,
 		/* does not support EWSR nor WREN and has no writable status register bits whatsoever */
-		.tested		= TEST_BAD_REW,
+		/* OTP: 128B total, 64B pre-programmed; read 0x77 (4 dummy bytes); write 0x9A (via buffer) */
+		.feature_bits	= FEATURE_OTP,
+		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
-		.write		= NULL,
-		.read		= NULL /* Incompatible read */,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {528, 8192} },
+				.block_erase = spi_erase_at45db_page,
+			}, {
+				.eraseblocks = { {8 * 528, 8192/8} },
+				.block_erase = spi_erase_at45db_block,
+			}, /* Although the datasheets describes sectors (which can be write protected)
+			    * there seems to be no erase functions for them.
+			  {
+				.eraseblocks = {
+					{8 * 528, 1},
+					{120 * 528, 1},
+					{128 * 528, 63},
+				},
+				.block_erase = spi_erase_at45db_sector
+			}, */ {
+				.eraseblocks = { {4224 * 1024, 1} },
+				.block_erase = spi_erase_at45db_chip,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_at45db, /* Bit 0 is undefined, no lockdown */
+		.gran		= write_gran_528bytes,
+		.write		= spi_write_at45db,
+		.read		= spi_read_at45db_e8, /* 3 address and 4 dummy bytes */
 		.voltage	= {2700, 3600},
 	},