)]}'
{
  "commit": "fb60cec40223da20a01accf4d352e66075307497",
  "tree": "37e9776fc2eb71277b7edc39353fa336b20729b9",
  "parents": [
    "c8ca3de5ae0e2340f977182f035c4b8ec40a05fb"
  ],
  "author": {
    "name": "Mattias Mattsson",
    "email": "vitplister@gmail.com",
    "time": "Mon Sep 13 19:39:25 2010 +0000"
  },
  "committer": {
    "name": "Mattias Mattsson",
    "email": "vitplister@gmail.com",
    "time": "Mon Sep 13 19:39:25 2010 +0000"
  },
  "message": "Add board enable for ASUS P4SC-E\n\nI does this by setting bits 3..2 of register 0x24 on the ITE IT8707F,\nwhile keeping bit 3 of register 0x23 set while manipulating the first\nregister.\n\nAFAIK, there is no public datasheet available for this super i/o chip, but\nthe above is how the vendor BIOS does it. Also, registers 0x23 and 0x24 seem\nto have the same meaning as on the ITE IT8710F.\n\nMatching on NB/SB.\n\nTested on a P4SC-E with SST 39SF020A flash. Probe, read, erase, write\nall work.\n\nlspci/superio output:\nhttp://www.flashrom.org/pipermail/flashrom/2010-July/004090.html\n\nflashrom output:\nhttp://www.flashrom.org/pipermail/flashrom/2010-August/004566.html\n\nMany thanks to Reinder de Haan for help with reverse engineering this!\n\nCorresponding to flashrom svn r1161.\n\nSigned-off-by: Mattias Mattsson \u003cvitplister@gmail.com\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "5a35221821e4126c3ec390daccdb08ff041d3fe1",
      "old_mode": 33188,
      "old_path": "board_enable.c",
      "new_id": "b1e2c6517ff4bf2bfaf15565891a9dbc0f4e7661",
      "new_mode": 33188,
      "new_path": "board_enable.c"
    },
    {
      "type": "modify",
      "old_id": "ba6454f0bf7fd9600db528e70f9dc481cbd2e993",
      "old_mode": 33188,
      "old_path": "print.c",
      "new_id": "91cd48d7edd1f8cda62a09db34348c46b8d8aa98",
      "new_mode": 33188,
      "new_path": "print.c"
    }
  ]
}
