diff --git a/flash.h b/flash.h
index 58c650b..10ceaee 100644
--- a/flash.h
+++ b/flash.h
@@ -349,12 +349,12 @@
 /* spi.c */
 int probe_spi(struct flashchip *flash);
 int it87xx_probe_spi_flash(const char *name);
-int generic_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
-void generic_spi_write_enable();
-void generic_spi_write_disable();
-int generic_spi_chip_erase_c7(struct flashchip *flash);
-int generic_spi_chip_write(struct flashchip *flash, uint8_t *buf);
-int generic_spi_chip_read(struct flashchip *flash, uint8_t *buf);
+int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+void spi_write_enable();
+void spi_write_disable();
+int spi_chip_erase_c7(struct flashchip *flash);
+int spi_chip_write(struct flashchip *flash, uint8_t *buf);
+int spi_chip_read(struct flashchip *flash, uint8_t *buf);
 
 /* 82802ab.c */
 int probe_82802ab(struct flashchip *flash);
diff --git a/flashchips.c b/flashchips.c
index 45d118d..9dfa3f1 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -49,25 +49,25 @@
 	{"Fujitsu",	"MBM29F400TC",		FUJITSU_ID,	MBM29F400TC_STRANGE,	512,	64 * 1024,	TEST_UNTESTED,	probe_m29f400bt,	erase_m29f400bt,		write_coreboot_m29f400bt},
 	{"Intel",	"82802AB",		INTEL_ID,	173,			512,	64 * 1024,	TEST_UNTESTED,	probe_82802ab,		erase_82802ab,			write_82802ab},
 	{"Intel",	"82802AC",		INTEL_ID,	172,			1024,	64 * 1024,	TEST_UNTESTED,	probe_82802ab,		erase_82802ab,			write_82802ab},
-	{"Macronix",	"MX25L3205",		MX_ID,		MX_25L3205,		4096,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write,	generic_spi_chip_read},
-	{"Macronix",	"MX25L4005",		MX_ID,		MX_25L4005,		512,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write,	generic_spi_chip_read},
-	{"Macronix",	"MX25L8005",		MX_ID,		MX_25L8005,		1024,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write,	generic_spi_chip_read},
+	{"Macronix",	"MX25L3205",		MX_ID,		MX_25L3205,		4096,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write,	spi_chip_read},
+	{"Macronix",	"MX25L4005",		MX_ID,		MX_25L4005,		512,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write,	spi_chip_read},
+	{"Macronix",	"MX25L8005",		MX_ID,		MX_25L8005,		1024,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write,	spi_chip_read},
 	{"Macronix",	"MX29F002",		MX_ID,		MX_29F002,		256,	64 * 1024,	TEST_UNTESTED,	probe_29f002,		erase_29f002,			write_29f002},
 #ifndef DISABLE_DOC
 	{"M-Systems",	"MD-2802",		MSYSTEMS_ID,	MSYSTEMS_MD2802,	8,	8 * 1024,	TEST_UNTESTED,	probe_md2802,		erase_md2802,			write_md2802,		read_md2802},
 #endif
-	{"PMC",		"Pm25LV010",		PMC_ID,		PMC_25LV010,		128,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write,	generic_spi_chip_read},
-	{"PMC",		"Pm25LV016B",		PMC_ID,		PMC_25LV016B,		2048,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write,	generic_spi_chip_read},
-	{"PMC",		"Pm25LV020",		PMC_ID,		PMC_25LV020,		256,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write,	generic_spi_chip_read},
-	{"PMC",		"Pm25LV040",		PMC_ID,		PMC_25LV040,		512,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write,	generic_spi_chip_read},
-	{"PMC",		"Pm25LV080B",		PMC_ID,		PMC_25LV080B,		1024,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write,	generic_spi_chip_read},
-	{"PMC",		"Pm25LV512",		PMC_ID,		PMC_25LV512,		64,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write,	generic_spi_chip_read},
+	{"PMC",		"Pm25LV010",		PMC_ID,		PMC_25LV010,		128,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write,	spi_chip_read},
+	{"PMC",		"Pm25LV016B",		PMC_ID,		PMC_25LV016B,		2048,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write,	spi_chip_read},
+	{"PMC",		"Pm25LV020",		PMC_ID,		PMC_25LV020,		256,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write,	spi_chip_read},
+	{"PMC",		"Pm25LV040",		PMC_ID,		PMC_25LV040,		512,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write,	spi_chip_read},
+	{"PMC",		"Pm25LV080B",		PMC_ID,		PMC_25LV080B,		1024,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write,	spi_chip_read},
+	{"PMC",		"Pm25LV512",		PMC_ID,		PMC_25LV512,		64,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write,	spi_chip_read},
 	{"PMC",		"Pm49FL002",		PMC_ID_NOPREFIX,PMC_49FL002,		256,	16 * 1024,	TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_49fl004},
 	{"PMC",		"Pm49FL004",		PMC_ID_NOPREFIX,PMC_49FL004,		512,	64 * 1024,	TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_49fl004},
 	{"Sharp",	"LHF00L04",		SHARP_ID,	SHARP_LHF00L04,		1024,	64 * 1024,	TEST_UNTESTED,	probe_lhf00l04,		erase_lhf00l04,			write_lhf00l04},
-	{"Spansion",	"S25FL016A",		SPANSION_ID,	SPANSION_S25FL016A,	2048,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write,	generic_spi_chip_read},
-	{"SST",		"SST25VF016B",		SST_ID,		SST_25VF016B,		2048,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write,	generic_spi_chip_read},
-	{"SST",		"SST25VF040B",		SST_ID,		SST_25VF040B,		512,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write,	generic_spi_chip_read},
+	{"Spansion",	"S25FL016A",		SPANSION_ID,	SPANSION_S25FL016A,	2048,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write,	spi_chip_read},
+	{"SST",		"SST25VF016B",		SST_ID,		SST_25VF016B,		2048,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write,	spi_chip_read},
+	{"SST",		"SST25VF040B",		SST_ID,		SST_25VF040B,		512,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write,	spi_chip_read},
 	{"SST",		"SST28SF040A",		SST_ID,		SST_28SF040,		512,	256,		TEST_UNTESTED,	probe_28sf040,		erase_28sf040,			write_28sf040},
 	{"SST",		"SST29EE020A",		SST_ID,		SST_29EE020A,		256,	128,		TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_jedec},
 	{"SST",		"SST39SF010A",		SST_ID,		SST_39SF010,		128,	4096,		TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_39sf020},
@@ -87,15 +87,15 @@
 	{"SST",		"SST49LF040B",		SST_ID,		SST_49LF040B,		512,	64 * 1024,	TEST_UNTESTED,	probe_sst_fwhub,	erase_sst_fwhub,		write_sst_fwhub},
 	{"SST",		"SST49LF080A",		SST_ID,		SST_49LF080A,		1024,	4096,		TEST_UNTESTED,	probe_jedec,		erase_49lf040,			write_49lf040},
 	{"SST",		"SST49LF160C",		SST_ID,		SST_49LF160C,		2048,	4 * 1024,	TEST_UNTESTED,	probe_49lfxxxc,		erase_49lfxxxc,			write_49lfxxxc},
-	{"ST",		"M25P05-A",		ST_ID,		ST_M25P05A,		64,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
-	{"ST",		"M25P10-A",		ST_ID,		ST_M25P10A,		128,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
-	{"ST",		"M25P128",		ST_ID,		ST_M25P128,		16384,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
-	{"ST",		"M25P16",		ST_ID,		ST_M25P16,		2048,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
-	{"ST",		"M25P20",		ST_ID,		ST_M25P20,		256,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
-	{"ST",		"M25P32",		ST_ID,		ST_M25P32,		4096,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
-	{"ST",		"M25P40",		ST_ID,		ST_M25P40,		512,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
-	{"ST",		"M25P64",		ST_ID,		ST_M25P64,		8192,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
-	{"ST",		"M25P80",		ST_ID,		ST_M25P80,		1024,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
+	{"ST",		"M25P05-A",		ST_ID,		ST_M25P05A,		64,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
+	{"ST",		"M25P10-A",		ST_ID,		ST_M25P10A,		128,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
+	{"ST",		"M25P128",		ST_ID,		ST_M25P128,		16384,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
+	{"ST",		"M25P16",		ST_ID,		ST_M25P16,		2048,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
+	{"ST",		"M25P20",		ST_ID,		ST_M25P20,		256,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
+	{"ST",		"M25P32",		ST_ID,		ST_M25P32,		4096,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
+	{"ST",		"M25P40",		ST_ID,		ST_M25P40,		512,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
+	{"ST",		"M25P64",		ST_ID,		ST_M25P64,		8192,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
+	{"ST",		"M25P80",		ST_ID,		ST_M25P80,		1024,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
 	{"ST",		"M29F002B",		ST_ID,		ST_M29F002B,		256,	64 * 1024,	TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_jedec},
 	{"ST",		"M29F002T/NT",		ST_ID,		ST_M29F002T,		256,	64 * 1024,	TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_jedec},
 	{"ST",		"M29F040B",		ST_ID,		ST_M29F040B,		512,	64 * 1024,	TEST_UNTESTED,	probe_29f040b,		erase_29f040b,			write_29f040b},
@@ -114,10 +114,10 @@
 	{"SyncMOS",	"S29C51001T",		SYNCMOS_ID,	S29C51001T,		128,	128,		TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_49f002},
 	{"SyncMOS",	"S29C51002T",		SYNCMOS_ID,	S29C51002T,		256,	128,		TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_49f002},
 	{"SyncMOS",	"S29C51004T",		SYNCMOS_ID,	S29C51004T,		512,	128,		TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_49f002},
-	{"Winbond",	"W25x10",		WINBOND_NEX_ID,	W_25X10,		128,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
-	{"Winbond",	"W25x20",		WINBOND_NEX_ID,	W_25X20,		256,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
-	{"Winbond",	"W25x40",		WINBOND_NEX_ID,	W_25X40,		512,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
-	{"Winbond",	"W25x80",		WINBOND_NEX_ID,	W_25X80,		1024,	256,		TEST_UNTESTED,	probe_spi,		generic_spi_chip_erase_c7,	generic_spi_chip_write, generic_spi_chip_read},
+	{"Winbond",	"W25x10",		WINBOND_NEX_ID,	W_25X10,		128,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
+	{"Winbond",	"W25x20",		WINBOND_NEX_ID,	W_25X20,		256,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
+	{"Winbond",	"W25x40",		WINBOND_NEX_ID,	W_25X40,		512,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
+	{"Winbond",	"W25x80",		WINBOND_NEX_ID,	W_25X80,		1024,	256,		TEST_UNTESTED,	probe_spi,		spi_chip_erase_c7,	spi_chip_write, spi_chip_read},
 	{"Winbond",	"W29C011",		WINBOND_ID,	W_29C011,		128,	128,		TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_jedec},
 	{"Winbond",	"W29C020C",		WINBOND_ID,	W_29C020C,		256,	128,		TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_jedec},
 	{"Winbond",	"W29C040P",		WINBOND_ID,	W_29C040P,		512,	256,		TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_jedec},
diff --git a/spi.c b/spi.c
index a322d31..177e49c 100644
--- a/spi.c
+++ b/spi.c
@@ -241,7 +241,7 @@
 	return 0;
 }
 
-int generic_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
+int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
 {
 	if (it8716f_flashport)
 		return it8716f_spi_command(it8716f_flashport, writecnt, readcnt, writearr, readarr);
@@ -249,30 +249,30 @@
 	return 1;
 }
 
-static int generic_spi_rdid(unsigned char *readarr)
+static int spi_rdid(unsigned char *readarr)
 {
 	const unsigned char cmd[] = JEDEC_RDID;
 
-	if (generic_spi_command(JEDEC_RDID_OUTSIZE, JEDEC_RDID_INSIZE, cmd, readarr))
+	if (spi_command(JEDEC_RDID_OUTSIZE, JEDEC_RDID_INSIZE, cmd, readarr))
 		return 1;
 	printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1], readarr[2]);
 	return 0;
 }
 
-void generic_spi_write_enable()
+void spi_write_enable()
 {
 	const unsigned char cmd[] = JEDEC_WREN;
 
 	/* Send WREN (Write Enable) */
-	generic_spi_command(JEDEC_WREN_OUTSIZE, JEDEC_WREN_INSIZE, cmd, NULL);
+	spi_command(JEDEC_WREN_OUTSIZE, JEDEC_WREN_INSIZE, cmd, NULL);
 }
 
-void generic_spi_write_disable()
+void spi_write_disable()
 {
 	const unsigned char cmd[] = JEDEC_WRDI;
 
 	/* Send WRDI (Write Disable) */
-	generic_spi_command(JEDEC_WRDI_OUTSIZE, JEDEC_WRDI_INSIZE, cmd, NULL);
+	spi_command(JEDEC_WRDI_OUTSIZE, JEDEC_WRDI_INSIZE, cmd, NULL);
 }
 
 int probe_spi(struct flashchip *flash)
@@ -280,7 +280,7 @@
 	unsigned char readarr[3];
 	uint32_t manuf_id;
 	uint32_t model_id;
-	if (!generic_spi_rdid(readarr)) {
+	if (!spi_rdid(readarr)) {
 		/* Check if this is a continuation vendor ID */
 		if (readarr[0] == 0x7f) {
 			manuf_id = (readarr[0] << 8) | readarr[1];
@@ -308,13 +308,13 @@
 	return 0;
 }
 
-uint8_t generic_spi_read_status_register()
+uint8_t spi_read_status_register()
 {
 	const unsigned char cmd[] = JEDEC_RDSR;
 	unsigned char readarr[1];
 
 	/* Read Status Register */
-	generic_spi_command(JEDEC_RDSR_OUTSIZE, JEDEC_RDSR_INSIZE, cmd, readarr);
+	spi_command(JEDEC_RDSR_OUTSIZE, JEDEC_RDSR_INSIZE, cmd, readarr);
 	return readarr[0];
 }
 
@@ -376,7 +376,7 @@
 {
 	uint8_t status;
 
-	status = generic_spi_read_status_register();
+	status = spi_read_status_register();
 	printf_debug("Chip status register is %02x\n", status);
 	switch (flash->manufacture_id) {
 	case ST_ID:
@@ -391,18 +391,18 @@
 	}
 }
 	
-int generic_spi_chip_erase_c7(struct flashchip *flash)
+int spi_chip_erase_c7(struct flashchip *flash)
 {
 	const unsigned char cmd[] = JEDEC_CE_C7;
 	
 	spi_disable_blockprotect();
-	generic_spi_write_enable();
+	spi_write_enable();
 	/* Send CE (Chip Erase) */
-	generic_spi_command(JEDEC_CE_C7_OUTSIZE, JEDEC_CE_C7_INSIZE, cmd, NULL);
+	spi_command(JEDEC_CE_C7_OUTSIZE, JEDEC_CE_C7_INSIZE, cmd, NULL);
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 1-85 s, so wait in 1 s steps.
 	 */
-	while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
 		sleep(1);
 	return 0;
 }
@@ -412,39 +412,39 @@
  * 32k for SST
  * 4-32k non-uniform for EON
  */
-int generic_spi_block_erase_d8(const struct flashchip *flash, unsigned long addr)
+int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr)
 {
 	unsigned char cmd[JEDEC_BE_D8_OUTSIZE] = JEDEC_BE_D8;
 
 	cmd[1] = (addr & 0x00ff0000) >> 16;
 	cmd[2] = (addr & 0x0000ff00) >> 8;
 	cmd[3] = (addr & 0x000000ff);
-	generic_spi_write_enable();
+	spi_write_enable();
 	/* Send BE (Block Erase) */
-	generic_spi_command(JEDEC_BE_D8_OUTSIZE, JEDEC_BE_D8_INSIZE, cmd, NULL);
+	spi_command(JEDEC_BE_D8_OUTSIZE, JEDEC_BE_D8_INSIZE, cmd, NULL);
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
-	while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
 		usleep(100 * 1000);
 	return 0;
 }
 
 /* Sector size is usually 4k, though Macronix eliteflash has 64k */
-int generic_spi_sector_erase(const struct flashchip *flash, unsigned long addr)
+int spi_sector_erase(const struct flashchip *flash, unsigned long addr)
 {
 	unsigned char cmd[JEDEC_SE_OUTSIZE] = JEDEC_SE;
 	cmd[1] = (addr & 0x00ff0000) >> 16;
 	cmd[2] = (addr & 0x0000ff00) >> 8;
 	cmd[3] = (addr & 0x000000ff);
 
-	generic_spi_write_enable();
+	spi_write_enable();
 	/* Send SE (Sector Erase) */
-	generic_spi_command(JEDEC_SE_OUTSIZE, JEDEC_SE_INSIZE, cmd, NULL);
+	spi_command(JEDEC_SE_OUTSIZE, JEDEC_SE_INSIZE, cmd, NULL);
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 15-800 ms, so wait in 10 ms steps.
 	 */
-	while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
 		usleep(10 * 1000);
 	return 0;
 }
@@ -453,7 +453,7 @@
 void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
 	int i;
 
-	generic_spi_write_enable();
+	spi_write_enable();
 	outb(0x06 , it8716f_flashport + 1);
 	outb(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
 	for (i = 0; i < 256; i++) {
@@ -463,11 +463,11 @@
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 1-10 ms, so wait in 1 ms steps.
 	 */
-	while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
 		usleep(1000);
 }
 
-void generic_spi_page_program(int block, uint8_t *buf, uint8_t *bios)
+void spi_page_program(int block, uint8_t *buf, uint8_t *bios)
 {
 	if (it8716f_flashport)
 		it8716f_spi_page_program(block, buf, bios);
@@ -482,7 +482,7 @@
 	const unsigned char cmd[] = {JEDEC_WRSR, (unsigned char)status};
 
 	/* Send WRSR (Write Status Register) */
-	generic_spi_command(JEDEC_WRSR_OUTSIZE, JEDEC_WRSR_INSIZE, cmd, NULL);
+	spi_command(JEDEC_WRSR_OUTSIZE, JEDEC_WRSR_INSIZE, cmd, NULL);
 }
 
 void spi_byte_program(int address, uint8_t byte)
@@ -495,18 +495,18 @@
 	};
 
 	/* Send Byte-Program */
-	generic_spi_command(JEDEC_BYTE_PROGRAM_OUTSIZE, JEDEC_BYTE_PROGRAM_INSIZE, cmd, NULL);
+	spi_command(JEDEC_BYTE_PROGRAM_OUTSIZE, JEDEC_BYTE_PROGRAM_INSIZE, cmd, NULL);
 }
 
 void spi_disable_blockprotect(void)
 {
 	uint8_t status;
 
-	status = generic_spi_read_status_register();
+	status = spi_read_status_register();
 	/* If there is block protection in effect, unprotect it first. */
 	if ((status & 0x3c) != 0) {
 		printf_debug("Some block protection in effect, disabling\n");
-		generic_spi_write_enable();
+		spi_write_enable();
 		spi_write_status_register(status & ~0x3c);
 	}
 }
@@ -523,9 +523,9 @@
 
 	spi_disable_blockprotect();
 	for (i = 0; i < total_size; i++) {
-		generic_spi_write_enable();
+		spi_write_enable();
 		spi_byte_program(i, buf[i]);
-		while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+		while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
 			myusec_delay(10);
 	}
 	/* resume normal ops... */
@@ -542,14 +542,14 @@
 	};
 
 	/* Send Read */
-	generic_spi_command(JEDEC_READ_OUTSIZE, len, cmd, bytes);
+	spi_command(JEDEC_READ_OUTSIZE, len, cmd, bytes);
 }
 
 /*
  * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
  * Need to read this big flash using firmware cycles 3 byte at a time.
  */
-int generic_spi_chip_read(struct flashchip *flash, uint8_t *buf)
+int spi_chip_read(struct flashchip *flash, uint8_t *buf)
 {
 	int total_size = 1024 * flash->total_size;
 	int i;
@@ -568,14 +568,14 @@
 	return 0;
 }
 
-int generic_spi_chip_write(struct flashchip *flash, uint8_t *buf) {
+int spi_chip_write(struct flashchip *flash, uint8_t *buf) {
 	int total_size = 1024 * flash->total_size;
 	int i;
 	if (total_size > 512 * 1024) {
 		it8716f_over512k_spi_chip_write(flash, buf);
 	} else {
 		for (i = 0; i < total_size / 256; i++) {
-			generic_spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
+			spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
 		}
 	}
 	return 0;