)]}'
{
  "commit": "fa62294536a3ce5070e8d9065aaa1aa45031f910",
  "tree": "66152f87787e5c3c6ce2c9db903f8e1a70bd9311",
  "parents": [
    "1dc3d420831b0ee482aede5f46ba53a0d2de4b74"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.huber@secunet.com",
    "time": "Fri Mar 24 17:25:37 2017 +0100"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Fri Jul 28 12:30:21 2017 +0000"
  },
  "message": "ich_descriptors: Update for Intel Skylake\n\nInterpretation of component clocks changed. Also more regions and more\nmasters are supported now. The number of regions (NR) is now static per\nchipset (10 in the 100 Series case) and not coded into the descriptor\nany more.\n\nv2: o Use guess_ich_chipset() for read_ich_descriptors_from_dump().\n    o Update region extraction in `ich_descriptors_tool`.\n\nTEST\u003dRun `ich_descriptors_tool` over a 100 Series dump and checked\n     that output looks sane. Run `ich_descriptors_tool` over dumps\n     of five different older systems (1 x Sandy Bridge, 3 x Ivy Bridge,\n     1 x Haswell). Beside whitespace changes, regions not accounted\n     by `NR` are not printed any more.\n\nChange-Id: Idd60a857d1ecffcb2e437af21134d9de44dcceb8\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/18973\nReviewed-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n",
  "tree_diff": [
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