diff --git a/flash.h b/flash.h
index cfe3062..a810a7c 100644
--- a/flash.h
+++ b/flash.h
@@ -423,7 +423,6 @@
 uint8_t spi_read_status_register();
 void spi_disable_blockprotect(void);
 void spi_byte_program(int address, uint8_t byte);
-void spi_page_program(int block, uint8_t *buf, uint8_t *bios);
 void spi_nbyte_read(int address, uint8_t *bytes, int len);
 
 /* 82802ab.c */
@@ -447,7 +446,6 @@
 int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
 int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
 int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
-void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios);
 
 /* jedec.c */
 uint8_t oddparity(uint8_t val);
diff --git a/it87spi.c b/it87spi.c
index e6cd9d6..d1dd1d6 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -192,7 +192,7 @@
 }
 
 /* Page size is usually 256 bytes */
-void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
+static void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
 	int i;
 
 	spi_write_enable();
@@ -261,7 +261,7 @@
 		it8716f_over512k_spi_chip_write(flash, buf);
 	} else {
 		for (i = 0; i < total_size / 256; i++) {
-			spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
+			it8716f_spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
 		}
 	}
 	return 0;
diff --git a/spi.c b/spi.c
index d89bef6..6de9da9 100644
--- a/spi.c
+++ b/spi.c
@@ -51,7 +51,7 @@
 {
 	const unsigned char cmd[JEDEC_RDID_OUTSIZE] = {JEDEC_RDID};
 
-	if (spi_command(JEDEC_RDID_OUTSIZE, bytes, cmd, readarr))
+	if (spi_command(sizeof(cmd), bytes, cmd, readarr))
 		return 1;
 	printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1], readarr[2]);
 	return 0;
@@ -61,7 +61,7 @@
 {
 	const unsigned char cmd[JEDEC_RES_OUTSIZE] = {JEDEC_RES, 0, 0, 0};
 
-	if (spi_command(JEDEC_RES_OUTSIZE, JEDEC_RES_INSIZE, cmd, readarr))
+	if (spi_command(sizeof(cmd), JEDEC_RES_INSIZE, cmd, readarr))
 		return 1;
 	printf_debug("RES returned %02x.\n", readarr[0]);
 	return 0;
@@ -72,7 +72,7 @@
 	const unsigned char cmd[JEDEC_WREN_OUTSIZE] = {JEDEC_WREN};
 
 	/* Send WREN (Write Enable) */
-	spi_command(JEDEC_WREN_OUTSIZE, JEDEC_WREN_INSIZE, cmd, NULL);
+	spi_command(sizeof(cmd), 0, cmd, NULL);
 }
 
 void spi_write_disable()
@@ -80,7 +80,7 @@
 	const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = {JEDEC_WRDI};
 
 	/* Send WRDI (Write Disable) */
-	spi_command(JEDEC_WRDI_OUTSIZE, JEDEC_WRDI_INSIZE, cmd, NULL);
+	spi_command(sizeof(cmd), 0, cmd, NULL);
 }
 
 static int probe_spi_rdid_generic(struct flashchip *flash, int bytes)
@@ -182,10 +182,10 @@
 uint8_t spi_read_status_register()
 {
 	const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = {JEDEC_RDSR};
-	unsigned char readarr[1];
+	unsigned char readarr[JEDEC_RDSR_INSIZE];
 
 	/* Read Status Register */
-	spi_command(JEDEC_RDSR_OUTSIZE, JEDEC_RDSR_INSIZE, cmd, readarr);
+	spi_command(sizeof(cmd), sizeof(readarr), cmd, readarr);
 	return readarr[0];
 }
 
@@ -273,7 +273,7 @@
 	spi_disable_blockprotect();
 	spi_write_enable();
 	/* Send CE (Chip Erase) */
-	spi_command(JEDEC_CE_C7_OUTSIZE, JEDEC_CE_C7_INSIZE, cmd, NULL);
+	spi_command(sizeof(cmd), 0, cmd, NULL);
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 1-85 s, so wait in 1 s steps.
 	 */
@@ -296,7 +296,7 @@
 	cmd[3] = (addr & 0x000000ff);
 	spi_write_enable();
 	/* Send BE (Block Erase) */
-	spi_command(JEDEC_BE_D8_OUTSIZE, JEDEC_BE_D8_INSIZE, cmd, NULL);
+	spi_command(sizeof(cmd), 0, cmd, NULL);
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
@@ -315,7 +315,7 @@
 
 	spi_write_enable();
 	/* Send SE (Sector Erase) */
-	spi_command(JEDEC_SE_OUTSIZE, JEDEC_SE_INSIZE, cmd, NULL);
+	spi_command(sizeof(cmd), 0, cmd, NULL);
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 15-800 ms, so wait in 10 ms steps.
 	 */
@@ -324,21 +324,6 @@
 	return 0;
 }
 
-void spi_page_program(int block, uint8_t *buf, uint8_t *bios)
-{
-	switch (flashbus) {
-	case BUS_TYPE_IT87XX_SPI:
-		it8716f_spi_page_program(block, buf, bios);
-		break;
-	case BUS_TYPE_ICH7_SPI:
-	case BUS_TYPE_ICH9_SPI:
-		printf_debug("%s called, but not implemented for ICH\n", __FUNCTION__);
-		break;
-	default:
-		printf_debug("%s called, but no SPI chipset/strapping detected\n", __FUNCTION__);
-	}
-}
-
 /*
  * This is according the SST25VF016 datasheet, who knows it is more
  * generic that this...
@@ -348,7 +333,7 @@
 	const unsigned char cmd[JEDEC_WRSR_OUTSIZE] = {JEDEC_WRSR, (unsigned char)status};
 
 	/* Send WRSR (Write Status Register) */
-	spi_command(JEDEC_WRSR_OUTSIZE, JEDEC_WRSR_INSIZE, cmd, NULL);
+	spi_command(sizeof(cmd), 0, cmd, NULL);
 }
 
 void spi_byte_program(int address, uint8_t byte)
@@ -361,7 +346,7 @@
 	};
 
 	/* Send Byte-Program */
-	spi_command(JEDEC_BYTE_PROGRAM_OUTSIZE, JEDEC_BYTE_PROGRAM_INSIZE, cmd, NULL);
+	spi_command(sizeof(cmd), 0, cmd, NULL);
 }
 
 void spi_disable_blockprotect(void)
@@ -386,7 +371,7 @@
 	};
 
 	/* Send Read */
-	spi_command(JEDEC_READ_OUTSIZE, len, cmd, bytes);
+	spi_command(sizeof(cmd), len, cmd, bytes);
 }
 
 int spi_chip_read(struct flashchip *flash, uint8_t *buf)
diff --git a/spi.h b/spi.h
index f5c877c..429ca6f 100644
--- a/spi.h
+++ b/spi.h
@@ -49,7 +49,7 @@
 #define JEDEC_CE_60_OUTSIZE	0x01
 #define JEDEC_CE_60_INSIZE	0x00
 
-/* Chip Erase 0xc7 is supported by ST/EON/Macronix chips. */
+/* Chip Erase 0xc7 is supported by SST/ST/EON/Macronix chips. */
 #define JEDEC_CE_C7		0xc7
 #define JEDEC_CE_C7_OUTSIZE	0x01
 #define JEDEC_CE_C7_INSIZE	0x00