diff --git a/flash.h b/flash.h
index 2bcdf91..09e239e 100644
--- a/flash.h
+++ b/flash.h
@@ -167,7 +167,12 @@
 #define SST_49LF016C		0x5C
 #define SST_49LF160C		0x4C
 
+/*
+ * ST25P chips are SPI, first byte of device ID is memory type, second
+ * byte of device ID is related to log(bitsize) at least for some chips.
+ */
 #define ST_ID			0x20	/* ST */
+#define ST_M25P80		0x2014
 #define ST_M50FLW040A		0x08
 #define ST_M50FLW040B		0x28
 #define ST_M50FLW080A		0x80
diff --git a/flashchips.c b/flashchips.c
index 72d5619..41ae1b1 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -140,6 +140,8 @@
 	 probe_jedec,	erase_chip_jedec,	write_jedec},
 	{"M29F040B",	ST_ID, 		ST_M29F040B,	512, 64 * 1024,
 	 probe_29f040b, erase_29f040b,	write_29f040b},
+	{"M25P80",	ST_ID,		ST_M25P80,	1024, 64 * 1024,
+	 probe_spi,	generic_spi_chip_erase,	generic_spi_chip_write},
 	{"82802ab",	137,		173,		512, 64 * 1024,
 	 probe_82802ab, erase_82802ab,	write_82802ab},
 	{"82802ac",	137,		172,		1024, 64 * 1024,
diff --git a/spi.c b/spi.c
index 8467664..8ae6357 100644
--- a/spi.c
+++ b/spi.c
@@ -280,7 +280,11 @@
 int generic_spi_chip_erase(struct flashchip *flash)
 {
 	const unsigned char cmd[] = JEDEC_CE_2;
+	uint8_t statusreg;
 
+	statusreg = generic_spi_read_status_register();
+	printf("chip status register before erase is %02x\n", statusreg);
+	
 	generic_spi_write_enable();
 	/* Send CE (Chip Erase) */
 	generic_spi_command(JEDEC_CE_2_OUTSIZE, JEDEC_CE_2_INSIZE, cmd, NULL);