)]}'
{
  "commit": "f041e9b5865c9b5544905d163b47d2387732c634",
  "tree": "7e43780959ba8b54ea09bc0711ef3e31bc989df7",
  "parents": [
    "7de8639b29c4988ccf7ee110fc5ba6e7e66986f8"
  ],
  "author": {
    "name": "FENG yu ning",
    "email": "fengyuning1984@gmail.com",
    "time": "Mon Dec 15 02:32:11 2008 +0000"
  },
  "committer": {
    "name": "Peter Stuge",
    "email": "peter@stuge.se",
    "time": "Mon Dec 15 02:32:11 2008 +0000"
  },
  "message": "Various ichspi.c refinements\n\n* add a generic preop-opcode-pair table.\n\n* rename ich_check_opcodes to ich_init_opcodes.\n\n* let ich_init_opcodes do not need to access flashchip structure:\n  . move the definition of struct preop_opcode_pair to a better place\n  . remove preop_opcode_pairs from \u0027struct flashchip\u0027\n  . modify ich_init_opcodes and generate_opcodes so that they do not access the flashchip structure\n\n* call ich_init_opcodes during chipset enable. Now OPCODES generation mechanism works.\n\n* fix a coding style mistake.\n\nCorresponding to flashrom svn r367 and coreboot v2 svn r3814.\n\nSigned-off-by: FENG yu ning \u003cfengyuning1984@gmail.com\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d2ae21279a2867c685c4d8605ab522a2d304f3ed",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "b5af401078b2dfbd08205a9d4c02e9d037527243",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    },
    {
      "type": "modify",
      "old_id": "7161a4e0348677de96d8eb5fe3d5695e9edcdb30",
      "old_mode": 33188,
      "old_path": "flash.h",
      "new_id": "06156dcdc8e334e6df0760316363a325f3372882",
      "new_mode": 33188,
      "new_path": "flash.h"
    },
    {
      "type": "modify",
      "old_id": "cbc81b02f8db8a506c572646bff30a21da24ea06",
      "old_mode": 33188,
      "old_path": "ichspi.c",
      "new_id": "b60bc0e767230d6649eed97a4509e3361a25e60e",
      "new_mode": 33188,
      "new_path": "ichspi.c"
    }
  ]
}