)]}'
{
  "commit": "ed8b82c17e285de43437325fe7c402186719da8c",
  "tree": "e252a99cb8978e5fc27eda846dc8c92de9058024",
  "parents": [
    "4a351349eb0e2156adc06cb628f4db64d7857d40"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Tue Oct 22 00:12:03 2024 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sun Feb 23 12:05:52 2025 +0000"
  },
  "message": "flashchips: Add Fudan FM25Q128 3.3V part\n\nThis chip has non-volatile DC bits that control the number of dummy\ncycles for all fast-read commands in all modes. As we don\u0027t check\nsuch bits, we don\u0027t enable any fast reads for now. Otherwise it\nlooks well featured. Block protection seems to follow Winbonds\nscheme, however without SEC and SRL bits.\n\nDatasheet used:\nhttp://eng.fmsh.com/nvm/FM25Q128_ds_eng.pdf\n\nChange-Id: I9cda2fdbc13c20eda999555d09c9a847d0192536\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/290\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8bb8eb5822c3cae43f42ebb5d332268c1520c43b",
      "old_mode": 33188,
      "old_path": "flashchips.c",
      "new_id": "e077c69e27b7742df0d811f9b11affd120e1b986",
      "new_mode": 33188,
      "new_path": "flashchips.c"
    },
    {
      "type": "modify",
      "old_id": "4718bd2f0abb65e88a0f636d02a510472b940d62",
      "old_mode": 33188,
      "old_path": "include/flashchips.h",
      "new_id": "03798bf5513735bcc9a0fad1c4a73d4eb6adc46d",
      "new_mode": 33188,
      "new_path": "include/flashchips.h"
    }
  ]
}